Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6 |
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#
5e727e8b |
| 17-Dec-2024 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
[Statepoint] Treat undef operands less specially (#119682)
This reverts commit f7443905af1e06eaacda1e437fff8d54dc89c487.
This is to avoid an assertion if an undef operand appears in a stackmap. Thi
[Statepoint] Treat undef operands less specially (#119682)
This reverts commit f7443905af1e06eaacda1e437fff8d54dc89c487.
This is to avoid an assertion if an undef operand appears in a stackmap. This is important to avoid hitting verifier errors when register allocation starts adding undefs in error scenarios.
Rather than trying to treat undef operands as special, leave them alone and avoid producing an invalid spill. It would a bit more precise to produce a spill of an undef register here, but that's not exposed through the storeRegToStackSlot API.
https://reviews.llvm.org/D122605
This was an alternative to https://reviews.llvm.org/D122582
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Revision tags: llvmorg-19.1.5, llvmorg-19.1.4 |
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735ab61a |
| 13-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Remove unused includes (NFC) (#115996)
Identified with misc-include-cleaner.
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0 |
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f2b71491 |
| 09-Sep-2024 |
Craig Topper <craig.topper@sifive.com> |
[MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (#107776)
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Revision tags: llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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0388ab3e |
| 19-Jan-2024 |
Danila Malyutin <danilaml@users.noreply.github.com> |
[Statepoint][NFC] Use uint16_t and add an assert (#78717)
Use a fixed width integer type and assert that DwarRegNum fits the 16
bits.
This is a follow up to review comments on #78600.
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9ad7d8f0 |
| 19-Jan-2024 |
Danila Malyutin <danilaml@users.noreply.github.com> |
[Statepoint] Optimize Location structure size (#78600)
Reduce its size from 24 to 12 bytes. Improves memory consumption when
dealing with statepoint-heavy code.
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Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5 |
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7a258706 |
| 20-May-2023 |
Sergei Barannikov <barannikov88@gmail.com> |
[CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
The lists contain differences between register numbers, not the register numbers themselves. Since a difference can also be negative
[CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
The lists contain differences between register numbers, not the register numbers themselves. Since a difference can also be negative, this also changes its type to signed.
Changing the type to signed exposed a "bug". For AMDGPU, which has many registers, the first element of a sequence could be as big as ~45k. The value does not fit into int16_t, but fits into uint16_t. The bug didn't show up because of unsigned wrapping and truncation of the Val field in the advance() method.
To fix the issue, I changed the way regunit difflists are encoded. The 4-bit 'scale' field of MCRegisterDesc::RegUnit was replaced by 12-bit number of the first regunit, and the first element of each of the lists was removed. The higher 20 bits of RegUnit field contain the initial offset into DiffLists array. AMDGPU has 1'409 regunits (2^12 = 4'096), and the biggest offset is 80'041 (2^20 = 1'048'576). That is, there is enough room.
Changing the encoding method also resulted in a smaller array size, the numbers are below (I omitted targets with less than 100 elements).
``` AMDGPU | 80052 | 78741 | -1,6% RISCV | 6498 | 6297 | -3,1% ARM | 4181 | 3966 | -5,1% AArch64 | 2770 | 2592 | -6,4% PPC | 1578 | 1441 | -8,7% Hexagon | 994 | 740 | -25,6% R600 | 508 | 398 | -21,7% VE | 471 | 459 | -2,5% Sparc | 381 | 363 | -4,7% X86 | 326 | 208 | -36,2% Mips | 253 | 200 | -20,9% SystemZ | 186 | 162 | -12,9% ```
Reviewed By: foad, arsenm
Differential Revision: https://reviews.llvm.org/D151036
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Revision tags: llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2 |
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c30c5f01 |
| 18-Apr-2023 |
Jay Foad <jay.foad@amd.com> |
[MC] Simplify uses of subregs/superregs. NFC.
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14bc3748 |
| 17-Apr-2023 |
Jay Foad <jay.foad@amd.com> |
[MC] Use subregs/superregs instead of MCSubRegIterator/MCSuperRegIterator. NFC.
Differential Revision: https://reviews.llvm.org/D148613
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Revision tags: llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2 |
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d170a254 |
| 03-Feb-2023 |
Jay Foad <jay.foad@amd.com> |
[CodeGen] Define and use MachineOperand::getOperandNo
This is a helper function to very slightly simplify many calls to MachineInstruction::getOperandNo.
Differential Revision: https://reviews.llvm
[CodeGen] Define and use MachineOperand::getOperandNo
This is a helper function to very slightly simplify many calls to MachineInstruction::getOperandNo.
Differential Revision: https://reviews.llvm.org/D143250
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Revision tags: llvmorg-16.0.0-rc1, llvmorg-17-init |
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e72ca520 |
| 13-Jan-2023 |
Craig Topper <craig.topper@sifive.com> |
[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
Use isPhysical/isVirtual methods.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D141715
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Revision tags: llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4 |
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fd64bd94 |
| 20-Oct-2022 |
Serguei Katkov <serguei.katkov@azul.com> |
[Inline Spiller] Extend the snippet by statepoint uses
Snippet is a tiny live interval which has copy or fill like def and copy or spill like use at the end (any of them might abcent).
Snippet has
[Inline Spiller] Extend the snippet by statepoint uses
Snippet is a tiny live interval which has copy or fill like def and copy or spill like use at the end (any of them might abcent).
Snippet has only one use/def inside interval and interval is located in one basic block.
When inline spiller spills some reg around uses it also forces the spilling of connected snippets those which got by splitting the same original reg and its def is a full copy of our reg or its last use is a full copy to our reg.
The definition of snippet is extended to allow not only one use/def but more. However all other uses are statepoint instructions which will fold fill into its operand. That way we do not introduce new fills/spills.
Reviewed By: qcolombet, dantrushin Differential Revision: https://reviews.llvm.org/D138093
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6c09ea3f |
| 24-Nov-2022 |
Guillaume Chatelet <gchatelet@google.com> |
[Alignment][NFC] Use Align in MCStreamer::emitValueToAlignment
Differential Revision: https://reviews.llvm.org/D138674
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Revision tags: llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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9e6d1f4b |
| 17-Jul-2022 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Qualify auto variables in for loops (NFC)
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Revision tags: llvmorg-14.0.6 |
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adf4142f |
| 11-Jun-2022 |
Fangrui Song <i@maskray.me> |
[MC] De-capitalize SwitchSection. NFC
Add SwitchSection to return switchSection. The API will be removed soon.
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Revision tags: llvmorg-14.0.5 |
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15d82c62 |
| 07-Jun-2022 |
Fangrui Song <i@maskray.me> |
[MC] De-capitalize MCStreamer functions
Follow-up to c031378ce01b8485ba0ef486654bc9393c4ac024 . The class is mostly consistent now.
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Revision tags: llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1, llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4 |
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a9968c0a |
| 15-Mar-2021 |
Tomas Matheson <tomas.matheson@arm.com> |
[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions
Currently needsStackRealignment returns false if canRealignStack returns false. This means that the behavior of needsStackRealig
[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions
Currently needsStackRealignment returns false if canRealignStack returns false. This means that the behavior of needsStackRealignment does not correspond to it's name and description; a function might need stack realignment, but if it is not possible then this function returns false. Furthermore, needsStackRealignment is not virtual and therefore some backends have made use of canRealignStack to indicate whether a function needs stack realignment.
This patch attempts to clarify the situation by separating them and introducing new names:
- shouldRealignStack - true if there is any reason the stack should be realigned
- canRealignStack - true if we are still able to realign the stack (e.g. we can still reserve/have reserved a frame pointer)
- hasStackRealignment = shouldRealignStack && canRealignStack (not target customisable)
Targets can now override shouldRealignStack to indicate that stack realignment is required.
This change will make it easier in a future change to handle the case where we need to realign the stack but can't do so (for example when the register allocator creates an aligned spill after the frame pointer has been eliminated).
Differential Revision: https://reviews.llvm.org/D98716
Change-Id: Ib9a4d21728bf9d08a545b4365418d3ffe1af4d87
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Revision tags: llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2 |
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#
f7443905 |
| 14-Jan-2021 |
Denis Antrushin <dantrushin@gmail.com> |
[Statepoint] Handle `undef` operands in statepoint.
Currently when spilling statepoint register operands in FixupStatepoints we do not pay attention that it might be `undef`. We just generate a spil
[Statepoint] Handle `undef` operands in statepoint.
Currently when spilling statepoint register operands in FixupStatepoints we do not pay attention that it might be `undef`. We just generate a spill, which may lead to verifier error because we have a use without def.
To handle it, let FixupStateponts ignore `undef` register operands completely and change them to some constant value when generating stack map. Use same value as used by ISel for this purpose (0xFEFEFEFE).
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D94703
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Revision tags: llvmorg-11.1.0-rc1 |
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fba9805b |
| 12-Jan-2021 |
Serguei Katkov <serguei.katkov@azul.com> |
[Verifier] Extend statepoint verifier to cover more constants
Also old mir tests are updated to meet last changes in STATEPOINT format.
Reviewers: reames, dantrushin Reviewed By: reames, dantrushin
[Verifier] Extend statepoint verifier to cover more constants
Also old mir tests are updated to meet last changes in STATEPOINT format.
Reviewers: reames, dantrushin Reviewed By: reames, dantrushin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D94482
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3285ee14 |
| 20-Dec-2020 |
Kazu Hirata <kazu@google.com> |
[Analysis, IR, CodeGen] Use llvm::erase_if (NFC)
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Revision tags: llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1 |
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134ffa81 |
| 21-Oct-2020 |
Hubert Tong <hubert.reinterpretcast@gmail.com> |
NFC: Fix -Wsign-compare warnings on 32-bit builds
Comparing 32-bit `ptrdiff_t` against 32-bit `unsigned` results in `-Wsign-compare` warnings for both GCC and Clang.
The warning for the cases in qu
NFC: Fix -Wsign-compare warnings on 32-bit builds
Comparing 32-bit `ptrdiff_t` against 32-bit `unsigned` results in `-Wsign-compare` warnings for both GCC and Clang.
The warning for the cases in question appear to identify an issue where the `ptrdiff_t` value would be mutated via conversion to an unsigned type.
The warning is resolved by using the usual arithmetic conversions to safely preserve the value of the `unsigned` operand while trying to convert to a signed type. Host platforms where `unsigned` has the same width as `unsigned long long` will need to make a different change, but using an explicit cast has disadvantages that can be avoided for now.
Reviewed By: dantrushin
Differential Revision: https://reviews.llvm.org/D89612
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ae40d285 |
| 14-Oct-2020 |
Michael Liao <michael.hliao@gmail.com> |
Fix an apparent typo. `assert()` must not contain side-effects. NFC.
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Revision tags: llvmorg-11.0.0, llvmorg-11.0.0-rc6 |
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b3876ef4 |
| 06-Oct-2020 |
Dmitri Gribenko <gribozavr@gmail.com> |
Silence -Wunused-variable in NDEBUG mode
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Revision tags: llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3 |
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c08d48fc |
| 04-Sep-2020 |
Denis Antrushin <dantrushin@gmail.com> |
[Statepoints] Change statepoint machine instr format to better suit VReg lowering.
Current Statepoint MI format is this:
STATEPOINT <id>, <num patch bytes >, <num call arguments>, <call targe
[Statepoints] Change statepoint machine instr format to better suit VReg lowering.
Current Statepoint MI format is this:
STATEPOINT <id>, <num patch bytes >, <num call arguments>, <call target>, [call arguments...], <StackMaps::ConstantOp>, <calling convention>, <StackMaps::ConstantOp>, <statepoint flags>, <StackMaps::ConstantOp>, <num deopt args>, [deopt args...], <gc base/derived pairs...> <gc allocas...>
Note that GC pointers are listed in pairs <base,derived>. This causes base pointers to appear many times (at least twice) in instruction, which is bad for us when VReg lowering is ON. The problem is that machine operand tiedness is 1-1 relation, so it might look like this:
%vr2 = STATEPOINT ... %vr1, %vr1(tied-def0)
Since only one instance of %vr1 is tied, that may lead to incorrect codegen (see PR46917 for more details), so we have to always spill base pointers. This mostly defeats new VReg lowering scheme.
This patch changes statepoint instruction format so that every gc pointer appears only once in operand list. That way they all can be tied. Additional set of operands is added to preserve base-derived relation required to build stackmap. New statepoint has following format:
STATEPOINT <id>, <num patch bytes>, <num call arguments>, <call target>, [call arguments...], <StackMaps::ConstantOp>, <calling convention>, <StackMaps::ConstantOp>, <statepoint flags>, <StackMaps::ConstantOp>, <num deopt args>, [deopt args...], <StackMaps::ConstantOp>, <num gc pointers>, [gc pointers...], <StackMaps::ConstantOp>, <num gc allocas>, [gc allocas...] <StackMaps::ConstantOp>, <num entries in gc map>, [base/derived indices...]
Changes are: - every gc pointer is listed only once in a flat length-prefixed list; - alloca list is prefixed with its length too; - following alloca list is length-prefixed list of base-derived indices of pointers from gc pointer list. Note that indices are logical (number of pointer), not absolute (index of machine operand).
Differential Revision: https://reviews.llvm.org/D87154
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2a52c330 |
| 07-Sep-2020 |
Denis Antrushin <dantrushin@gmail.com> |
[Statepoints] Properly handle const base pointer.
Current code in InstEmitter assumes all GC pointers are either VRegs or stack slots - hence, taking only one operand. But it is possible to have con
[Statepoints] Properly handle const base pointer.
Current code in InstEmitter assumes all GC pointers are either VRegs or stack slots - hence, taking only one operand. But it is possible to have constant base, in which case it occupies two machine operands.
Add a convinience function to StackMaps to get index of next meta argument and use it in InsrEmitter to properly advance to the next statepoint meta operand.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D87252
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Revision tags: llvmorg-11.0.0-rc2 |
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#
f97019ad |
| 04-Aug-2020 |
Georgii Rymar <grimar@accesssoftek.com> |
[llvm-readobj/elf] - Add a testing for --stackmap and refine the implementation.
Currently, we only test the `--stackmap` option here: https://github.com/llvm/llvm-project/blob/master/llvm/test/Obje
[llvm-readobj/elf] - Add a testing for --stackmap and refine the implementation.
Currently, we only test the `--stackmap` option here: https://github.com/llvm/llvm-project/blob/master/llvm/test/Object/stackmap-dump.test it uses a precompiled MachO binary currently and I've found no tests for this option for ELF.
The implementation also has issues. For example, it might assert on a wrong version of the .llvm-stackmaps section. Or it might crash on an empty or truncated section.
This patch introduces a new tools/llvm-readobj/ELF test file as well as implements a few basic checks to catch simple crashes/issues
It also eliminates `unwrapOrError` calls in `printStackMap()`.
Differential revision: https://reviews.llvm.org/D85208
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