xref: /llvm-project/llvm/lib/DebugInfo/DWARF/DWARFExpression.cpp (revision f807c5e492878240fe6d7be23b930c78c4e62eba)
1 //===-- DWARFExpression.cpp -----------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "llvm/DebugInfo/DWARF/DWARFExpression.h"
10 #include "llvm/ADT/SmallString.h"
11 #include "llvm/DebugInfo/DWARF/DWARFUnit.h"
12 #include "llvm/Support/Format.h"
13 #include <cassert>
14 #include <cstdint>
15 #include <vector>
16 
17 using namespace llvm;
18 using namespace dwarf;
19 
20 namespace llvm {
21 
22 typedef DWARFExpression::Operation Op;
23 typedef Op::Description Desc;
24 
25 static std::vector<Desc> getOpDescriptions() {
26   std::vector<Desc> Descriptions;
27   Descriptions.resize(0xff);
28   Descriptions[DW_OP_addr] = Desc(Op::Dwarf2, Op::SizeAddr);
29   Descriptions[DW_OP_deref] = Desc(Op::Dwarf2);
30   Descriptions[DW_OP_const1u] = Desc(Op::Dwarf2, Op::Size1);
31   Descriptions[DW_OP_const1s] = Desc(Op::Dwarf2, Op::SignedSize1);
32   Descriptions[DW_OP_const2u] = Desc(Op::Dwarf2, Op::Size2);
33   Descriptions[DW_OP_const2s] = Desc(Op::Dwarf2, Op::SignedSize2);
34   Descriptions[DW_OP_const4u] = Desc(Op::Dwarf2, Op::Size4);
35   Descriptions[DW_OP_const4s] = Desc(Op::Dwarf2, Op::SignedSize4);
36   Descriptions[DW_OP_const8u] = Desc(Op::Dwarf2, Op::Size8);
37   Descriptions[DW_OP_const8s] = Desc(Op::Dwarf2, Op::SignedSize8);
38   Descriptions[DW_OP_constu] = Desc(Op::Dwarf2, Op::SizeLEB);
39   Descriptions[DW_OP_consts] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
40   Descriptions[DW_OP_dup] = Desc(Op::Dwarf2);
41   Descriptions[DW_OP_drop] = Desc(Op::Dwarf2);
42   Descriptions[DW_OP_over] = Desc(Op::Dwarf2);
43   Descriptions[DW_OP_pick] = Desc(Op::Dwarf2, Op::Size1);
44   Descriptions[DW_OP_swap] = Desc(Op::Dwarf2);
45   Descriptions[DW_OP_rot] = Desc(Op::Dwarf2);
46   Descriptions[DW_OP_xderef] = Desc(Op::Dwarf2);
47   Descriptions[DW_OP_abs] = Desc(Op::Dwarf2);
48   Descriptions[DW_OP_and] = Desc(Op::Dwarf2);
49   Descriptions[DW_OP_div] = Desc(Op::Dwarf2);
50   Descriptions[DW_OP_minus] = Desc(Op::Dwarf2);
51   Descriptions[DW_OP_mod] = Desc(Op::Dwarf2);
52   Descriptions[DW_OP_mul] = Desc(Op::Dwarf2);
53   Descriptions[DW_OP_neg] = Desc(Op::Dwarf2);
54   Descriptions[DW_OP_not] = Desc(Op::Dwarf2);
55   Descriptions[DW_OP_or] = Desc(Op::Dwarf2);
56   Descriptions[DW_OP_plus] = Desc(Op::Dwarf2);
57   Descriptions[DW_OP_plus_uconst] = Desc(Op::Dwarf2, Op::SizeLEB);
58   Descriptions[DW_OP_shl] = Desc(Op::Dwarf2);
59   Descriptions[DW_OP_shr] = Desc(Op::Dwarf2);
60   Descriptions[DW_OP_shra] = Desc(Op::Dwarf2);
61   Descriptions[DW_OP_xor] = Desc(Op::Dwarf2);
62   Descriptions[DW_OP_bra] = Desc(Op::Dwarf2, Op::SignedSize2);
63   Descriptions[DW_OP_eq] = Desc(Op::Dwarf2);
64   Descriptions[DW_OP_ge] = Desc(Op::Dwarf2);
65   Descriptions[DW_OP_gt] = Desc(Op::Dwarf2);
66   Descriptions[DW_OP_le] = Desc(Op::Dwarf2);
67   Descriptions[DW_OP_lt] = Desc(Op::Dwarf2);
68   Descriptions[DW_OP_ne] = Desc(Op::Dwarf2);
69   Descriptions[DW_OP_skip] = Desc(Op::Dwarf2, Op::SignedSize2);
70   for (uint16_t LA = DW_OP_lit0; LA <= DW_OP_lit31; ++LA)
71     Descriptions[LA] = Desc(Op::Dwarf2);
72   for (uint16_t LA = DW_OP_reg0; LA <= DW_OP_reg31; ++LA)
73     Descriptions[LA] = Desc(Op::Dwarf2);
74   for (uint16_t LA = DW_OP_breg0; LA <= DW_OP_breg31; ++LA)
75     Descriptions[LA] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
76   Descriptions[DW_OP_regx] = Desc(Op::Dwarf2, Op::SizeLEB);
77   Descriptions[DW_OP_fbreg] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
78   Descriptions[DW_OP_bregx] = Desc(Op::Dwarf2, Op::SizeLEB, Op::SignedSizeLEB);
79   Descriptions[DW_OP_piece] = Desc(Op::Dwarf2, Op::SizeLEB);
80   Descriptions[DW_OP_deref_size] = Desc(Op::Dwarf2, Op::Size1);
81   Descriptions[DW_OP_xderef_size] = Desc(Op::Dwarf2, Op::Size1);
82   Descriptions[DW_OP_nop] = Desc(Op::Dwarf2);
83   Descriptions[DW_OP_push_object_address] = Desc(Op::Dwarf3);
84   Descriptions[DW_OP_call2] = Desc(Op::Dwarf3, Op::Size2);
85   Descriptions[DW_OP_call4] = Desc(Op::Dwarf3, Op::Size4);
86   Descriptions[DW_OP_call_ref] = Desc(Op::Dwarf3, Op::SizeRefAddr);
87   Descriptions[DW_OP_form_tls_address] = Desc(Op::Dwarf3);
88   Descriptions[DW_OP_call_frame_cfa] = Desc(Op::Dwarf3);
89   Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB);
90   Descriptions[DW_OP_implicit_value] =
91       Desc(Op::Dwarf4, Op::SizeLEB, Op::SizeBlock);
92   Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf4);
93   Descriptions[DW_OP_implicit_pointer] =
94       Desc(Op::Dwarf5, Op::SizeRefAddr, Op::SignedSizeLEB);
95   Descriptions[DW_OP_addrx] = Desc(Op::Dwarf5, Op::SizeLEB);
96   Descriptions[DW_OP_constx] = Desc(Op::Dwarf5, Op::SizeLEB);
97   Descriptions[DW_OP_entry_value] = Desc(Op::Dwarf5, Op::SizeLEB);
98   Descriptions[DW_OP_convert] = Desc(Op::Dwarf5, Op::BaseTypeRef);
99   Descriptions[DW_OP_regval_type] =
100       Desc(Op::Dwarf5, Op::SizeLEB, Op::BaseTypeRef);
101   Descriptions[DW_OP_WASM_location] =
102       Desc(Op::Dwarf4, Op::SizeLEB, Op::WasmLocationArg);
103   Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3);
104   Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB);
105   Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB);
106   Descriptions[DW_OP_GNU_entry_value] = Desc(Op::Dwarf4, Op::SizeLEB);
107   // This Description acts as a marker that getSubOpDesc must be called
108   // to fetch the final Description for the operation. Each such final
109   // Description must share the same first SizeSubOpLEB operand.
110   Descriptions[DW_OP_LLVM_user] = Desc(Op::Dwarf5, Op::SizeSubOpLEB);
111   return Descriptions;
112 }
113 
114 static Desc getDescImpl(ArrayRef<Desc> Descriptions, unsigned Opcode) {
115   // Handle possible corrupted or unsupported operation.
116   if (Opcode >= Descriptions.size())
117     return {};
118   return Descriptions[Opcode];
119 }
120 
121 static Desc getOpDesc(unsigned Opcode) {
122   static std::vector<Desc> Descriptions = getOpDescriptions();
123   return getDescImpl(Descriptions, Opcode);
124 }
125 
126 static std::vector<Desc> getSubOpDescriptions() {
127   static constexpr unsigned LlvmUserDescriptionsSize = 1
128 #define HANDLE_DW_OP_LLVM_USEROP(ID, NAME) +1
129 #include "llvm/BinaryFormat/Dwarf.def"
130       ;
131   std::vector<Desc> Descriptions;
132   Descriptions.resize(LlvmUserDescriptionsSize);
133   Descriptions[DW_OP_LLVM_nop] = Desc(Op::Dwarf5, Op::SizeSubOpLEB);
134   return Descriptions;
135 }
136 
137 static Desc getSubOpDesc(unsigned Opcode, unsigned SubOpcode) {
138   assert(Opcode == DW_OP_LLVM_user);
139   static std::vector<Desc> Descriptions = getSubOpDescriptions();
140   return getDescImpl(Descriptions, SubOpcode);
141 }
142 
143 bool DWARFExpression::Operation::extract(DataExtractor Data,
144                                          uint8_t AddressSize, uint64_t Offset,
145                                          std::optional<DwarfFormat> Format) {
146   EndOffset = Offset;
147   Opcode = Data.getU8(&Offset);
148 
149   Desc = getOpDesc(Opcode);
150   if (Desc.Version == Operation::DwarfNA)
151     return false;
152 
153   Operands.resize(Desc.Op.size());
154   OperandEndOffsets.resize(Desc.Op.size());
155   for (unsigned Operand = 0; Operand < Desc.Op.size(); ++Operand) {
156     unsigned Size = Desc.Op[Operand];
157     unsigned Signed = Size & Operation::SignBit;
158 
159     switch (Size & ~Operation::SignBit) {
160     case Operation::SizeSubOpLEB:
161       assert(Operand == 0 && "SubOp operand must be the first operand");
162       Operands[Operand] = Data.getULEB128(&Offset);
163       Desc = getSubOpDesc(Opcode, Operands[Operand]);
164       if (Desc.Version == Operation::DwarfNA)
165         return false;
166       assert(Desc.Op[Operand] == Operation::SizeSubOpLEB &&
167              "SizeSubOpLEB Description must begin with SizeSubOpLEB operand");
168       break;
169     case Operation::Size1:
170       Operands[Operand] = Data.getU8(&Offset);
171       if (Signed)
172         Operands[Operand] = (int8_t)Operands[Operand];
173       break;
174     case Operation::Size2:
175       Operands[Operand] = Data.getU16(&Offset);
176       if (Signed)
177         Operands[Operand] = (int16_t)Operands[Operand];
178       break;
179     case Operation::Size4:
180       Operands[Operand] = Data.getU32(&Offset);
181       if (Signed)
182         Operands[Operand] = (int32_t)Operands[Operand];
183       break;
184     case Operation::Size8:
185       Operands[Operand] = Data.getU64(&Offset);
186       break;
187     case Operation::SizeAddr:
188       Operands[Operand] = Data.getUnsigned(&Offset, AddressSize);
189       break;
190     case Operation::SizeRefAddr:
191       if (!Format)
192         return false;
193       Operands[Operand] =
194           Data.getUnsigned(&Offset, dwarf::getDwarfOffsetByteSize(*Format));
195       break;
196     case Operation::SizeLEB:
197       if (Signed)
198         Operands[Operand] = Data.getSLEB128(&Offset);
199       else
200         Operands[Operand] = Data.getULEB128(&Offset);
201       break;
202     case Operation::BaseTypeRef:
203       Operands[Operand] = Data.getULEB128(&Offset);
204       break;
205     case Operation::WasmLocationArg:
206       assert(Operand == 1);
207       switch (Operands[0]) {
208       case 0:
209       case 1:
210       case 2:
211       case 4:
212         Operands[Operand] = Data.getULEB128(&Offset);
213         break;
214       case 3: // global as uint32
215          Operands[Operand] = Data.getU32(&Offset);
216          break;
217       default:
218         return false; // Unknown Wasm location
219       }
220       break;
221     case Operation::SizeBlock:
222       // We need a size, so this cannot be the first operand
223       if (Operand == 0)
224         return false;
225       // Store the offset of the block as the value.
226       Operands[Operand] = Offset;
227       Offset += Operands[Operand - 1];
228       break;
229     default:
230       llvm_unreachable("Unknown DWARFExpression Op size");
231     }
232 
233     OperandEndOffsets[Operand] = Offset;
234   }
235 
236   EndOffset = Offset;
237   return true;
238 }
239 
240 static void prettyPrintBaseTypeRef(DWARFUnit *U, raw_ostream &OS,
241                                    DIDumpOptions DumpOpts,
242                                    ArrayRef<uint64_t> Operands,
243                                    unsigned Operand) {
244   assert(Operand < Operands.size() && "operand out of bounds");
245   if (!U) {
246     OS << format(" <base_type ref: 0x%" PRIx64 ">", Operands[Operand]);
247     return;
248   }
249   auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]);
250   if (Die && Die.getTag() == dwarf::DW_TAG_base_type) {
251     OS << " (";
252     if (DumpOpts.Verbose)
253       OS << format("0x%08" PRIx64 " -> ", Operands[Operand]);
254     OS << format("0x%08" PRIx64 ")", U->getOffset() + Operands[Operand]);
255     if (auto Name = dwarf::toString(Die.find(dwarf::DW_AT_name)))
256       OS << " \"" << *Name << "\"";
257   } else {
258     OS << format(" <invalid base_type ref: 0x%" PRIx64 ">", Operands[Operand]);
259   }
260 }
261 
262 bool DWARFExpression::prettyPrintRegisterOp(DWARFUnit *U, raw_ostream &OS,
263                                             DIDumpOptions DumpOpts,
264                                             uint8_t Opcode,
265                                             ArrayRef<uint64_t> Operands) {
266   if (!DumpOpts.GetNameForDWARFReg)
267     return false;
268 
269   uint64_t DwarfRegNum;
270   unsigned OpNum = 0;
271 
272   if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
273       Opcode == DW_OP_regval_type)
274     DwarfRegNum = Operands[OpNum++];
275   else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx)
276     DwarfRegNum = Opcode - DW_OP_breg0;
277   else
278     DwarfRegNum = Opcode - DW_OP_reg0;
279 
280   auto RegName = DumpOpts.GetNameForDWARFReg(DwarfRegNum, DumpOpts.IsEH);
281   if (!RegName.empty()) {
282     if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
283         Opcode == DW_OP_bregx)
284       OS << ' ' << RegName << format("%+" PRId64, Operands[OpNum]);
285     else
286       OS << ' ' << RegName.data();
287 
288     if (Opcode == DW_OP_regval_type)
289       prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, 1);
290     return true;
291   }
292 
293   return false;
294 }
295 
296 std::optional<unsigned> DWARFExpression::Operation::getSubCode() const {
297   if (!Desc.Op.size() || Desc.Op[0] != Operation::SizeSubOpLEB)
298     return std::nullopt;
299   return Operands[0];
300 }
301 
302 bool DWARFExpression::Operation::print(raw_ostream &OS, DIDumpOptions DumpOpts,
303                                        const DWARFExpression *Expr,
304                                        DWARFUnit *U) const {
305   if (Error) {
306     OS << "<decoding error>";
307     return false;
308   }
309 
310   StringRef Name = OperationEncodingString(Opcode);
311   assert(!Name.empty() && "DW_OP has no name!");
312   OS << Name;
313 
314   if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
315       (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) ||
316       Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
317       Opcode == DW_OP_regval_type)
318     if (prettyPrintRegisterOp(U, OS, DumpOpts, Opcode, Operands))
319       return true;
320 
321   for (unsigned Operand = 0; Operand < Desc.Op.size(); ++Operand) {
322     unsigned Size = Desc.Op[Operand];
323     unsigned Signed = Size & Operation::SignBit;
324 
325     if (Size == Operation::SizeSubOpLEB) {
326       StringRef SubName = SubOperationEncodingString(Opcode, Operands[Operand]);
327       assert(!SubName.empty() && "DW_OP SubOp has no name!");
328       OS << " " << SubName;
329     } else if (Size == Operation::BaseTypeRef && U) {
330       // For DW_OP_convert the operand may be 0 to indicate that conversion to
331       // the generic type should be done. The same holds for DW_OP_reinterpret,
332       // which is currently not supported.
333       if (Opcode == DW_OP_convert && Operands[Operand] == 0)
334         OS << " 0x0";
335       else
336         prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, Operand);
337     } else if (Size == Operation::WasmLocationArg) {
338       assert(Operand == 1);
339       switch (Operands[0]) {
340       case 0:
341       case 1:
342       case 2:
343       case 3: // global as uint32
344       case 4:
345         OS << format(" 0x%" PRIx64, Operands[Operand]);
346         break;
347       default: assert(false);
348       }
349     } else if (Size == Operation::SizeBlock) {
350       uint64_t Offset = Operands[Operand];
351       for (unsigned i = 0; i < Operands[Operand - 1]; ++i)
352         OS << format(" 0x%02x", Expr->Data.getU8(&Offset));
353     } else {
354       if (Signed)
355         OS << format(" %+" PRId64, (int64_t)Operands[Operand]);
356       else if (Opcode != DW_OP_entry_value &&
357                Opcode != DW_OP_GNU_entry_value)
358         OS << format(" 0x%" PRIx64, Operands[Operand]);
359     }
360   }
361   return true;
362 }
363 
364 void DWARFExpression::print(raw_ostream &OS, DIDumpOptions DumpOpts,
365                             DWARFUnit *U, bool IsEH) const {
366   uint32_t EntryValExprSize = 0;
367   uint64_t EntryValStartOffset = 0;
368   if (Data.getData().empty())
369     OS << "<empty>";
370 
371   for (auto &Op : *this) {
372     DumpOpts.IsEH = IsEH;
373     if (!Op.print(OS, DumpOpts, this, U)) {
374       uint64_t FailOffset = Op.getEndOffset();
375       while (FailOffset < Data.getData().size())
376         OS << format(" %02x", Data.getU8(&FailOffset));
377       return;
378     }
379 
380     if (Op.getCode() == DW_OP_entry_value ||
381         Op.getCode() == DW_OP_GNU_entry_value) {
382       OS << "(";
383       EntryValExprSize = Op.getRawOperand(0);
384       EntryValStartOffset = Op.getEndOffset();
385       continue;
386     }
387 
388     if (EntryValExprSize) {
389       EntryValExprSize -= Op.getEndOffset() - EntryValStartOffset;
390       if (EntryValExprSize == 0)
391         OS << ")";
392     }
393 
394     if (Op.getEndOffset() < Data.getData().size())
395       OS << ", ";
396   }
397 }
398 
399 bool DWARFExpression::Operation::verify(const Operation &Op, DWARFUnit *U) {
400   for (unsigned Operand = 0; Operand < Op.Desc.Op.size(); ++Operand) {
401     unsigned Size = Op.Desc.Op[Operand];
402 
403     if (Size == Operation::BaseTypeRef) {
404       // For DW_OP_convert the operand may be 0 to indicate that conversion to
405       // the generic type should be done, so don't look up a base type in that
406       // case. The same holds for DW_OP_reinterpret, which is currently not
407       // supported.
408       if (Op.Opcode == DW_OP_convert && Op.Operands[Operand] == 0)
409         continue;
410       auto Die = U->getDIEForOffset(U->getOffset() + Op.Operands[Operand]);
411       if (!Die || Die.getTag() != dwarf::DW_TAG_base_type)
412         return false;
413     }
414   }
415 
416   return true;
417 }
418 
419 bool DWARFExpression::verify(DWARFUnit *U) {
420   for (auto &Op : *this)
421     if (!Operation::verify(Op, U))
422       return false;
423 
424   return true;
425 }
426 
427 /// A user-facing string representation of a DWARF expression. This might be an
428 /// Address expression, in which case it will be implicitly dereferenced, or a
429 /// Value expression.
430 struct PrintedExpr {
431   enum ExprKind {
432     Address,
433     Value,
434   };
435   ExprKind Kind;
436   SmallString<16> String;
437 
438   PrintedExpr(ExprKind K = Address) : Kind(K) {}
439 };
440 
441 static bool printCompactDWARFExpr(
442     raw_ostream &OS, DWARFExpression::iterator I,
443     const DWARFExpression::iterator E,
444     std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg =
445         nullptr) {
446   SmallVector<PrintedExpr, 4> Stack;
447 
448   while (I != E) {
449     const DWARFExpression::Operation &Op = *I;
450     uint8_t Opcode = Op.getCode();
451     switch (Opcode) {
452     case dwarf::DW_OP_regx: {
453       // DW_OP_regx: A register, with the register num given as an operand.
454       // Printed as the plain register name.
455       uint64_t DwarfRegNum = Op.getRawOperand(0);
456       auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
457       if (RegName.empty())
458         return false;
459       raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);
460       S << RegName;
461       break;
462     }
463     case dwarf::DW_OP_bregx: {
464       int DwarfRegNum = Op.getRawOperand(0);
465       int64_t Offset = Op.getRawOperand(1);
466       auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
467       if (RegName.empty())
468         return false;
469       raw_svector_ostream S(Stack.emplace_back().String);
470       S << RegName;
471       if (Offset)
472         S << format("%+" PRId64, Offset);
473       break;
474     }
475     case dwarf::DW_OP_entry_value:
476     case dwarf::DW_OP_GNU_entry_value: {
477       // DW_OP_entry_value contains a sub-expression which must be rendered
478       // separately.
479       uint64_t SubExprLength = Op.getRawOperand(0);
480       DWARFExpression::iterator SubExprEnd = I.skipBytes(SubExprLength);
481       ++I;
482       raw_svector_ostream S(Stack.emplace_back().String);
483       S << "entry(";
484       printCompactDWARFExpr(S, I, SubExprEnd, GetNameForDWARFReg);
485       S << ")";
486       I = SubExprEnd;
487       continue;
488     }
489     case dwarf::DW_OP_stack_value: {
490       // The top stack entry should be treated as the actual value of tne
491       // variable, rather than the address of the variable in memory.
492       assert(!Stack.empty());
493       Stack.back().Kind = PrintedExpr::Value;
494       break;
495     }
496     case dwarf::DW_OP_nop: {
497       break;
498     }
499     case dwarf::DW_OP_LLVM_user: {
500       assert(Op.getSubCode() && *Op.getSubCode() == dwarf::DW_OP_LLVM_nop);
501       break;
502     }
503     default:
504       if (Opcode >= dwarf::DW_OP_reg0 && Opcode <= dwarf::DW_OP_reg31) {
505         // DW_OP_reg<N>: A register, with the register num implied by the
506         // opcode. Printed as the plain register name.
507         uint64_t DwarfRegNum = Opcode - dwarf::DW_OP_reg0;
508         auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
509         if (RegName.empty())
510           return false;
511         raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);
512         S << RegName;
513       } else if (Opcode >= dwarf::DW_OP_breg0 &&
514                  Opcode <= dwarf::DW_OP_breg31) {
515         int DwarfRegNum = Opcode - dwarf::DW_OP_breg0;
516         int64_t Offset = Op.getRawOperand(0);
517         auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
518         if (RegName.empty())
519           return false;
520         raw_svector_ostream S(Stack.emplace_back().String);
521         S << RegName;
522         if (Offset)
523           S << format("%+" PRId64, Offset);
524       } else {
525         // If we hit an unknown operand, we don't know its effect on the stack,
526         // so bail out on the whole expression.
527         OS << "<unknown op " << dwarf::OperationEncodingString(Opcode) << " ("
528            << (int)Opcode << ")>";
529         return false;
530       }
531       break;
532     }
533     ++I;
534   }
535 
536   if (Stack.size() != 1) {
537     OS << "<stack of size " << Stack.size() << ", expected 1>";
538     return false;
539   }
540 
541   if (Stack.front().Kind == PrintedExpr::Address)
542     OS << "[" << Stack.front().String << "]";
543   else
544     OS << Stack.front().String;
545 
546   return true;
547 }
548 
549 bool DWARFExpression::printCompact(
550     raw_ostream &OS,
551     std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg) {
552   return printCompactDWARFExpr(OS, begin(), end(), GetNameForDWARFReg);
553 }
554 
555 bool DWARFExpression::operator==(const DWARFExpression &RHS) const {
556   if (AddressSize != RHS.AddressSize || Format != RHS.Format)
557     return false;
558   return Data.getData() == RHS.Data.getData();
559 }
560 
561 } // namespace llvm
562