| /llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64TargetStreamer.h | 84 virtual void emitARM64WinCFISaveAnyRegI(unsigned Reg, in in emitARM64WinCFISaveAnyRegQX() argument
51 emitARM64WinCFISaveReg(unsigned Reg,int Offset) emitARM64WinCFISaveReg() argument
52 emitARM64WinCFISaveRegX(unsigned Reg,int Offset) emitARM64WinCFISaveRegX() argument
53 emitARM64WinCFISaveRegP(unsigned Reg,int Offset) emitARM64WinCFISaveRegP() argument
54 emitARM64WinCFISaveRegPX(unsigned Reg,int Offset) emitARM64WinCFISaveRegPX() argument
55 emitARM64WinCFISaveLRPair(unsigned Reg,int Offset) emitARM64WinCFISaveLRPair() argument
56 emitARM64WinCFISaveFReg(unsigned Reg,int Offset) emitARM64WinCFISaveFReg() argument
57 emitARM64WinCFISaveFRegX(unsigned Reg,int Offset) emitARM64WinCFISaveFRegX() argument
58 emitARM64WinCFISaveFRegP(unsigned Reg,int Offset) emitARM64WinCFISaveFRegP() argument
59 emitARM64WinCFISaveFRegPX(unsigned Reg,int Offset) emitARM64WinCFISaveFRegPX() argument
73 emitARM64WinCFISaveAnyRegI(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegI() argument
74 emitARM64WinCFISaveAnyRegIP(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegIP() argument
75 emitARM64WinCFISaveAnyRegD(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegD() argument
76 emitARM64WinCFISaveAnyRegDP(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegDP() argument
77 emitARM64WinCFISaveAnyRegQ(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegQ() argument
78 emitARM64WinCFISaveAnyRegQP(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegQP() argument
79 emitARM64WinCFISaveAnyRegIX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegIX() argument
80 emitARM64WinCFISaveAnyRegIPX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegIPX() argument
81 emitARM64WinCFISaveAnyRegDX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegDX() argument
82 emitARM64WinCFISaveAnyRegDPX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegDPX() argument
83 emitARM64WinCFISaveAnyRegQX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegQX() argument
[all...] |
| H A D | AArch64WinCOFFStreamer.cpp | 70 int Reg, int Offset) { in emitARM64WinUnwindCode() argument
103 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveReg(unsigned Reg, in emitARM64WinCFISaveReg() argument
110 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveRegX(unsigned Reg, in emitARM64WinCFISaveRegX() argument
115 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveRegP(unsigned Reg, in emitARM64WinCFISaveRegP() argument
120 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveRegPX(unsigned Reg, in emitARM64WinCFISaveRegPX() argument
125 emitARM64WinCFISaveLRPair(unsigned Reg,int Offset) emitARM64WinCFISaveLRPair() argument
130 emitARM64WinCFISaveFReg(unsigned Reg,int Offset) emitARM64WinCFISaveFReg() argument
137 emitARM64WinCFISaveFRegX(unsigned Reg,int Offset) emitARM64WinCFISaveFRegX() argument
142 emitARM64WinCFISaveFRegP(unsigned Reg,int Offset) emitARM64WinCFISaveFRegP() argument
147 emitARM64WinCFISaveFRegPX(unsigned Reg,int Offset) emitARM64WinCFISaveFRegPX() argument
234 emitARM64WinCFISaveAnyRegI(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegI() argument
239 emitARM64WinCFISaveAnyRegIP(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegIP() argument
244 emitARM64WinCFISaveAnyRegD(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegD() argument
249 emitARM64WinCFISaveAnyRegDP(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegDP() argument
254 emitARM64WinCFISaveAnyRegQ(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegQ() argument
259 emitARM64WinCFISaveAnyRegQP(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegQP() argument
264 emitARM64WinCFISaveAnyRegIX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegIX() argument
269 emitARM64WinCFISaveAnyRegIPX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegIPX() argument
274 emitARM64WinCFISaveAnyRegDX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegDX() argument
279 emitARM64WinCFISaveAnyRegDPX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegDPX() argument
284 emitARM64WinCFISaveAnyRegQX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegQX() argument
289 emitARM64WinCFISaveAnyRegQPX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegQPX() argument
[all...] |
| H A D | AArch64ELFStreamer.cpp | 68 emitARM64WinCFISaveReg(unsigned Reg,int Offset) emitARM64WinCFISaveReg() argument
71 emitARM64WinCFISaveRegX(unsigned Reg,int Offset) emitARM64WinCFISaveRegX() argument
74 emitARM64WinCFISaveRegP(unsigned Reg,int Offset) emitARM64WinCFISaveRegP() argument
77 emitARM64WinCFISaveRegPX(unsigned Reg,int Offset) emitARM64WinCFISaveRegPX() argument
80 emitARM64WinCFISaveLRPair(unsigned Reg,int Offset) emitARM64WinCFISaveLRPair() argument
83 emitARM64WinCFISaveFReg(unsigned Reg,int Offset) emitARM64WinCFISaveFReg() argument
86 emitARM64WinCFISaveFRegX(unsigned Reg,int Offset) emitARM64WinCFISaveFRegX() argument
89 emitARM64WinCFISaveFRegP(unsigned Reg,int Offset) emitARM64WinCFISaveFRegP() argument
92 emitARM64WinCFISaveFRegPX(unsigned Reg,int Offset) emitARM64WinCFISaveFRegPX() argument
115 emitARM64WinCFISaveAnyRegI(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegI() argument
118 emitARM64WinCFISaveAnyRegIP(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegIP() argument
121 emitARM64WinCFISaveAnyRegD(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegD() argument
124 emitARM64WinCFISaveAnyRegDP(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegDP() argument
127 emitARM64WinCFISaveAnyRegQ(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegQ() argument
130 emitARM64WinCFISaveAnyRegQP(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegQP() argument
133 emitARM64WinCFISaveAnyRegIX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegIX() argument
136 emitARM64WinCFISaveAnyRegIPX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegIPX() argument
139 emitARM64WinCFISaveAnyRegDX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegDX() argument
142 emitARM64WinCFISaveAnyRegDPX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegDPX() argument
145 emitARM64WinCFISaveAnyRegQX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegQX() argument
148 emitARM64WinCFISaveAnyRegQPX(unsigned Reg,int Offset) emitARM64WinCFISaveAnyRegQPX() argument
[all...] |
| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | Register.h | 20 unsigned Reg; variable
23 constexpr Register(unsigned Val = 0) : Reg(Val) {} in Reg() function
44 static constexpr bool isStackSlot(unsigned Reg) { in isStackSlot() argument
52 static int stackSlot2Index(Register Reg) { in stackSlot2Index() argument
65 isPhysicalRegister(unsigned Reg) isPhysicalRegister() argument
71 isVirtualRegister(unsigned Reg) isVirtualRegister() argument
77 virtReg2Index(Register Reg) virtReg2Index() argument
[all...] |
| H A D | MachineRegisterInfo.h | 177 void noteNewVirtualRegister(Register Reg) { in noteNewVirtualRegister() argument
300 reg_operands(Register Reg) reg_operands() argument
316 reg_instructions(Register Reg) reg_instructions() argument
331 reg_bundles(Register Reg) reg_bundles() argument
351 reg_nodbg_operands(Register Reg) reg_nodbg_operands() argument
368 reg_nodbg_instructions(Register Reg) reg_nodbg_instructions() argument
385 reg_nodbg_bundles(Register Reg) reg_nodbg_bundles() argument
403 def_operands(Register Reg) def_operands() argument
419 def_instructions(Register Reg) def_instructions() argument
434 def_bundles(Register Reg) def_bundles() argument
442 getVRegName(Register Reg) getVRegName() argument
446 insertVRegByName(StringRef Name,Register Reg) insertVRegByName() argument
464 getOneDef(Register Reg) getOneDef() argument
483 use_operands(Register Reg) use_operands() argument
499 use_instructions(Register Reg) use_instructions() argument
514 use_bundles(Register Reg) use_bundles() argument
540 use_nodbg_operands(Register Reg) use_nodbg_operands() argument
557 use_nodbg_instructions(Register Reg) use_nodbg_instructions() argument
574 use_nodbg_bundles(Register Reg) use_nodbg_bundles() argument
653 getRegClass(Register Reg) getRegClass() argument
670 getRegClassOrNull(Register Reg) getRegClassOrNull() argument
679 getRegBankOrNull(Register Reg) getRegBankOrNull() argument
687 getRegClassOrRegBank(Register Reg) getRegClassOrRegBank() argument
697 setRegClassOrRegBank(Register Reg,const RegClassOrRegBank & RCOrRB) setRegClassOrRegBank() argument
755 getVRegAttrs(Register Reg) getVRegAttrs() argument
769 getType(Register Reg) getType() argument
[all...] |
| H A D | LiveRegUnits.h | 56 Register Reg = O->getReg(); in accumulateUsedDefed() local
86 void addReg(MCPhysReg Reg) { in addReg()
93 void addRegMasked(MCPhysReg Reg, LaneBitmask Mask) { in addRegMasked()
102 void removeReg(MCPhysReg Reg) { in removeReg()
116 bool available(MCPhysReg Reg) const { in available()
|
| H A D | LiveIntervals.h | 145 return VirtRegIntervals.inBounds(Reg.id()) && VirtRegIntervals[Reg.id()]; in getOrCreateEmptyInterval() argument
112 getInterval(Register Reg) getInterval() argument
119 getInterval(Register Reg) getInterval() argument
123 hasInterval(Register Reg) hasInterval() argument
129 createEmptyInterval(Register Reg) createEmptyInterval() argument
136 createAndComputeVirtRegInterval(Register Reg) createAndComputeVirtRegInterval() argument
150 removeInterval(Register Reg) removeInterval() argument
426 removeAllRegUnitsForPhysReg(MCRegister Reg) removeAllRegUnitsForPhysReg() argument
[all...] |
| H A D | LiveVariables.h | 209 removeVirtualRegisterKilled(Register Reg,MachineInstr & MI) removeVirtualRegisterKilled() argument
244 removeVirtualRegisterDead(Register Reg,MachineInstr & MI) removeVirtualRegisterDead() argument
280 isLiveIn(Register Reg,const MachineBasicBlock & MBB) isLiveIn() argument
[all...] |
| /llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegister.h | 35 unsigned Reg; variable
38 constexpr MCRegister(unsigned Val = 0) : Reg(Val) {} in Reg() function
61 static constexpr bool isStackSlot(unsigned Reg) { in isStackSlot() argument
67 static constexpr bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister() argument
[all...] |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 46 isARMArea1Register(unsigned Reg,bool SplitFramePushPop) isARMArea1Register() argument
62 isARMArea2Register(unsigned Reg,bool SplitFramePushPop) isARMArea2Register() argument
74 isSplitFPArea1Register(unsigned Reg,bool SplitFramePushPop) isSplitFPArea1Register() argument
89 isSplitFPArea2Register(unsigned Reg,bool SplitFramePushPop) isSplitFPArea2Register() argument
101 isARMArea3Register(unsigned Reg,bool SplitFramePushPop) isARMArea3Register() argument
119 isCalleeSavedRegister(unsigned Reg,const MCPhysReg * CSRegs) isCalleeSavedRegister() argument
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIProgramInfo.cpp | 80 uint64_t Reg = S_00B848_PRIORITY(ProgInfo.Priority) | in getComputePGMRSrc1Reg() local
101 uint64_t Reg = S_00B848_PRIORITY(ProgInfo.Priority) | in getPGMRSrc1Reg() local
137 uint64_t Reg = S_00B84C_USER_SGPR(ProgInfo.UserSGPR) | in getComputePGMRSrc2Reg() local
166 uint64_t Reg = getComputePGMRSrc1Reg(*this, ST); in getComputePGMRSrc1() local
181 uint64_t Reg = getPGMRSrc1Reg(*this, CC, ST); in getPGMRSrc1() local
190 uint64_t Reg = getComputePGMRSrc2Reg(*this); in getComputePGMRSrc2() local
|
| /llvm-project/llvm/lib/CodeGen/ |
| H A D | AggressiveAntiDepBreaker.cpp | 70 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup() argument
83 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
104 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) { in LeaveGroup() argument
114 IsLive(unsigned Reg) IsLive() argument
158 unsigned Reg = *AI; StartBlock() local
172 unsigned Reg = *I; StartBlock() local
203 for (unsigned Reg = 1; Reg != TRI->getNumRegs(); ++Reg) { Observe() local
228 Register Reg = MO.getReg(); IsImplicitDefUse() local
248 const Register Reg = MO.getReg(); GetPassthruRegs() local
291 HandleLastUse(unsigned Reg,unsigned KillIdx,const char * tag,const char * header,const char * footer) HandleLastUse() argument
355 Register Reg = MO.getReg(); PrescanInstruction() local
365 Register Reg = MO.getReg(); PrescanInstruction() local
407 Register Reg = MO.getReg(); PrescanInstruction() local
460 Register Reg = MO.getReg(); ScanInstruction() local
494 Register Reg = MO.getReg(); ScanInstruction() local
510 GetRenameRegisters(unsigned Reg) GetRenameRegisters() argument
557 for (unsigned Reg : Regs) { FindSuitableFreeRegisters() local
576 for (unsigned Reg : Regs) { FindSuitableFreeRegisters() local
637 for (unsigned Reg : Regs) { FindSuitableFreeRegisters() local
772 for (unsigned Reg = 1; Reg < TRI->getNumRegs(); ++Reg) { BreakAntiDependencies() local
[all...] |
| H A D | MIRVRegNamerUtils.h | 36 Register Reg; variable
40 NamedVReg(Register Reg, std::string Name = "") : Reg(Reg), Name(Name) {} in Reg() function
|
| H A D | MachineRegisterInfo.cpp | 86 if (Reg.isPhysical()) in constrainRegClass() argument
59 setRegClass(Register Reg,const TargetRegisterClass * RC) setRegClass() argument
64 setRegBank(Register Reg,const RegisterBank & RegBank) setRegBank() argument
70 constrainRegClass(MachineRegisterInfo & MRI,Register Reg,const TargetRegisterClass * OldRC,const TargetRegisterClass * RC,unsigned MinNumRegs) constrainRegClass() argument
93 constrainRegAttrs(Register Reg,Register ConstrainingReg,unsigned MinNumRegs) constrainRegAttrs() argument
123 recomputeRegClass(Register Reg) recomputeRegClass() argument
148 Register Reg = Register::index2VirtReg(getNumVirtRegs()); createIncompleteVirtualRegister() local
166 Register Reg = createIncompleteVirtualRegister(Name); createVirtualRegister() local
174 Register Reg = createIncompleteVirtualRegister(Name); createVirtualRegister() local
183 Register Reg = createIncompleteVirtualRegister(Name); cloneVirtualRegister() local
198 Register Reg = createIncompleteVirtualRegister(Name); createGenericVirtualRegister() local
212 Register Reg = Register::index2VirtReg(i); clearVirtRegs() local
436 hasAtMostUserInstrs(Register Reg,unsigned MaxUsers) const hasAtMostUserInstrs() argument
613 disableCalleeSavedRegister(MCRegister Reg) disableCalleeSavedRegister() argument
[all...] |
| H A D | LiveVariables.cpp | 84 getVarInfo(Register Reg) getVarInfo() argument
127 HandleVirtRegUse(Register Reg,MachineBasicBlock * MBB,MachineInstr & MI) HandleVirtRegUse() argument
178 HandleVirtRegDef(Register Reg,MachineInstr & MI) HandleVirtRegDef() argument
189 FindLastPartialDef(Register Reg,SmallSet<unsigned,4> & PartDefRegs) FindLastPartialDef() argument
225 HandlePhysRegUse(Register Reg,MachineInstr & MI) HandlePhysRegUse() argument
273 FindLastRefOrPartRef(Register Reg) FindLastRefOrPartRef() argument
302 HandlePhysRegKill(Register Reg,MachineInstr * MI) HandlePhysRegKill() argument
414 for (unsigned Reg = 1; Reg != NumRegs; ++Reg) { HandleRegMask() local
432 HandlePhysRegDef(Register Reg,MachineInstr * MI,SmallVectorImpl<unsigned> & Defs) HandlePhysRegDef() argument
474 Register Reg = Defs.pop_back_val(); UpdatePhysRegDefs() local
633 const Register Reg = Register::index2VirtReg(i); runOnMachineFunction() local
656 recomputeForSingleDefVirtReg(Register Reg) recomputeForSingleDefVirtReg() argument
742 replaceKillInstruction(Register Reg,MachineInstr & OldMI,MachineInstr & NewMI) replaceKillInstruction() argument
754 Register Reg = MO.getReg(); removeVirtualRegistersKilled() local
781 isLiveIn(const MachineBasicBlock & MBB,Register Reg,MachineRegisterInfo & MRI) isLiveIn() argument
797 isLiveOut(Register Reg,const MachineBasicBlock & MBB) isLiveOut() argument
854 Register Reg = Register::index2VirtReg(i); addNewBlock() local
[all...] |
| H A D | CriticalAntiDepBreaker.cpp | 70 unsigned Reg = (*AI).id(); in StartBlock() local
84 unsigned Reg = *I; in StartBlock() local
88 unsigned Reg = (*AI).id(); in StartBlock() local
114 for (unsigned Reg = 1; Reg != TRI->getNumRegs(); ++Reg) { Observe() local
184 Register Reg = MO.getReg(); PrescanInstruction() local
225 Register Reg = MO.getReg(); PrescanInstruction() local
280 Register Reg = MO.getReg(); ScanInstruction() local
310 Register Reg = MO.getReg(); ScanInstruction() local
466 for (unsigned Reg = 1; Reg < TRI->getNumRegs(); ++Reg) { BreakAntiDependencies() local
614 Register Reg = MO.getReg(); BreakAntiDependencies() local
[all...] |
| H A D | MachineInstrBundle.cpp | 159 Register Reg = MO.getReg(); in finalizeBundle() local
181 Register Reg = MO->getReg(); in finalizeBundle() local
210 for (Register Reg : LocalDefs) { in finalizeBundle() local
219 for (Register Reg : ExternUses) { in finalizeBundle() local
278 MachineInstr &MI, Register Reg, in AnalyzeVirtRegInBundle()
308 llvm::AnalyzeVirtRegLanesInBundle(const MachineInstr &MI, Register Reg, in AnalyzeVirtRegLanesInBundle()
334 PhysRegInfo llvm::AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg, in AnalyzePhysRegInBundle()
|
| H A D | RegAllocBase.cpp | 76 Register Reg = Register::index2VirtReg(i); seedLiveRegs() local
144 for (Register Reg : SplitVRegs) { allocatePhysRegs() local
175 const Register Reg = LI->reg(); enqueue() local
[all...] |
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVectorPrint.cpp | 73 static bool isVecReg(unsigned Reg) { in isVecReg()
96 static void addAsmInstr(MachineBasicBlock *MBB, unsigned Reg, in addAsmInstr()
108 static bool getInstrVecReg(const MachineInstr &MI, unsigned &Reg) { in getInstrVecReg()
144 unsigned Reg = 0; in runOnMachineFunction() local
152 unsigned Reg = 0; in runOnMachineFunction() local
168 unsigned Reg = 0; in runOnMachineFunction() local
|
| /llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCTargetDesc.h | 60 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64()
65 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32()
70 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32()
75 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128()
|
| /llvm-project/llvm/unittests/tools/llvm-exegesis/X86/ |
| H A D | TargetTest.cpp | 73 IsReg(unsigned Reg) IsReg() argument
82 IsMovImmediate(unsigned Opcode,int64_t Reg,int64_t Value) IsMovImmediate() argument
99 IsMovValueFromStack(unsigned Opcode,unsigned Reg) IsMovValueFromStack() argument
129 setRegTo(unsigned Reg,const APInt & Value) setRegTo() argument
176 const unsigned Reg = X86::EFLAGS; TEST_F() local
186 const unsigned Reg = X86::AL; TEST_F() local
193 const unsigned Reg = X86::BX; TEST_F() local
200 const unsigned Reg = X86::ECX; TEST_F() local
207 const unsigned Reg = X86::RDX; TEST_F() local
322 const unsigned Reg = X86::K0; TEST_F() local
333 const unsigned Reg = X86::K0; TEST_F() local
344 const unsigned Reg = X86::K0; TEST_F() local
355 const unsigned Reg = X86::K0; TEST_F() local
366 const unsigned Reg = X86::K0; TEST_F() local
380 const unsigned Reg = X86::K0; TEST_F() local
391 const unsigned Reg = X86::K0; TEST_F() local
405 const unsigned Reg = X86::K0; TEST_F() local
416 const unsigned Reg = X86::K0; TEST_F() local
423 const unsigned Reg = X86::K0; TEST_F() local
430 const unsigned Reg = X86::K0; TEST_F() local
441 const unsigned Reg = X86::K0; TEST_F() local
452 const unsigned Reg = X86::K0; TEST_F() local
459 const unsigned Reg = X86::K0; TEST_F() local
466 const unsigned Reg = X86::K0; TEST_F() local
478 const unsigned Reg = X86::K0; TEST_F() local
[all...] |
| /llvm-project/llvm/unittests/tools/llvm-exegesis/Mips/ |
| H A D | TargetTest.cpp | 36 Matcher<MCOperand> IsReg(unsigned Reg) { in IsReg()
45 Matcher<MCInst> IsLoadLow16BitImm(unsigned Reg, int64_t Value, bool IsGPR32) { in IsLoadLow16BitImm()
52 Matcher<MCInst> IsLoadHigh16BitImm(unsigned Reg, int64_t Value, bool IsGPR32) { in IsLoadHigh16BitImm()
57 Matcher<MCInst> IsShift(unsigned Reg, uint16_t Amount, bool IsGPR32) { in IsShift()
65 std::vector<MCInst> setRegTo(unsigned Reg, const APInt &Value) { in setRegTo()
73 const unsigned Reg = Mips::T0; in TEST_F() local
80 const unsigned Reg = Mips::T0_64; in TEST_F() local
|
| /llvm-project/clang-tools-extra/test/clang-tidy/checkers/llvm/ |
| H A D | prefer-register-over-unsigned2.cpp | 15 unsigned Reg = getReg(); in apply_1() local
22 llvm::Register Reg = getReg(); in done_1() local
|
| /llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 60 unsigned Reg; global() member
81 setReg(unsigned Reg) setReg() argument
294 Register Reg = getRegForValue(Op); computeAddress() local
380 Register Reg = getRegForValue(Obj); computeAddress() local
389 unsigned Reg = Addr.getReg(); materializeLoadStoreOperands() local
422 maskI1Value(unsigned Reg,const Value * V) maskI1Value() argument
438 Register Reg = getRegForValue(V); getRegForI1Value() local
444 zeroExtendToI32(unsigned Reg,const Value * V,MVT::SimpleValueType From) zeroExtendToI32() argument
480 signExtendToI32(unsigned Reg,const Value * V,MVT::SimpleValueType From) signExtendToI32() argument
516 zeroExtend(unsigned Reg,const Value * V,MVT::SimpleValueType From,MVT::SimpleValueType To) zeroExtend() argument
538 signExtend(unsigned Reg,const Value * V,MVT::SimpleValueType From,MVT::SimpleValueType To) signExtend() argument
587 notValue(unsigned Reg) notValue() argument
597 copyValue(unsigned Reg) copyValue() argument
855 unsigned Reg; selectCall() local
983 Register Reg = getRegForValue(Trunc->getOperand(0)); selectTrunc() local
1008 unsigned Reg = zeroExtend(In, Op, From, To); selectZExt() local
1025 unsigned Reg = signExtend(In, Op, From, To); selectSExt() local
1178 Register Reg = fastEmit_ISD_BITCAST_r(VT.getSimpleVT(), RetVT.getSimpleVT(), selectBitCast() local
1379 unsigned Reg; selectRet() local
[all...] |
| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsOptimizePICCall.cpp | 136 static MVT::SimpleValueType getRegTy(unsigned Reg, MachineFunction &MF) { in getRegTy()
167 unsigned Reg = Ty == MVT::i32 ? Mips::GP : Mips::GP_64; in eraseGPOpnd() local
233 unsigned Reg; in visitNode() local
265 bool OptimizePICCall::isCallViaRegister(MachineInstr &MI, unsigned &Reg, in isCallViaRegister()
307 unsigned Reg = ScopedHT.lookup(Entry).second; in getReg() local
312 void OptimizePICCall::incCntAndSetReg(ValueType Entry, unsigned Reg) { in incCntAndSetReg()
|