/llvm-project/llvm/lib/Target/BPF/GISel/ |
H A D | BPFInstructionSelector.cpp | 48 const BPFRegisterBankInfo &RBI; global() member in __anon7a90a6be0111::BPFInstructionSelector 67 BPFInstructionSelector(const BPFTargetMachine & TM,const BPFSubtarget & STI,const BPFRegisterBankInfo & RBI) BPFInstructionSelector() argument 90 createBPFInstructionSelector(const BPFTargetMachine & TM,const BPFSubtarget & Subtarget,const BPFRegisterBankInfo & RBI) createBPFInstructionSelector() argument
|
/llvm-project/llvm/lib/Target/M68k/GISel/ |
H A D | M68kInstructionSelector.cpp | 40 const M68kRegisterBankInfo &RBI; member in __anonea4b641a0111::M68kInstructionSelector 59 const M68kRegisterBankInfo &RBI) in M68kInstructionSelector() 87 const M68kRegisterBankInfo &RBI) { in createM68kInstructionSelector()
|
/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 76 const ARMRegisterBankInfo &RBI; member in __anon4a65c32b0111::ARMInstructionSelector 164 const ARMRegisterBankInfo &RBI) { in createARMInstructionSelector() argument 175 const ARMRegisterBankInfo &RBI) in ARMInstructionSelector() argument 190 const RegisterBankInfo &RBI) { in guessRegClass() argument 215 const RegisterBankInfo &RBI) { in selectCopy() argument 237 selectMergeValues(MachineInstrBuilder & MIB,const ARMBaseInstrInfo & TII,MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI,const RegisterBankInfo & RBI) selectMergeValues() argument 268 selectUnmergeValues(MachineInstrBuilder & MIB,const ARMBaseInstrInfo & TII,MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI,const RegisterBankInfo & RBI) selectUnmergeValues() argument [all...] |
H A D | ARMSubtarget.cpp | 109 auto *RBI = new ARMRegisterBankInfo(*getRegisterInfo()); in ARMSubtarget() local
|
/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCInstructionSelector.cpp | 72 const PPCRegisterBankInfo &RBI; member in __anonac2b2f710111::PPCInstructionSelector 91 const PPCRegisterBankInfo &RBI) in PPCInstructionSelector() 132 const RegisterBankInfo &RBI) { in selectCopy() 786 const PPCRegisterBankInfo &RBI) { in createPPCInstructionSelector()
|
/llvm-project/llvm/lib/CodeGen/ |
H A D | RegisterBank.cpp | 23 bool RegisterBank::verify(const RegisterBankInfo &RBI, in verify()
|
H A D | MachineUniformityAnalysis.cpp | 35 const auto &RBI = *F.getSubtarget().getRegBankInfo(); in markDefsDivergent() local
|
H A D | RegisterBankInfo.cpp | 615 (void)RBI; in verify() local 556 verify(const RegisterBankInfo & RBI,TypeSize MeaningfulBitWidth) const verify() argument
|
/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFSubtarget.cpp | 105 auto *RBI = new BPFRegisterBankInfo(*getRegisterInfo()); BPFSubtarget() local
|
/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructionSelector.h | 364 const AMDGPURegisterBankInfo &RBI; global() variable
|
/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kSubtarget.cpp | 60 auto *RBI = new M68kRegisterBankInfo(*getRegisterInfo()); in M68kSubtarget() local
|
/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSubtarget.cpp | 218 auto *RBI = new MipsRegisterBankInfo(*getRegisterInfo()); MipsSubtarget() local
|
H A D | MipsInstructionSelector.cpp | 63 const MipsRegisterBankInfo &RBI; member in __anon2ab1d11d0111::MipsInstructionSelector 82 const MipsRegisterBankInfo &RBI) in MipsInstructionSelector() argument 932 createMipsInstructionSelector(const MipsTargetMachine & TM,MipsSubtarget & Subtarget,MipsRegisterBankInfo & RBI) createMipsInstructionSelector() argument [all...] |
/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVSubtarget.cpp | 104 auto *RBI = new RISCVRegisterBankInfo(getHwMode()); RISCVSubtarget() local
|
/llvm-project/llvm/lib/Target/X86/ |
H A D | X86Subtarget.cpp | 353 auto *RBI = new X86RegisterBankInfo(*getRegisterInfo()); X86Subtarget() local
|
/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCSubtarget.cpp | 65 auto *RBI = new PPCRegisterBankInfo(*getRegisterInfo()); PPCSubtarget() local
|
/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostSelectOptimize.cpp | 260 auto RBI = Subtarget.getRegBankInfo(); in optimizeNZCVDefs() local
|
/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64Subtarget.cpp | 343 auto *RBI = new AArch64RegisterBankInfo(*getRegisterInfo()); AArch64Subtarget() local
|
/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | CombinerHelper.h | 112 const RegisterBankInfo *RBI; global() variable
|
H A D | RegBankSelect.h | 487 const RegisterBankInfo *RBI = nullptr; variable
|
/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | MergedLoadStoreMotion.cpp | 322 for (BasicBlock::reverse_iterator RBI = Pred0->rbegin(), RBE = Pred0->rend(); mergeStores() local
|
/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVInstructionSelector.cpp | 121 const RISCVRegisterBankInfo &RBI; global() member in __anond181915c0111::RISCVInstructionSelector 146 RISCVInstructionSelector(const RISCVTargetMachine & TM,const RISCVSubtarget & STI,const RISCVRegisterBankInfo & RBI) RISCVInstructionSelector() argument 1334 createRISCVInstructionSelector(const RISCVTargetMachine & TM,RISCVSubtarget & Subtarget,RISCVRegisterBankInfo & RBI) createRISCVInstructionSelector() argument [all...] |
/llvm-project/llvm/tools/bugpoint/ |
H A D | ExtractFunction.cpp | 96 Function::iterator RBI = RFI->begin(); // Get iterator to corresponding BB in deleteInstructionFromProgram() local
|
/llvm-project/llvm/lib/Target/X86/GISel/ |
H A D | X86InstructionSelector.cpp | 138 const X86RegisterBankInfo &RBI; global() member in __anon935db59a0111::X86InstructionSelector 157 X86InstructionSelector(const X86TargetMachine & TM,const X86Subtarget & STI,const X86RegisterBankInfo & RBI) X86InstructionSelector() argument 1857 createX86InstructionSelector(const X86TargetMachine & TM,X86Subtarget & Subtarget,X86RegisterBankInfo & RBI) createX86InstructionSelector() argument [all...] |
/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | Utils.cpp | 48 const RegisterBankInfo &RBI, Register Reg, in constrainRegToClass() argument 59 const RegisterBankInfo &RBI, MachineInstr &InsertPt, in constrainOperandRegClass() argument 111 const RegisterBankInfo &RBI, MachineInstr &InsertPt, const MCInstrDesc &II, in constrainOperandRegClass() argument 158 const RegisterBankInfo &RBI) { in constrainSelectedInstRegOperands() argument
|