/llvm-project/llvm/lib/Target/Xtensa/ |
H A D | XtensaISelLowering.cpp | 292 SmallVector<SDValue, 32> &OutVals = CLI.OutVals; LowerCall() local 475 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
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/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 268 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; in LowerCall() local 647 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
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/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.cpp | 409 auto &OutVals = CLI.OutVals; LowerCall() local 538 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
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/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | FastISel.h | 94 SmallVector<Value *, 16> OutVals; member
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H A D | TargetLowering.h | 4537 SmallVector<SDValue, 32> OutVals; global() member
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/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 591 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 738 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument 808 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
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/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 412 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 544 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument 606 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool IsVarArg,bool,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
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/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 945 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; in LowerCall() local 1019 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument 1343 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
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/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLoweringCall.cpp | 738 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument 1997 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 2735 const SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; IsEligibleForTailCallOptimization() local [all...] |
H A D | X86FastISel.cpp | 3206 auto &OutVals = CLI.OutVals; fastLowerCall() local
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/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYISelLowering.cpp | 439 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument 510 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local
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/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 827 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; in LowerCall_32() local 248 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument 259 LowerReturn_32(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn_32() argument 344 LowerReturn_64(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn_64() argument [all...] |
/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 1488 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 1711 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
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/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 204 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument 353 LowerCallResult(SDValue Chain,SDValue Glue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,const SmallVectorImpl<SDValue> & OutVals,SDValue Callee) const LowerCallResult() argument 408 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 3735 IsEligibleForTailCallOptimization(SDValue Callee,CallingConv::ID CalleeCC,bool IsVarArg,bool IsCalleeStructRet,bool IsCallerStructRet,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,SelectionDAG & DAG) const IsEligibleForTailCallOptimization() argument
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/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 525 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; in LowerCall() local 1074 const SmallVectorImpl<SDValue> &OutVals, in LowerReturn() argument 1227 const SmallVectorImpl<SDValue> &OutVals, in IsEligibleForTailCallOptimization() argument [all...] |
/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 1091 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 1311 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument [all...] |
/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelLowering.cpp | 4184 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 4451 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
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/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 1642 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 3390 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
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/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 3195 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 3847 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
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/llvm-project/llvm/lib/Target/VE/ |
H A D | VEISelLowering.cpp | 370 const SmallVectorImpl<SDValue> &OutVals, in LowerReturn() argument
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/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 5907 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 5982 LowerCall_32SVR4(SDValue Chain,SDValue Callee,CallFlags CFlags,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,const CallBase * CB) const LowerCall_32SVR4() argument 6236 LowerCall_64SVR4(SDValue Chain,SDValue Callee,CallFlags CFlags,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,const CallBase * CB) const LowerCall_64SVR4() argument 7498 LowerCall_AIX(SDValue Chain,SDValue Callee,CallFlags CFlags,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,const CallBase * CB) const LowerCall_AIX() argument 7833 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument [all...] |
/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 1901 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 2175 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
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/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 3148 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument 3513 isEligibleForTailCallOptimization(SDValue Callee,CallingConv::ID CalleeCC,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,SelectionDAG & DAG) const isEligibleForTailCallOptimization() argument 3634 SmallVector<SDValue, 32> &OutVals = CLI.OutVals; LowerCall() local [all...] |
H A D | AMDGPUISelLowering.cpp | 1274 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
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/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 2385 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; LowerCall() local 3032 const SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; IsEligibleForTailCallOptimization() local 3210 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument [all...] |