| /llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 1258 RegSubRegPair NewSrc = getNewSource(MRI, TII, TrackPair, RewriteMap, optimizeCoalescableCopy() local
1290 RegSubRegPair NewSrc = getNewSource(MRI, TII, Def, RewriteMap); rewriteSource() local
[all...] |
| /llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | SeparateConstOffsetFromGEP.cpp | 1005 Value *NewSrc = Builder.CreateGEP( in reorderGEP() local
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| H A D | LICM.cpp | 2519 Value *NewSrc = Builder.CreateGEP(GEP->getSourceElementType(), SrcPtr, hoistGEP() local
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1286 SDValue NewSrc = SimplifyMultipleUseDemandedBits( SimplifyDemandedBits() local
2459 if (SDValue NewSrc = SimplifyMultipleUseDemandedBits( SimplifyDemandedBits() local
2522 if (SDValue NewSrc = SimplifyMultipleUseDemandedBits( SimplifyDemandedBits() local
2553 if (SDValue NewSrc = SimplifyMultipleUseDemandedBits( SimplifyDemandedBits() local
2571 if (SDValue NewSrc = SimplifyMultipleUseDemandedBits( SimplifyDemandedBits() local
3327 SDValue NewSrc = SimplifyMultipleUseDemandedVectorElts( SimplifyDemandedVectorElts() local
3359 SDValue NewSrc = SimplifyMultipleUseDemandedVectorElts( SimplifyDemandedVectorElts() local
[all...] |
| H A D | LegalizeVectorTypes.cpp | 2550 SDValue NewSrc = SplitVecRes_ExtendOp() local
2561 SDValue NewSrc = SplitVecRes_ExtendOp() local
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| /llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 1981 SDValue NewSrc = DAG.getNode(ISD::ANY_EXTEND, DL, GRLenVT, Src); ReplaceNodeResults() local
2003 SDValue NewSrc = DAG.getNode(ISD::ANY_EXTEND, DL, GRLenVT, Src); ReplaceNodeResults() local
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| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2081 Register NewSrc = Copy.getReg(0); preISelLower() local
2107 auto NewSrc = MIB.buildCopy(LLT::scalar(64), I.getOperand(1).getReg()); preISelLower() local
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| /llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenDAGPatterns.cpp | 4409 TreePatternNodePtr NewSrc = P.getSrcPattern().clone(); ExpandHwModeBasedTypes() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 1161 classifyLEAReg(MachineInstr & MI,const MachineOperand & Src,unsigned Opc,bool AllowSP,Register & NewSrc,bool & isKill,MachineOperand & ImplicitOp,LiveVariables * LV,LiveIntervals * LIS) const classifyLEAReg() argument
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| H A D | X86ISelLowering.cpp | 10153 SDValue NewSrc = widenSubVector(Src, ZeroUppers, Subtarget, DAG, DL, 512); getAVX512TruncNode() local
41947 if (SDValue NewSrc = SimplifyMultipleUseDemandedVectorElts( SimplifyDemandedVectorEltsForTargetNode() local
42302 if (SDValue NewSrc = SimplifyMultipleUseDemandedVectorElts( SimplifyDemandedVectorEltsForTargetNode() local
42934 SDValue NewSrc = SimplifyDemandedBitsForTargetNode() local
42963 SDValue NewSrc = extract128BitVector(Src, 0, TLO.DAG, SDLoc(Src)); SimplifyDemandedBitsForTargetNode() local
42990 if (SDValue NewSrc = SimplifyMultipleUseDemandedBits( SimplifyDemandedBitsForTargetNode() local
54455 SDValue NewSrc = DAG.getBitcast(SrcVT, SrcBC.getOperand(0)); combineMOVMSK() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 4113 auto *NewSrc = OldToNewSrcMap[MRI.getVRegDef(MO.getReg())]; applyExtendThroughPhis() local
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