/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineLoadStoreAlloca.cpp | 562 LoadInst *NewLoad = combineLoadToNewType() local 675 LoadInst *NewLoad = IC.combineLoadToNewType(Load, DestTy); combineLoadToOperationType() local 704 LoadInst *NewLoad = IC.combineLoadToNewType(LI, ST->getTypeAtIndex(0U), unpackLoadToAggregate() local 752 LoadInst *NewLoad = IC.combineLoadToNewType(LI, ET, ".unpack"); unpackLoadToAggregate() local [all...] |
/llvm-project/llvm/lib/FuzzMutate/ |
H A D | RandomIRBuilder.cpp | 216 auto *NewLoad = new LoadInst(AccessTy, Ptr, "L", IP); in newSource() local
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/llvm-project/llvm/lib/Target/X86/ |
H A D | X86AvoidStoreForwardingBlocks.cpp | 393 MachineInstr *NewLoad = buildCopy() local
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H A D | X86InterleavedAccess.cpp | 220 Instruction *NewLoad = decompose() local
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/llvm-project/llvm/lib/CodeGen/ |
H A D | ExpandVectorPredication.cpp | 601 LoadInst *NewLoad = expandPredicationInMemoryIntrinsic() local
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/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | AggressiveInstCombine.cpp | 787 LoadInst *NewLoad = nullptr, *LI1 = LOps.Root; foldConsecutiveLoads() local
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/llvm-project/polly/lib/CodeGen/ |
H A D | BlockGenerators.cpp | 352 Value *NewLoad = generateArrayLoad(Stmt, Load, BBMap, LTS, NewAccesses); copyInstruction() local
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/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64LegalizerInfo.cpp | 1779 auto NewLoad = MIRBuilder.buildLoad(NewTy, MI.getOperand(1), MMO); legalizeLoadStore() local
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/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 1383 SDValue Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, NewLoad, in LowerLOAD() local
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H A D | AMDGPUISelLowering.cpp | 3845 SDValue NewLoad performLoadCombine() local
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/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | GVN.cpp | 1480 auto *NewLoad = new LoadInst( eliminatePartiallyRedundantLoad() local [all...] |
H A D | LowerMatrixIntrinsics.cpp | 1476 auto *NewLoad = Builder.CreateLoad(Op->getType(), Arg); lowerDotProduct() local
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/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | VectorCombine.cpp | 1386 auto *NewLoad = cast<LoadInst>(Builder.CreateLoad( scalarizeLoadExtract() local
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H A D | LoopVectorize.cpp | 2525 Instruction *NewLoad; vectorizeInterleaveGroup() local
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/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 6707 SDValue NewLoad = reduceLoadWidth(And.getNode()); BackwardsPropagateMask() local 7004 SDValue NewLoad = DAG.getMaskedLoad( visitAND() local 7167 SDValue NewLoad(Load, 0); visitAND() local 9281 SDValue NewLoad = MatchLoadCombine() local 13333 SDValue NewLoad = DAG.getMaskedLoad( tryToFoldExtOfMaskedLoad() local 15079 SDValue NewLoad = DAG.getExtLoad( visitTRUNCATE() local 19081 SDValue NewLoad = DAG.getExtLoad( visitLOAD() local 21039 SDValue NewLoad, NewStore; tryStoreMergeOfLoads() local [all...] |
H A D | LegalizeDAG.cpp | 1429 SDValue NewLoad; ExpandExtractFromVectorThroughStack() local
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H A D | LegalizeVectorTypes.cpp | 5636 SDValue NewLoad = WidenVecRes_LOAD() local
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H A D | TargetLowering.cpp | 4695 SDValue NewLoad = SimplifySetCC() local
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/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 10292 SDValue NewLoad = DAG.getMaskedLoad( LowerMLOAD() local 17864 SDValue NewLoad = PerformSplittingToWideningLoad() local 17931 if (SDValue NewLoad = PerformSplittingToWideningLoad(N, DAG)) PerformExtendCombine() local 17940 if (SDValue NewLoad = PerformSplittingToWideningLoad(N, DAG)) PerformFPExtendCombine() local 18775 SDValue NewLoad = PerformSplittingMVEEXTToWideningLoad() local [all...] |
/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 5989 SDValue NewLoad = DAG.getMemIntrinsicNode(Opc, DL, RetVTList, Ops, NewVT, PerformLOADCombine() local
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/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 3433 auto NewLoad = MIRBuilder.buildLoad(LoadTy, PtrReg, *NewMMO); lowerLoad() local 3436 auto NewLoad = MIRBuilder.buildLoad(LoadTy, PtrReg, *NewMMO); lowerLoad() local
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/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 19160 SDValue NewLoad = DAG.getLoad(FVT, dl, LD->getChain(), performConcatVectorsCombine() local 21836 SDValue NewLoad = DAG.getMaskedLoad( performUnpackCombine() local 22465 SDValue NewLoad = DAG.getLoad( performLOADCombine() local 27029 SDValue NewLoad = DAG.getMaskedLoad( LowerFixedLengthVectorLoadToSVE() local 27103 SDValue NewLoad = DAG.getMaskedLoad( LowerFixedLengthVectorMLoadToSVE() local [all...] |
/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 3896 visitMaskedLoad(SelectionDAG & DAG,const SDLoc & DL,SDValue Chain,MachineMemOperand * MMO,SDValue & NewLoad,SDValue Ptr,SDValue PassThru,SDValue Mask) visitMaskedLoad() argument
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/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 5114 SDValue NewLoad = DAG.getMemIntrinsicNode( lowerVECTOR_SHUFFLE() local 10767 SDValue NewLoad = lowerFixedLengthVectorLoadToRVV() local 10786 SDValue NewLoad = lowerFixedLengthVectorLoadToRVV() local
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/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 3846 SDValue NewLoad = DAG.getLoad(ResVT, DL, LoadN->getChain(), lowerBITCAST() local
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