| /llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 297 SmallVector<SDValue, 12> MemOpChains; in LowerCall() local
434 SmallVector<SDValue, 4> MemOpChains; in lowerCallResult() local
668 SmallVector<SDValue, 4> MemOpChains; LowerReturn() local
[all...] |
| /llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 993 SmallVector<SDValue, 4> MemOpChains; LowerCallResult() local
1047 SmallVector<SDValue, 12> MemOpChains; LowerCCCCallTo() local
1370 SmallVector<SDValue, 4> MemOpChains; LowerReturn() local
[all...] |
| /llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 325 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
|
| /llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 824 SmallVector<SDValue, 12> MemOpChains; LowerCCCCallTo() local
|
| /llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 569 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
|
| /llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 660 SmallVector<SDValue, 12> MemOpChains; LowerCCCCallTo() local
|
| /llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 888 SmallVector<SDValue, 8> MemOpChains; in LowerCall_32() local
1271 SmallVector<SDValue, 8> MemOpChains; LowerCall_64() local
[all...] |
| /llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1584 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
|
| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 3296 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
4430 passByValArg(SDValue Chain,const SDLoc & DL,std::deque<std::pair<unsigned,SDValue>> & RegsToPass,SmallVectorImpl<SDValue> & MemOpChains,SDValue StackPtr,MachineFrameInfo & MFI,SelectionDAG & DAG,SDValue Arg,unsigned FirstReg,unsigned LastReg,const ISD::ArgFlagsTy & Flags,bool isLittle,const CCValAssign & VA) const passByValArg() argument
|
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 2142 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
|
| /llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 636 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
|
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 5209 StoreTailCallArgumentsToStackSlot(SelectionDAG & DAG,SDValue Chain,const SmallVectorImpl<TailCallArgumentInfo> & TailCallArgs,SmallVectorImpl<SDValue> & MemOpChains,const SDLoc & dl) StoreTailCallArgumentsToStackSlot() argument
5298 LowerMemOpCallTo(SelectionDAG & DAG,MachineFunction & MF,SDValue Chain,SDValue Arg,SDValue PtrOff,int SPDiff,unsigned ArgOffset,bool isPPC64,bool isTailCall,bool isVector,SmallVectorImpl<SDValue> & MemOpChains,SmallVectorImpl<TailCallArgumentInfo> & TailCallArguments,const SDLoc & dl) LowerMemOpCallTo() argument
6092 SmallVector<SDValue, 8> MemOpChains; LowerCall_32SVR4() local
6427 SmallVector<SDValue, 8> MemOpChains; LowerCall_64SVR4() local
7547 SmallVector<SDValue, 8> MemOpChains; LowerCall_AIX() local
[all...] |
| /llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 632 SmallVector<SDValue, 8> MemOpChains; in LowerCall() local
|
| /llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 4246 SmallVector<SDValue> MemOpChains; LowerCall() local
|
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 458 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 3302 passSpecialInputs(CallLoweringInfo & CLI,CCState & CCInfo,const SIMachineFunctionInfo & Info,SmallVectorImpl<std::pair<unsigned,SDValue>> & RegsToPass,SmallVectorImpl<SDValue> & MemOpChains,SDValue Chain) const passSpecialInputs() argument
3687 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
|
| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1936 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
|
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2346 PassF64ArgInRegs(const SDLoc & dl,SelectionDAG & DAG,SDValue Chain,SDValue & Arg,RegsToPassVector & RegsToPass,CCValAssign & VA,CCValAssign & NextVA,SDValue & StackPtr,SmallVectorImpl<SDValue> & MemOpChains,bool IsTailCall,int SPDiff) const PassF64ArgInRegs() argument
2505 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
[all...] |
| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 19899 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
|
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 8363 SmallVector<SDValue, 8> MemOpChains; LowerCall() local
[all...] |