Home
last modified time | relevance | path

Searched defs:Masked (Results 1 – 21 of 21) sorted by relevance

/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.h209 uint16_t Masked : 1; global() member
219 uint16_t Masked : 1; global() member
229 uint16_t Masked : 1; global() member
238 uint16_t Masked : 1; global() member
247 uint16_t Masked : 1; global() member
256 uint16_t Masked :1; global() member
264 uint16_t Masked : 1; global() member
H A DRISCVISelLowering.cpp12052 SDValue Masked = DAG.getNode(ISD::AND, DL, XLenVT, Shifted, lowerGET_ROUNDING() local
18482 const RISCV::RISCVMaskedPseudoInfo *Masked = lookupMaskedIntrinsic() local
/llvm-project/llvm/include/llvm/Transforms/Vectorize/
H A DLoopIdiomVectorize.h16 enum class LoopIdiomVectorizeStyle { Masked, Predicated }; enumerator
/llvm-project/llvm/include/llvm/Analysis/
H A DTargetLibraryInfo.h47 bool Masked; global() variable
53 VecDesc(StringRef ScalarFnName,StringRef VectorFnName,ElementCount VectorizationFactor,bool Masked,StringRef VABIPrefix) VecDesc() argument
402 getVectorMappingInfo(StringRef F,const ElementCount & VF,bool Masked) getVectorMappingInfo() argument
[all...]
H A DTargetTransformInfo.h1335 Masked, ///< The cast is used with a masked load/store. global() enumerator
/llvm-project/llvm/lib/Support/
H A DAPFixedPoint.cpp47 APInt Masked(NewVal & Mask); convert() local
/llvm-project/llvm/lib/CodeGen/
H A DTypePromotion.cpp645 Value *Masked = Builder.CreateAnd(Trunc->getOperand(0), Mask); in ConvertTruncs() local
/llvm-project/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp2222 Value *Masked = IC.Builder.CreateAnd(Input, II.getArgOperand(1)); instCombineIntrinsic() local
2268 Value *Masked = IC.Builder.CreateAnd(Shifted, II.getArgOperand(1)); instCombineIntrinsic() local
H A DX86ISelDAGToDAG.cpp4809 getVPTESTMOpc(MVT TestVT,bool IsTestN,bool FoldedLoad,bool FoldedBCast,bool Masked) getVPTESTMOpc() argument
H A DX86ISelLowering.cpp10742 if (SDValue Masked = lowerShuffleAsBitMask(DL, VT, V1, V2, Mask, Zeroable, lowerShuffleAsBlend() local
10809 if (SDValue Masked = lowerShuffleAsBitMask(DL, VT, V1, V2, Mask, Zeroable, lowerShuffleAsBlend() local
13271 if (SDValue Masked = lowerShuffleAsBitMask(DL, MVT::v4i32, V1, V2, Mask, lowerV4I32Shuffle() local
13980 if (SDValue Masked = lowerShuffleAsBitMask(DL, MVT::v8i16, V1, V2, Mask, lowerV8I16Shuffle() local
14328 if (SDValue Masked = lowerShuffleAsBitMask(DL, MVT::v16i8, V1, V2, Mask, lowerV16I8Shuffle() local
17169 if (SDValue Masked = lowerShuffleAsBitMask(DL, MVT::v64i8, V1, V2, Mask, lowerV64I8Shuffle() local
[all...]
/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DMemProfiler.cpp431 if (auto *Masked = dyn_cast<ConstantInt>(Vector->getOperand(Idx))) { instrumentMaskedLoadOrStore() local
H A DInstrProfiling.cpp975 auto *Masked = Builder.CreateAnd(Bitmap, ArgVal); createRMWOrFunc() local
/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineShifts.cpp195 Value *Masked, *ShiftShAmt; in dropRedundantMaskingOfLeftShiftInput() local
[all...]
H A DInstCombineSelect.cpp3497 Value *Masked = foldBitCeil() local
H A DInstCombineAndOrXor.cpp735 Value *Masked = Builder.CreateAnd(L1, Mask); foldAndOrOfICmpsOfAndWithPow2() local
H A DInstCombineCompares.cpp1165 Value *Masked = Builder.CreateAnd(X, Mask); foldIRemByPowerOfTwoToBitTest() local
/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp5578 auto Masked = B.buildAnd(S32, HighHalf, AndMask); legalizePointerAsRsrcIntrin() local
H A DSIISelLowering.cpp10071 SDValue Masked = DAG.getNode(ISD::AND, Loc, MVT::i32, HighHalf, Mask); lowerPointerAsRsrcIntrin() local
/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp7115 SDValue Masked = DAG.getNode(ISD::AND, DL, VT, N, IntMax); prepareSREMEqFold() local
H A DDAGCombiner.cpp3075 bool Masked = false; getAsCarry() local
[all...]
/llvm-project/clang/lib/CodeGen/
H A DCGOpenMPRuntime.cpp10653 llvm::SmallVector<char, 2> Masked; emitX86DeclareSimdFunction() local