| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | StatepointLowering.cpp | 1275 auto LoadVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitGCRelocate() local
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| H A D | LegalizeDAG.cpp | 873 if ((LoadVT.isFloatingPoint() == SrcVT.isFloatingPoint()) && in LegalizeLoadOps() local
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| H A D | SelectionDAGBuilder.cpp | 8838 getMemCmpLoad(const Value * PtrVal,MVT LoadVT,SelectionDAGBuilder & Builder) getMemCmpLoad() argument
8949 MVT LoadVT; visitMemCmpBCmpCall() local
[all...] |
| H A D | TargetLowering.cpp | 9576 EVT LoadVT = EVT::getIntegerVT(*DAG.getContext(), NumLoadBits); scalarizeVectorLoad() local
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| H A D | DAGCombiner.cpp | 6995 EVT LoadVT = MLoad->getMemoryVT(); visitAND() local
20352 EVT LoadVT; getStoreMergeCandidates() local
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 2382 isLoadBitCastBeneficial(EVT LoadVT,EVT BitcastVT,const SelectionDAG & DAG,const MachineMemOperand & MMO) const isLoadBitCastBeneficial() argument
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 5894 adjustLoadValueTypeImpl(SDValue Result,EVT LoadVT,const SDLoc & DL,SelectionDAG & DAG,bool Unpacked) adjustLoadValueTypeImpl() argument
5943 EVT LoadVT = M->getValueType(0); adjustLoadValueType() local
5976 EVT LoadVT = M->getValueType(0); lowerIntrinsicLoad() local
7968 MVT LoadVT = ResultTypes[0].getSimpleVT(); lowerImage() local
8330 MVT LoadVT = VT.getSimpleVT(); lowerSBuffer() local
8950 EVT LoadVT = Op.getValueType(); LowerINTRINSIC_W_CHAIN() local
8977 EVT LoadVT = Op.getValueType(); LowerINTRINSIC_W_CHAIN() local
10098 handleByteShortBufferLoads(SelectionDAG & DAG,EVT LoadVT,SDLoc DL,ArrayRef<SDValue> Ops,MachineMemOperand * MMO,bool IsTFE) const handleByteShortBufferLoads() argument
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 763 EVT LoadVT = Ld->getMemoryVT(); tryIndexedLoad() local
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| /llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 3267 EVT LoadVT = EltVT; LowerFormalArguments() local
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 3017 EVT LoadVT = getValueType(DL, Load->getType()); isExtLoad() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 20471 EVT LoadVT = EVT::getVectorVT( performExtBinopLoadFold() local
21501 EVT LoadVT = VT; performLDNT1Combine() local
21529 EVT LoadVT = VT; performLD1ReplicateCombine() local
27019 EVT LoadVT = ContainerVT; LowerFixedLengthVectorLoadToSVE() local
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| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 7489 EVT LoadVT = N->getValueType(0); combineBSWAP() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 16080 EVT LoadVT = isLaneOp ? VecTy.getVectorElementType() : AlignedVecTy; TryCombineBaseUpdate() local
18869 EVT LoadVT = N->getOperand(0).getValueType().getHalfNumVectorElementsVT( PerformMVEExtCombine() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3264 isLoadBitCastBeneficial(EVT LoadVT,EVT BitcastVT,const SelectionDAG & DAG,const MachineMemOperand & MMO) const isLoadBitCastBeneficial() argument
43899 MVT LoadVT = VT.isFloatingPoint() ? MVT::getFloatingPointVT(SrcVTSize) combineBitcast() local
53271 MVT LoadVT = MVT::getVectorVT(MemVT, 128 / NumBits); combineX86INT_TO_FP() local
53300 MVT LoadVT = MVT::getVectorVT(MemVT, 128 / NumBits); combineCVTP2I_CVTTP2I() local
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 15953 MVT LoadVT = VT.getSimpleVT(); PerformDAGCombine() local
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