| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64MacroFusion.cpp | 22 static bool isArithmeticBccPair(const MachineInstr *FirstMI, in isArithmeticBccPair()
71 static bool isArithmeticCbzPair(const MachineInstr *FirstMI, in isArithmeticCbzPair()
121 static bool isAESPair(const MachineInstr *FirstMI, in isAESPair()
139 static bool isCryptoEORPair(const MachineInstr *FirstMI, in isCryptoEORPair()
161 static bool isAdrpAddPair(const MachineInstr *FirstMI, in isAdrpAddPair()
171 static bool isLiteralsPair(const MachineInstr *FirstMI, in isLiteralsPair()
198 static bool isAddressLdStPair(const MachineInstr *FirstMI, in isAddressLdStPair()
240 static bool isCCSelectPair(const MachineInstr *FirstMI, in isCCSelectPair()
283 static bool isArithmeticLogicPair(const MachineInstr *FirstMI, in isArithmeticLogicPair()
383 static bool isAddSub2RegAndConstOnePair(const MachineInstr *FirstMI, in isAddSub2RegAndConstOnePair()
[all …]
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| H A D | AArch64LoadStoreOptimizer.cpp | 565 isPreLdStPairCandidate(MachineInstr & FirstMI,MachineInstr & MI) isPreLdStPairCandidate() argument
1361 areCandidatesToMergeOrPair(MachineInstr & FirstMI,MachineInstr & MI,LdStPairFlags & Flags,const AArch64InstrInfo * TII) areCandidatesToMergeOrPair() argument
1455 canRenameUpToDef(MachineInstr & FirstMI,LiveRegUnits & UsedInBetween,SmallPtrSetImpl<const TargetRegisterClass * > & RequiredClasses,const TargetRegisterInfo * TRI) canRenameUpToDef() argument
1648 findRenameRegForSameLdStRegPair(std::optional<bool> MaybeCanRename,MachineInstr & FirstMI,MachineInstr & MI,Register Reg,LiveRegUnits & DefinedInBB,LiveRegUnits & UsedInBetween,SmallPtrSetImpl<const TargetRegisterClass * > & RequiredClasses,const TargetRegisterInfo * TRI) findRenameRegForSameLdStRegPair() argument
1688 MachineInstr &FirstMI = *I; findMatchingInsn() local
[all...] |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMMacroFusion.cpp | 22 static bool isAESPair(const MachineInstr *FirstMI, in isAESPair()
38 static bool isLiteralsPair(const MachineInstr *FirstMI, in isLiteralsPair()
53 const MachineInstr *FirstMI, in shouldScheduleAdjacent()
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| H A D | ARMLoadStoreOptimizer.cpp | 1006 const MachineInstr *FirstMI = MemOps[0].MI; FormCandidates() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNCreateVOPD.cpp | 50 MachineInstr *FirstMI; global() member in __anonc245fcab0111::GCNCreateVOPD::VOPDCombineInfo
70 auto *FirstMI = CI.FirstMI; doReplace() local
134 auto *FirstMI = &*MII; runOnMachineFunction() local
[all...] |
| H A D | AMDGPUMacroFusion.cpp | 28 const MachineInstr *FirstMI, in shouldScheduleAdjacent()
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| H A D | GCNVOPDUtils.cpp | 38 const MachineInstr &FirstMI, in checkVOPDRegConstraints()
125 const MachineInstr *FirstMI, in shouldScheduleVOPDAdjacent()
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| H A D | SIWholeQuadMode.cpp | 1543 MachineInstr *FirstMI = &*MBB->begin(); lowerInitExec() local
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| H A D | SIInstrInfo.cpp | 750 MachineInstr *FirstMI = nullptr, *LastMI = nullptr; expandSGPRCopy() local
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCMacroFusion.cpp | 68 static bool matchingRegOps(const MachineInstr &FirstMI, in matchingRegOps()
96 const MachineInstr &FirstMI, in checkOpConstraints()
236 const MachineInstr *FirstMI, in shouldScheduleAdjacent()
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86MacroFusion.cpp | 37 const MachineInstr *FirstMI, in shouldScheduleAdjacent()
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineInstrBundle.cpp | 109 static DebugLoc getDebugLoc(MachineBasicBlock::instr_iterator FirstMI, in getDebugLoc()
124 MachineBasicBlock::instr_iterator FirstMI, in finalizeBundle()
243 MachineBasicBlock::instr_iterator FirstMI) { in finalizeBundle()
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| H A D | MacroFusion.cpp | 161 const MachineInstr *FirstMI, in shouldScheduleAdjacent()
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| H A D | XRayInstrumentation.cpp | 210 auto &FirstMI = *FirstMBB.begin(); runOnMachineFunction() local
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| H A D | VirtRegMap.cpp | 460 MachineInstr *FirstMI = MIs.back(); expandCopyBundle() local
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| H A D | InlineSpiller.cpp | 272 return isCopyOf(FirstMI, Reg, TII); in isCopyOfBundle() argument
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| H A D | RegAllocGreedy.cpp | 1354 getInstReadLaneMask(const MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI,const MachineInstr & FirstMI,Register Reg) getInstReadLaneMask() argument
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| H A D | ModuloSchedule.cpp | 1310 MachineInstr *FirstMI = nullptr; rewrite() local
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVMakeCompressible.cpp | 281 analyzeCompressibleUses(MachineInstr & FirstMI,RegImmPair RegImm,SmallVectorImpl<MachineInstr * > & MIs) analyzeCompressibleUses() argument
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| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 402 MachineInstr *FirstMI = LIS.getInstructionFromIndex(LI.beginIndex()); shouldCoalesce() local
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| H A D | SystemZInstrInfo.cpp | 101 MachineInstr *FirstMI = HighPartMI; splitMove() local
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| H A D | SystemZISelLowering.cpp | 8244 MachineInstr *FirstMI = Selects.front(); createPHIsForSelects() local
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonStoreWidening.cpp | |
| H A D | HexagonVLIWPacketizer.cpp | 1819 MachineBasicBlock::instr_iterator FirstMI(OldPacketMIs.front()); in endPacket() local
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