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Searched defs:DCI (Results 1 – 19 of 19) sorted by relevance

/freebsd-src/contrib/llvm-project/clang/lib/AST/
H A DASTImporterLookupTable.cpp164 auto DCI = LookupTable.find(DC->getPrimaryContext()); in lookup() local
181 auto DCI = LookupTable.find(DC->getPrimaryContext()); in dump() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp5094 PerformADDCombineWithOperands(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const NVPTXSubtarget & Subtarget,CodeGenOptLevel OptLevel) PerformADDCombineWithOperands() argument
5205 PerformADDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const NVPTXSubtarget & Subtarget,CodeGenOptLevel OptLevel) PerformADDCombine() argument
5221 PerformANDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformANDCombine() argument
5320 PerformREMCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,CodeGenOptLevel OptLevel) PerformREMCombine() argument
5423 TryMULWIDECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) TryMULWIDECombine() argument
5490 PerformMULCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,CodeGenOptLevel OptLevel) PerformMULCombine() argument
5503 PerformSHLCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,CodeGenOptLevel OptLevel) PerformSHLCombine() argument
5515 PerformSETCCCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,unsigned int SmVersion) PerformSETCCCombine() argument
5542 PerformEXTRACTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformEXTRACTCombine() argument
5587 PerformVSELECTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVSELECTCombine() argument
5619 PerformLOADCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformLOADCombine() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp12575 combineSelectAndUse(SDNode * N,SDValue Slct,SDValue OtherOp,TargetLowering::DAGCombinerInfo & DCI,bool AllOnes=false) combineSelectAndUse() argument
12601 combineSelectAndUseCommutative(SDNode * N,bool AllOnes,TargetLowering::DAGCombinerInfo & DCI) combineSelectAndUseCommutative() argument
12626 AddCombineToVPADD(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineToVPADD() argument
12654 AddCombineVUZPToVPADDL(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineVUZPToVPADDL() argument
12707 AddCombineBUILD_VECTORToVPADDL(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineBUILD_VECTORToVPADDL() argument
12811 AddCombineTo64BitSMLAL16(SDNode * AddcNode,SDNode * AddeNode,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineTo64BitSMLAL16() argument
12888 AddCombineTo64bitMLAL(SDNode * AddeSubeNode,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineTo64bitMLAL() argument
13054 AddCombineTo64bitUMAAL(SDNode * AddeNode,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineTo64bitUMAAL() argument
13131 PerformAddcSubcCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformAddcSubcCombine() argument
13164 PerformAddeSubeCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformAddeSubeCombine() argument
13192 PerformSELECTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformSELECTCombine() argument
13411 PerformVSELECTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformVSELECTCombine() argument
13451 PerformVSetCCToVCTPCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformVSetCCToVCTPCombine() argument
13509 PerformABSCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformABSCombine() argument
13524 PerformADDECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformADDECombine() argument
13541 PerformADDCombineWithOperands(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformADDCombineWithOperands() argument
13910 PerformSHLSimplify(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * ST) PerformSHLSimplify() argument
14018 PerformADDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformADDCombine() argument
14061 PerformSUBCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformSUBCombine() argument
14114 PerformVMULCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformVMULCombine() argument
14210 PerformMULCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformMULCombine() argument
14296 CombineANDShift(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) CombineANDShift() argument
14400 PerformANDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformANDCombine() argument
14450 PerformORCombineToSMULWBT(SDNode * OR,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformORCombineToSMULWBT() argument
14510 PerformORCombineToBFI(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformORCombineToBFI() argument
14693 PerformORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformORCombine() argument
14793 PerformXORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformXORCombine() argument
15041 PerformVMOVRRDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformVMOVRRDCombine() argument
15149 PerformVMOVhrCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVMOVhrCombine() argument
15258 PerformBUILD_VECTORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformBUILD_VECTORCombine() argument
15290 PerformARMBUILD_VECTORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformARMBUILD_VECTORCombine() argument
15381 PerformPREDICATE_CASTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformPREDICATE_CASTCombine() argument
15472 PerformInsertEltCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformInsertEltCombine() argument
15500 PerformExtractEltToVMOVRRD(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformExtractEltToVMOVRRD() argument
15562 PerformExtractEltCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * ST) PerformExtractEltCombine() argument
15637 PerformInsertSubvectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformInsertSubvectorCombine() argument
15777 TryCombineBaseUpdate(struct BaseUpdateTarget & Target,struct BaseUpdateUser & User,bool SimpleConstIncOnly,TargetLowering::DAGCombinerInfo & DCI) TryCombineBaseUpdate() argument
16144 CombineBaseUpdate(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) CombineBaseUpdate() argument
16233 PerformVLDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVLDCombine() argument
16241 PerformMVEVLDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformMVEVLDCombine() argument
16364 CombineVLDDUP(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) CombineVLDDUP() argument
16443 PerformVDUPLANECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformVDUPLANECombine() argument
16524 PerformLOADCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformLOADCombine() argument
16794 PerformSTORECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformSTORECombine() argument
17366 PerformVMOVNCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVMOVNCombine() argument
17406 PerformVQMOVNCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVQMOVNCombine() argument
17422 PerformVQDMULHCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVQDMULHCombine() argument
17699 PerformShiftCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * ST) PerformShiftCombine() argument
18198 PerformHWLoopCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * ST) PerformHWLoopCombine() argument
18547 PerformBITCASTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * ST) PerformBITCASTCombine() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2460 performVECTOR_SHUFFLECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performVECTOR_SHUFFLECombine() argument
2489 performVectorExtendToFPCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performVectorExtendToFPCombine() argument
2511 performVectorExtendCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performVectorExtendCombine() argument
2558 performVectorTruncZeroCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performVectorTruncZeroCombine() argument
2760 performTruncateCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performTruncateCombine() argument
2787 performBitcastCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performBitcastCombine() argument
2814 performSETCCCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performSETCCCombine() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp16798 performXorCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performXorCombine() argument
17066 performMulCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performMulCombine() argument
17330 performFpToIntCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performFpToIntCombine() argument
17401 performFDivCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performFDivCombine() argument
17467 tryCombineToBSL(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64TargetLowering & TLI) tryCombineToBSL() argument
17638 performORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget,const AArch64TargetLowering & TLI) performORCombine() argument
17695 performSVEAndCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performSVEAndCombine() argument
17808 performANDSETCCCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performANDSETCCCombine() argument
17847 performANDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performANDCombine() argument
17910 performFADDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performFADDCombine() argument
17982 performFirstTrueTestVectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performFirstTrueTestVectorCombine() argument
18012 performLastTrueTestVectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performLastTrueTestVectorCombine() argument
18045 performExtractVectorEltCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performExtractVectorEltCombine() argument
18115 performConcatVectorsCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performConcatVectorsCombine() argument
18368 performExtractSubvectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performExtractSubvectorCombine() argument
18391 performInsertSubvectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performInsertSubvectorCombine() argument
18433 tryCombineFixedPointConvert(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) tryCombineFixedPointConvert() argument
18872 performAddSubLongCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performAddSubLongCombine() argument
19014 performBuildVectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performBuildVectorCombine() argument
19207 performSVEMulAddSubCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performSVEMulAddSubCombine() argument
19534 performAddSubCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performAddSubCombine() argument
19569 tryCombineLongOpWithDup(unsigned IID,SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) tryCombineLongOpWithDup() argument
19775 tryConvertSVEWideCompare(SDNode * N,ISD::CondCode CC,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) tryConvertSVEWideCompare() argument
19960 performIntrinsicCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performIntrinsicCombine() argument
20300 performSignExtendSetCCCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performSignExtendSetCCCombine() argument
20340 performExtendCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performExtendCombine() argument
20687 splitStores(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG,const AArch64Subtarget * Subtarget) splitStores() argument
21059 performVectorShiftCombine(SDNode * N,const AArch64TargetLowering & TLI,TargetLowering::DAGCombinerInfo & DCI) performVectorShiftCombine() argument
21105 performPostLD1Combine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,bool IsLaneOp) performPostLD1Combine() argument
21221 performTBISimplification(SDValue Addr,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performTBISimplification() argument
21261 performLOADCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG,const AArch64Subtarget * Subtarget) performLOADCombine() argument
21481 performSTORECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG,const AArch64Subtarget * Subtarget) performSTORECombine() argument
21536 performMSTORECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG,const AArch64Subtarget * Subtarget) performMSTORECombine() argument
21714 performMaskedGatherScatterCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performMaskedGatherScatterCombine() argument
21752 performNEONPostLDSTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performNEONPostLDSTCombine() argument
22118 performCONDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG,unsigned CCIndex,unsigned CmpIndex) performCONDCombine() argument
22197 performBRCONDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performBRCONDCombine() argument
22361 performCSELCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performCSELCombine() argument
22427 performVecReduceBitwiseCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performVecReduceBitwiseCombine() argument
22443 performSETCCCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performSETCCCombine() argument
22519 performFlagSettingCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,unsigned GenericOpcode) performFlagSettingCombine() argument
22580 performSetccMergeZeroCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performSetccMergeZeroCombine() argument
22700 performTBZCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performTBZCombine() argument
22840 performSelectCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performSelectCombine() argument
22905 performDUPCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performDUPCombine() argument
23285 performSignExtendInRegCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performSignExtendInRegCombine() argument
23521 performInsertVectorEltCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performInsertVectorEltCombine() argument
23551 performFPExtendCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performFPExtendCombine() argument
23645 tryCombineMULLWithUZP1(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) tryCombineMULLWithUZP1() argument
23778 performMULLCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performMULLCombine() argument
23791 performScalarToVectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performScalarToVectorCombine() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp475 performANDCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performANDCombine() argument
590 performORCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performORCombine() argument
822 performMULCombine(SDNode * N,SelectionDAG & DAG,const TargetLowering::DAGCombinerInfo & DCI,const MipsSETargetLowering * TL,const MipsSubtarget & Subtarget) performMULCombine() argument
863 performSHLCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSHLCombine() argument
886 performSRACombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSRACombine() argument
932 performSRLCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSRLCombine() argument
[all...]
H A DMipsISelLowering.cpp561 performDivRemCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performDivRemCombine() argument
670 performSELECTCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSELECTCombine() argument
751 performCMovFPCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performCMovFPCombine() argument
778 performANDCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performANDCombine() argument
861 performORCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performORCombine() argument
1055 performSUBCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSUBCombine() argument
1070 performADDCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performADDCombine() argument
1102 performSHLCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSHLCombine() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp1420 combineSelectAndUse(SDNode * N,SDValue Slct,SDValue OtherOp,TargetLowering::DAGCombinerInfo & DCI,bool AllOnes) combineSelectAndUse() argument
1444 combineSelectAndUseCommutative(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,bool AllOnes) combineSelectAndUseCommutative() argument
1459 PerformSUBCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformSUBCombine() argument
[all...]
/freebsd-src/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DDynamicType.cpp218 static raw_ostream &printJson(const DynamicCastInfo &DCI, raw_ostream &Out, in printJson()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp2099 performANDCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const LoongArchSubtarget & Subtarget) performANDCombine() argument
2185 performSRLCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const LoongArchSubtarget & Subtarget) performSRLCombine() argument
2226 performORCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const LoongArchSubtarget & Subtarget) performORCombine() argument
2447 performBITREV_WCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const LoongArchSubtarget & Subtarget) performBITREV_WCombine() argument
2570 performINTRINSIC_WO_CHAINCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const LoongArchSubtarget & Subtarget) performINTRINSIC_WO_CHAINCombine() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp39843 combineTargetShuffle(SDValue N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineTargetShuffle() argument
40843 combineShuffle(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineShuffle() argument
42668 combineCastedMaskArithmetic(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineCastedMaskArithmetic() argument
42872 combineBitcast(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineBitcast() argument
43647 combineExtractWithShuffle(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineExtractWithShuffle() argument
44140 combineExtractVectorElt(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineExtractVectorElt() argument
44329 combineToExtendBoolVectorInReg(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N0,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineToExtendBoolVectorInReg() argument
44428 combineVSelectWithAllOnesOrZeros(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVSelectWithAllOnesOrZeros() argument
44639 combineVSelectToBLENDV(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVSelectToBLENDV() argument
44824 combineSelect(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineSelect() argument
46122 combineCMov(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineCMov() argument
46749 combineMul(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineMul() argument
47093 combineShiftRightLogical(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineShiftRightLogical() argument
47290 combineVectorPack(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVectorPack() argument
47441 combineVectorHADDSUB(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVectorHADDSUB() argument
47489 combineVectorShiftVar(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVectorShiftVar() argument
47520 combineVectorShiftImm(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVectorShiftImm() argument
47671 combineVectorInsert(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVectorInsert() argument
47710 combineCompareEqual(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineCompareEqual() argument
48033 convertIntLogicToFPLogic(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) convertIntLogicToFPLogic() argument
48545 combineAnd(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineAnd() argument
48987 combineOrCmpEqZeroToCtlzSrl(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineOrCmpEqZeroToCtlzSrl() argument
49352 combineOr(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineOr() argument
49953 combineLoad(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineLoad() argument
50164 reduceMaskedLoadToScalarLoad(MaskedLoadSDNode * ML,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) reduceMaskedLoadToScalarLoad() argument
50205 combineMaskedLoadConstantMask(MaskedLoadSDNode * ML,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineMaskedLoadConstantMask() argument
50253 combineMaskedLoad(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineMaskedLoad() argument
50332 combineMaskedStore(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineMaskedStore() argument
50380 combineStore(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineStore() argument
50662 combineVEXTRACT_STORE(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVEXTRACT_STORE() argument
51416 combineVTRUNC(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineVTRUNC() argument
51584 combineFneg(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineFneg() argument
51788 combineXor(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineXor() argument
51878 combineBITREVERSE(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineBITREVERSE() argument
51905 combineBEXTR(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineBEXTR() argument
52006 combineFOr(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineFOr() argument
52113 combineX86INT_TO_FP(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineX86INT_TO_FP() argument
52146 combineCVTP2I_CVTTP2I(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineCVTP2I_CVTTP2I() argument
52183 combineAndnp(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineAndnp() argument
52297 combineBT(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineBT() argument
52313 combineCVTPH2PS(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineCVTPH2PS() argument
52628 combineSext(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineSext() argument
52732 combineFMA(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineFMA() argument
52820 combineFMADDSUB(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineFMADDSUB() argument
52843 combineZext(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineZext() argument
52922 combineSetCC(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineSetCC() argument
53152 combineMOVMSK(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineMOVMSK() argument
53267 combineTESTP(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineTESTP() argument
53282 combineX86GatherScatter(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineX86GatherScatter() argument
53325 combineGatherScatter(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineGatherScatter() argument
53622 combineSIntToFP(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineSIntToFP() argument
53945 combineX86AddSub(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineX86AddSub() argument
54005 combineADC(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineADC() argument
54420 combineAdd(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineAdd() argument
54543 combineSub(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineSub() argument
54630 combineConcatVectorOps(const SDLoc & DL,MVT VT,ArrayRef<SDValue> Ops,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineConcatVectorOps() argument
55226 combineCONCAT_VECTORS(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineCONCAT_VECTORS() argument
55262 combineINSERT_SUBVECTOR(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineINSERT_SUBVECTOR() argument
55473 combineEXTRACT_SUBVECTOR(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineEXTRACT_SUBVECTOR() argument
55747 combinePMULDQ(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combinePMULDQ() argument
55800 combineVPMADD(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineVPMADD() argument
55820 combineEXTEND_VECTOR_INREG(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineEXTEND_VECTOR_INREG() argument
55888 combineKSHIFT(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineKSHIFT() argument
56003 combineBROADCAST_LOAD(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineBROADCAST_LOAD() argument
56148 combinePDEP(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combinePDEP() argument
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/freebsd-src/contrib/llvm-project/clang/lib/Interpreter/
H A DInterpreter.cpp295 createWithCUDA(std::unique_ptr<CompilerInstance> CI,std::unique_ptr<CompilerInstance> DCI) createWithCUDA() argument
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp4016 optimizeSetCCOfSignedTruncationCheck(EVT SCCVT,SDValue N0,SDValue N1,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL) const optimizeSetCCOfSignedTruncationCheck() argument
4106 optimizeSetCCByHoistingAndByConstFromLogicalShift(EVT SCCVT,SDValue N0,SDValue N1C,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL) const optimizeSetCCByHoistingAndByConstFromLogicalShift() argument
4403 SimplifySetCC(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,bool foldBooleans,DAGCombinerInfo & DCI,const SDLoc & dl) const SimplifySetCC() argument
6545 buildUREMEqFold(EVT SETCCVT,SDValue REMNode,SDValue CompTargetNode,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL) const buildUREMEqFold() argument
6561 prepareUREMEqFold(EVT SETCCVT,SDValue REMNode,SDValue CompTargetNode,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL,SmallVectorImpl<SDNode * > & Created) const prepareUREMEqFold() argument
6788 buildSREMEqFold(EVT SETCCVT,SDValue REMNode,SDValue CompTargetNode,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL) const buildSREMEqFold() argument
6805 prepareSREMEqFold(EVT SETCCVT,SDValue REMNode,SDValue CompTargetNode,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL,SmallVectorImpl<SDNode * > & Created) const prepareSREMEqFold() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp3652 simplifyMul24(SDNode * Node24,TargetLowering::DAGCombinerInfo & DCI) simplifyMul24() argument
3916 splitBinaryBitConstantOpImpl(DAGCombinerInfo & DCI,const SDLoc & SL,unsigned Opc,SDValue LHS,uint32_t ValLo,uint32_t ValHi) const splitBinaryBitConstantOpImpl() argument
4466 distributeOpThroughSelect(TargetLowering::DAGCombinerInfo & DCI,unsigned Op,const SDLoc & SL,SDValue Cond,SDValue N1,SDValue N2) distributeOpThroughSelect() argument
4489 foldFreeOpFromSelect(TargetLowering::DAGCombinerInfo & DCI,SDValue N) const foldFreeOpFromSelect() argument
[all...]
H A DR600ISelLowering.cpp813 DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr); LowerSELECT_CC() local
H A DSIISelLowering.cpp6859 DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr); lowerEXTRACT_VECTOR_ELT() local
11214 splitBinaryBitConstantOp(DAGCombinerInfo & DCI,const SDLoc & SL,unsigned Opc,SDValue LHS,const ConstantSDNode * CRHS) const splitBinaryBitConstantOp() argument
11915 matchPERM(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) matchPERM() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp12673 performANDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) performANDCombine() argument
12746 performORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) performORCombine() argument
13601 combineBinOp_VLToVWBinOp_VL(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) combineBinOp_VLToVWBinOp_VL() argument
13755 performMemPairCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performMemPairCombine() argument
13842 performFP_TO_INTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) performFP_TO_INTCombine() argument
13945 performFP_TO_INT_SATCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) performFP_TO_INT_SATCombine() argument
15021 legalizeScatterGatherIndexType(SDLoc DL,SDValue & Index,ISD::MemIndexType & IndexType,RISCVTargetLowering::DAGCombinerInfo & DCI) legalizeScatterGatherIndexType() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp3616 combineADDX(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineADDX() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp6465 combineExtract(const SDLoc & DL,EVT ResVT,EVT VecVT,SDValue Op,unsigned Index,DAGCombinerInfo & DCI,bool Force) const combineExtract() argument
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