Add suppport for ConstantExprs of shufflevectors whose result type is not equal to the
type of the vectors being shuffled.

llvm-svn: 64401

use precise getters

llvm-svn: 63403

use specialized accessor instead of plain getOperand(0)

llvm-svn: 62330

Add the private linkage.

llvm-svn: 62279

revert to functionally equivalent formulation

llvm-svn: 61895

use the obvious getters

llvm-svn: 61893

Add support for writing LLVM IR to a specified BitstreamWriter.
Patch by Lukasz Janyst!

llvm-svn: 61251

Commit missed files from nocapture change.

llvm-svn: 61240

Temporarily revert r61019, r61030, and r61040. These were breaking LLVM Release
builds.

llvm-svn: 61094

It turns out that "align 1" and unaligned are different. Add a bias to the
alignment attribute such that 0 means unaligned.

This will probably require a rebuild of llvm-gcc because of the change to

It turns out that "align 1" and unaligned are different. Add a bias to the
alignment attribute such that 0 means unaligned.

This will probably require a rebuild of llvm-gcc because of the change to
Attributes.h. If you see many test failures on "make check", please rebuild
your llvm-gcc.

llvm-svn: 61030

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Introducing nocapture, a parameter attribute for pointers to indicate that the
callee will not introduce any new aliases of that pointer.

The attributes had all bits allocated already, so I decided

Introducing nocapture, a parameter attribute for pointers to indicate that the
callee will not introduce any new aliases of that pointer.

The attributes had all bits allocated already, so I decided to collapse
alignment. Alignment was previously stored as a 16-bit integer from bits 16 to
32 of the attribute, but it was required to be a power of 2. Now it's stored in
log2 encoded form in five bits from 16 to 21. That gives us 11 more bits of
space.

You may have already noticed that you only need four bits to encode a 16-bit
power of two, so why five bits? Because the AsmParser accepted 32-bit
alignments, even though we couldn't store them (they were silently discarded).
Now we can store them in memory, but not in the bitcode.

The bitcode format was already storing these as 64-bit VBR integers. So, the
bitcode format stays the same, keeping the alignment values stored as 16 bit
raw values. There's some hideous code in the reader and writer that deals with
this, waiting to be ripped out the moment we run out of bits again and have to
replace the parameter attributes table encoding.

llvm-svn: 61019

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Make sure to set stdout to binary when writing bitcode files via
std::ostream API.

llvm-svn: 58042

Add raw_ostream versions of WriteBitcodeToFile and BitcodeWriterPass.
- The old versions are still hanging around, but should be migrated
away from.

llvm-svn: 57989

Rename APFloat::convertToAPInt to bitcastToAPInt to
make it clearer what the function does. No functional
change.

llvm-svn: 57325

Large mechanical patch.

s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g

This sets the stage
- to implement function notes as function a

Large mechanical patch.

s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g

This sets the stage
- to implement function notes as function attributes and
- to distinguish between function attributes and return value attributes.

This requires corresponding changes in llvm-gcc and clang.

llvm-svn: 56622

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s/ParamAttrsWithIndex/FnAttributeWithIndex/g

llvm-svn: 56535

Use parameter attribute store (soon to be renamed) for
Function Notes also. Function notes are stored at index ~0.

llvm-svn: 56511

Re-enables the new vector select in the bitcode reader, by modifying the
bitcode reader/writer as follows:

- add and use new bitcode FUNC_CODE_INST_VSELECT to handle the llvm
select opcode using eit

Re-enables the new vector select in the bitcode reader, by modifying the
bitcode reader/writer as follows:

- add and use new bitcode FUNC_CODE_INST_VSELECT to handle the llvm
select opcode using either i1 or [N x i1] as the selector.
- retain old BITCODE FUNC_CODE_INST_SELECT in the bitcode reader to
handle select on i1 for backwards compatibility with existing bitcode
files.
- re-enable the vector-select.ll test program.

Also, rename the recently added bitcode opcode FUNC_CODE_INST_VCMP to
FUNC_CODE_INST_CMP2 and make the bitcode writer use it to handle
fcmp/icmp on scalars or vectors. In the bitcode writer, use
FUNC_CODE_INST_CMP for vfcmp/vicmp only. In the bitcode reader, have
FUNC_CODE_INST_CMP handle icmp/fcmp returning bool, for backwards
compatibility with existing bitcode files.

Patch by Preston Gurd!

llvm-svn: 56233

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Extend the vcmp/fcmp LLVM IR instructions to take vectors as arguments
and, if so, to return a vector of boolean as a result;

Extend the select LLVM IR instruction to allow you to specify a result
t

Extend the vcmp/fcmp LLVM IR instructions to take vectors as arguments
and, if so, to return a vector of boolean as a result;

Extend the select LLVM IR instruction to allow you to specify a result
type which is a vector of boolean, in which case the result will be an
element-wise selection instead of choosing one vector or the other; and

Update LangRef.html to describe these changes.

This patch was contributed by Preston Gurd!

llvm-svn: 55969

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Read and write function notes.

llvm-svn: 55657

add #include

llvm-svn: 55257

Rename some GC classes so that their roll will hopefully be clearer.

In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
t

Rename some GC classes so that their roll will hopefully be clearer.

In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:

Collector -> GCStrategy
CollectorMetadata -> GCFunctionInfo
CollectorModuleMetadata -> GCModuleInfo
CollectorRegistry -> GCRegistry
Function::getCollector -> getGC (setGC, hasGC, clearGC)

Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.

llvm-svn: 54899

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Enable first-class aggregates support.

Remove the GetResultInst instruction. It is still accepted in LLVM assembly
and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove
suppor

Enable first-class aggregates support.

Remove the GetResultInst instruction. It is still accepted in LLVM assembly
and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove
support for return instructions with multiple values. These are auto-upgraded
to use InsertValueInst instructions.

The IRBuilder still accepts multiple-value returns, and auto-upgrades them
to InsertValueInst instructions.

llvm-svn: 53941

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InsertValue and ExtractValue constant expressions are always
folded. Remove code that handled the case where they aren't
folded, and remove bitcode reader/writer support for them.

llvm-svn: 53887

Add a little wrapper header that is put around bc files when emitting
bc files for modules with a target triple that indicates they are for
darwin. The reader unconditionally handles this, and the w

Add a little wrapper header that is put around bc files when emitting
bc files for modules with a target triple that indicates they are for
darwin. The reader unconditionally handles this, and the writer could
turn this on for more targets if we care.

This change has two benefits for darwin:

1) it allows us to encode the cpu type of the file in an easy to read
place that doesn't require decoding the bc file.
2) it works around a bug (IMO) in darwin's AR where it is incapable of
handling files that are not a multiple of 8 bytes long. BC files
are only guaranteed to be multiples of 4 bytes long.

llvm-svn: 53275

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