Name Date Size #Lines LOC

..--

3c501.cH A D24-Jun-20219.9 KiB371221

3c501.hH A D24-Jun-20213.1 KiB7041

3c503.cH A D24-Jun-20215.1 KiB16389

3c503.hH A D24-Jun-20212.7 KiB7138

3c509.cH A D24-Jun-202114.9 KiB540318

3c509.hH A D24-Jun-20216.1 KiB16395

8390.cH A D24-Jun-202113.6 KiB500326

8390.hH A D24-Jun-20217 KiB173126

MakefileH A D24-Jun-2021325 1710

READMEH A D24-Jun-20211.3 KiB3830

devio.cH A D24-Jun-20212 KiB11053

dp.cH A D24-Jun-20217 KiB308171

dp.hH A D24-Jun-20216.1 KiB236139

dpeth.confH A D24-Jun-2021175 119

ne.cH A D24-Jun-20215.1 KiB190123

ne.hH A D24-Jun-2021892 3614

netbuff.cH A D24-Jun-20212.3 KiB10162

wd.cH A D24-Jun-20219 KiB304202

wd.hH A D24-Jun-20213.5 KiB10460

README

1
2This is my implementation of a new network task
3for the Minix kernel.  I did it initially to handle
4a 3c501 board (Etherlink), but those board are so
5unstable that it is not worth using them except for
6learning how to implement a driver.  When I got a
73c509b board (Etherlink III) it was easier to
8write the code to handle them.
9
10The Minix code in 'dp8390.c' is too specific for the
11National chip set, so what I did was to remove as
12much as I needed of the code dependant from the chip
13and produce a generic task that, I hope, will be able
14to handle many more cards.
15
16$Log$
17Revision 1.1  2005/06/29 10:16:46  beng
18Import of dpeth 3c501/3c509b/.. ethernet driver by
19Giovanni Falzoni <fgalzoni@inwind.it>.
20
21Revision 1.3  2004/04/14 12:49:07  lsodgf0
22Changes for porting to Minix 2.0.4 run on BOCHS
23
24Revision 1.2  2002/03/25 14:16:09  lsodgf0
25The driver for the NEx000 has been rewritten to be
26operational with the ACCTON 18xx (an NE1000 clone)
27The I/O routines for 16 bit cards are still untested..
28
29Revision 1.1  2002/02/09 09:35:09  lsodgf0
30Initial revision
31The package is not fully tested, i.e. I had only 3Com
32boards (3c501, 3c503, 3c503/16 and 3c509b) and WD8003.
33I got also a NE1000 clone but it was not fully
34operational and I could not appreciate the results.
35For this reason the changes done to the interface
36to I/O for 8 and 16 bits are not tested.
37
38