1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s 3define ptr @large_loop_switch(ptr %p) { 4; CHECK-LABEL: large_loop_switch: 5; CHECK: # %bb.0: # %entry 6; CHECK-NEXT: pushq %rbx 7; CHECK-NEXT: .cfi_def_cfa_offset 16 8; CHECK-NEXT: .cfi_offset %rbx, -16 9; CHECK-NEXT: movq %rdi, %rax 10; CHECK-NEXT: movl $6, %ebx 11; CHECK-NEXT: movl %ebx, %ecx 12; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8) 13; CHECK-NEXT: .LBB0_1: # %for.cond.cleanup 14; CHECK-NEXT: movl $530, %edi # imm = 0x212 15; CHECK-NEXT: movq %rax, %rsi 16; CHECK-NEXT: popq %rbx 17; CHECK-NEXT: .cfi_def_cfa_offset 8 18; CHECK-NEXT: jmp ccc@PLT # TAILCALL 19; CHECK-NEXT: .p2align 4 20; CHECK-NEXT: .LBB0_2: # %sw.bb1 21; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 22; CHECK-NEXT: .cfi_def_cfa_offset 16 23; CHECK-NEXT: movl $531, %edi # imm = 0x213 24; CHECK-NEXT: movq %rax, %rsi 25; CHECK-NEXT: callq ccc@PLT 26; CHECK-NEXT: decl %ebx 27; CHECK-NEXT: movl %ebx, %ecx 28; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8) 29; CHECK-NEXT: .p2align 4 30; CHECK-NEXT: .LBB0_3: # %sw.bb3 31; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 32; CHECK-NEXT: movl $532, %edi # imm = 0x214 33; CHECK-NEXT: movq %rax, %rsi 34; CHECK-NEXT: callq bbb@PLT 35; CHECK-NEXT: decl %ebx 36; CHECK-NEXT: movl %ebx, %ecx 37; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8) 38; CHECK-NEXT: .p2align 4 39; CHECK-NEXT: .LBB0_4: # %sw.bb5 40; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 41; CHECK-NEXT: movl $533, %edi # imm = 0x215 42; CHECK-NEXT: movq %rax, %rsi 43; CHECK-NEXT: callq bbb@PLT 44; CHECK-NEXT: decl %ebx 45; CHECK-NEXT: movl %ebx, %ecx 46; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8) 47; CHECK-NEXT: .p2align 4 48; CHECK-NEXT: .LBB0_5: # %sw.bb7 49; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 50; CHECK-NEXT: movl $535, %edi # imm = 0x217 51; CHECK-NEXT: movq %rax, %rsi 52; CHECK-NEXT: callq bbb@PLT 53; CHECK-NEXT: decl %ebx 54; CHECK-NEXT: movl %ebx, %ecx 55; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8) 56; CHECK-NEXT: .p2align 4 57; CHECK-NEXT: .LBB0_6: # %sw.bb9 58; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 59; CHECK-NEXT: movl $536, %edi # imm = 0x218 60; CHECK-NEXT: movq %rax, %rsi 61; CHECK-NEXT: callq ccc@PLT 62; CHECK-NEXT: decl %ebx 63; CHECK-NEXT: movl %ebx, %ecx 64; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8) 65; CHECK-NEXT: .p2align 4 66; CHECK-NEXT: .LBB0_7: # %sw.bb11 67; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 68; CHECK-NEXT: movl $658, %edi # imm = 0x292 69; CHECK-NEXT: movq %rax, %rsi 70; CHECK-NEXT: callq bbb@PLT 71; CHECK-NEXT: decl %ebx 72; CHECK-NEXT: movl %ebx, %ecx 73; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8) 74entry: 75 br label %for.body 76 77for.cond.cleanup: ; preds = %for.body 78 %call = tail call ptr @ccc(i32 signext 530, ptr %p.addr.03006) 79 ret ptr %call 80 81for.body: ; preds = %for.inc, %entry 82 %i.03007 = phi i32 [ 6, %entry ], [ %dec, %for.inc ] 83 %p.addr.03006 = phi ptr [ %p, %entry ], [ %p.addr.1, %for.inc ] 84 switch i32 %i.03007, label %for.body.unreachabledefault [ 85 i32 0, label %for.cond.cleanup 86 i32 1, label %sw.bb1 87 i32 2, label %sw.bb3 88 i32 3, label %sw.bb5 89 i32 4, label %sw.bb7 90 i32 5, label %sw.bb9 91 i32 6, label %sw.bb11 92 ] 93 94sw.bb1: ; preds = %for.body 95 %call2 = tail call ptr @ccc(i32 signext 531, ptr %p.addr.03006) 96 br label %for.inc 97 98sw.bb3: ; preds = %for.body 99 %call4 = tail call ptr @bbb(i32 signext 532, ptr %p.addr.03006) 100 br label %for.inc 101 102sw.bb5: ; preds = %for.body 103 %call6 = tail call ptr @bbb(i32 signext 533, ptr %p.addr.03006) 104 br label %for.inc 105 106sw.bb7: ; preds = %for.body 107 %call8 = tail call ptr @bbb(i32 signext 535, ptr %p.addr.03006) 108 br label %for.inc 109 110sw.bb9: ; preds = %for.body 111 %call10 = tail call ptr @ccc(i32 signext 536, ptr %p.addr.03006) 112 br label %for.inc 113 114sw.bb11: ; preds = %for.body 115 %call12 = tail call ptr @bbb(i32 signext 658, ptr %p.addr.03006) 116 br label %for.inc 117 118for.body.unreachabledefault: ; preds = %for.body 119 unreachable 120 121for.inc: ; preds = %sw.bb1, %sw.bb3, %sw.bb5, %sw.bb7, %sw.bb9, %sw.bb11 122 %p.addr.1 = phi ptr [ %call12, %sw.bb11 ], [ %call10, %sw.bb9 ], [ %call8, %sw.bb7 ], [ %call6, %sw.bb5 ], [ %call4, %sw.bb3 ], [ %call2, %sw.bb1 ] 123 %dec = add nsw i32 %i.03007, -1 124 br label %for.body 125} 126 127declare ptr @bbb(i32 signext, ptr) 128declare ptr @ccc(i32 signext, ptr) 129 130 131define i32 @interp_switch(ptr nocapture readonly %0, i32 %1) { 132; CHECK-LABEL: interp_switch: 133; CHECK: # %bb.0: 134; CHECK-NEXT: movl %esi, %eax 135; CHECK-NEXT: jmp .LBB1_1 136; CHECK-NEXT: .LBB1_7: # in Loop: Header=BB1_1 Depth=1 137; CHECK-NEXT: addl $7, %eax 138; CHECK-NEXT: incq %rdi 139; CHECK-NEXT: .p2align 4 140; CHECK-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1 141; CHECK-NEXT: movzbl (%rdi), %ecx 142; CHECK-NEXT: decl %ecx 143; CHECK-NEXT: cmpl $5, %ecx 144; CHECK-NEXT: ja .LBB1_9 145; CHECK-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1 146; CHECK-NEXT: jmpq *.LJTI1_0(,%rcx,8) 147; CHECK-NEXT: .LBB1_3: # in Loop: Header=BB1_1 Depth=1 148; CHECK-NEXT: incl %eax 149; CHECK-NEXT: incq %rdi 150; CHECK-NEXT: jmp .LBB1_1 151; CHECK-NEXT: .LBB1_5: # in Loop: Header=BB1_1 Depth=1 152; CHECK-NEXT: addl %eax, %eax 153; CHECK-NEXT: incq %rdi 154; CHECK-NEXT: jmp .LBB1_1 155; CHECK-NEXT: .LBB1_6: # in Loop: Header=BB1_1 Depth=1 156; CHECK-NEXT: movl %eax, %ecx 157; CHECK-NEXT: shrl $31, %ecx 158; CHECK-NEXT: addl %eax, %ecx 159; CHECK-NEXT: sarl %ecx 160; CHECK-NEXT: incq %rdi 161; CHECK-NEXT: movl %ecx, %eax 162; CHECK-NEXT: jmp .LBB1_1 163; CHECK-NEXT: .LBB1_4: # in Loop: Header=BB1_1 Depth=1 164; CHECK-NEXT: decl %eax 165; CHECK-NEXT: incq %rdi 166; CHECK-NEXT: jmp .LBB1_1 167; CHECK-NEXT: .LBB1_8: # in Loop: Header=BB1_1 Depth=1 168; CHECK-NEXT: negl %eax 169; CHECK-NEXT: incq %rdi 170; CHECK-NEXT: jmp .LBB1_1 171; CHECK-NEXT: .LBB1_9: 172; CHECK-NEXT: retq 173 br label %3 174 1753: ; preds = %21, %2 176 %4 = phi i64 [ 0, %2 ], [ %6, %21 ] 177 %5 = phi i32 [ %1, %2 ], [ %22, %21 ] 178 %6 = add nuw i64 %4, 1 179 %7 = getelementptr inbounds i8, ptr %0, i64 %4 180 %8 = load i8, ptr %7, align 1 181 switch i8 %8, label %23 [ 182 i8 6, label %19 183 i8 1, label %9 184 i8 2, label %11 185 i8 3, label %13 186 i8 4, label %15 187 i8 5, label %17 188 ] 189 1909: ; preds = %3 191 %10 = add nsw i32 %5, 1 192 br label %21 193 19411: ; preds = %3 195 %12 = add nsw i32 %5, -1 196 br label %21 197 19813: ; preds = %3 199 %14 = shl nsw i32 %5, 1 200 br label %21 201 20215: ; preds = %3 203 %16 = sdiv i32 %5, 2 204 br label %21 205 20617: ; preds = %3 207 %18 = add nsw i32 %5, 7 208 br label %21 209 21019: ; preds = %3 211 %20 = sub nsw i32 0, %5 212 br label %21 213 21421: ; preds = %19, %17, %15, %13, %11, %9 215 %22 = phi i32 [ %20, %19 ], [ %18, %17 ], [ %16, %15 ], [ %14, %13 ], [ %12, %11 ], [ %10, %9 ] 216 br label %3 217 21823: ; preds = %3 219 ret i32 %5 220} 221