xref: /llvm-project/llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll (revision 97982a8c605fac7c86d02e641a6cd7898b3ca343)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s -check-prefix=RV32I
4; RUN: llc -mtriple=riscv32 -target-abi ilp32e -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s -check-prefix=RV32I-ILP32E
6; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
7; RUN:   | FileCheck %s -check-prefix=RV64I
8; RUN: llc -mtriple=riscv64 -target-abi lp64e -verify-machineinstrs < %s \
9; RUN:   | FileCheck %s -check-prefix=RV64I-LP64E
10
11declare void @callee(ptr, ptr)
12
13define void @caller(i32 %n) {
14; RV32I-LABEL: caller:
15; RV32I:       # %bb.0:
16; RV32I-NEXT:    addi sp, sp, -64
17; RV32I-NEXT:    .cfi_def_cfa_offset 64
18; RV32I-NEXT:    sw ra, 60(sp) # 4-byte Folded Spill
19; RV32I-NEXT:    sw s0, 56(sp) # 4-byte Folded Spill
20; RV32I-NEXT:    sw s1, 52(sp) # 4-byte Folded Spill
21; RV32I-NEXT:    .cfi_offset ra, -4
22; RV32I-NEXT:    .cfi_offset s0, -8
23; RV32I-NEXT:    .cfi_offset s1, -12
24; RV32I-NEXT:    addi s0, sp, 64
25; RV32I-NEXT:    .cfi_def_cfa s0, 0
26; RV32I-NEXT:    andi sp, sp, -64
27; RV32I-NEXT:    mv s1, sp
28; RV32I-NEXT:    addi a0, a0, 15
29; RV32I-NEXT:    andi a0, a0, -16
30; RV32I-NEXT:    sub a0, sp, a0
31; RV32I-NEXT:    mv sp, a0
32; RV32I-NEXT:    mv a1, s1
33; RV32I-NEXT:    call callee
34; RV32I-NEXT:    addi sp, s0, -64
35; RV32I-NEXT:    .cfi_def_cfa sp, 64
36; RV32I-NEXT:    lw ra, 60(sp) # 4-byte Folded Reload
37; RV32I-NEXT:    lw s0, 56(sp) # 4-byte Folded Reload
38; RV32I-NEXT:    lw s1, 52(sp) # 4-byte Folded Reload
39; RV32I-NEXT:    .cfi_restore ra
40; RV32I-NEXT:    .cfi_restore s0
41; RV32I-NEXT:    .cfi_restore s1
42; RV32I-NEXT:    addi sp, sp, 64
43; RV32I-NEXT:    .cfi_def_cfa_offset 0
44; RV32I-NEXT:    ret
45;
46; RV32I-ILP32E-LABEL: caller:
47; RV32I-ILP32E:       # %bb.0:
48; RV32I-ILP32E-NEXT:    addi sp, sp, -64
49; RV32I-ILP32E-NEXT:    .cfi_def_cfa_offset 64
50; RV32I-ILP32E-NEXT:    sw ra, 60(sp) # 4-byte Folded Spill
51; RV32I-ILP32E-NEXT:    sw s0, 56(sp) # 4-byte Folded Spill
52; RV32I-ILP32E-NEXT:    sw s1, 52(sp) # 4-byte Folded Spill
53; RV32I-ILP32E-NEXT:    .cfi_offset ra, -4
54; RV32I-ILP32E-NEXT:    .cfi_offset s0, -8
55; RV32I-ILP32E-NEXT:    .cfi_offset s1, -12
56; RV32I-ILP32E-NEXT:    addi s0, sp, 64
57; RV32I-ILP32E-NEXT:    .cfi_def_cfa s0, 0
58; RV32I-ILP32E-NEXT:    andi sp, sp, -64
59; RV32I-ILP32E-NEXT:    mv s1, sp
60; RV32I-ILP32E-NEXT:    addi a0, a0, 3
61; RV32I-ILP32E-NEXT:    andi a0, a0, -4
62; RV32I-ILP32E-NEXT:    sub a0, sp, a0
63; RV32I-ILP32E-NEXT:    mv sp, a0
64; RV32I-ILP32E-NEXT:    mv a1, s1
65; RV32I-ILP32E-NEXT:    call callee
66; RV32I-ILP32E-NEXT:    addi sp, s0, -64
67; RV32I-ILP32E-NEXT:    .cfi_def_cfa sp, 64
68; RV32I-ILP32E-NEXT:    lw ra, 60(sp) # 4-byte Folded Reload
69; RV32I-ILP32E-NEXT:    lw s0, 56(sp) # 4-byte Folded Reload
70; RV32I-ILP32E-NEXT:    lw s1, 52(sp) # 4-byte Folded Reload
71; RV32I-ILP32E-NEXT:    .cfi_restore ra
72; RV32I-ILP32E-NEXT:    .cfi_restore s0
73; RV32I-ILP32E-NEXT:    .cfi_restore s1
74; RV32I-ILP32E-NEXT:    addi sp, sp, 64
75; RV32I-ILP32E-NEXT:    .cfi_def_cfa_offset 0
76; RV32I-ILP32E-NEXT:    ret
77;
78; RV64I-LABEL: caller:
79; RV64I:       # %bb.0:
80; RV64I-NEXT:    addi sp, sp, -64
81; RV64I-NEXT:    .cfi_def_cfa_offset 64
82; RV64I-NEXT:    sd ra, 56(sp) # 8-byte Folded Spill
83; RV64I-NEXT:    sd s0, 48(sp) # 8-byte Folded Spill
84; RV64I-NEXT:    sd s1, 40(sp) # 8-byte Folded Spill
85; RV64I-NEXT:    .cfi_offset ra, -8
86; RV64I-NEXT:    .cfi_offset s0, -16
87; RV64I-NEXT:    .cfi_offset s1, -24
88; RV64I-NEXT:    addi s0, sp, 64
89; RV64I-NEXT:    .cfi_def_cfa s0, 0
90; RV64I-NEXT:    andi sp, sp, -64
91; RV64I-NEXT:    mv s1, sp
92; RV64I-NEXT:    slli a0, a0, 32
93; RV64I-NEXT:    srli a0, a0, 32
94; RV64I-NEXT:    addi a0, a0, 15
95; RV64I-NEXT:    andi a0, a0, -16
96; RV64I-NEXT:    sub a0, sp, a0
97; RV64I-NEXT:    mv sp, a0
98; RV64I-NEXT:    mv a1, s1
99; RV64I-NEXT:    call callee
100; RV64I-NEXT:    addi sp, s0, -64
101; RV64I-NEXT:    .cfi_def_cfa sp, 64
102; RV64I-NEXT:    ld ra, 56(sp) # 8-byte Folded Reload
103; RV64I-NEXT:    ld s0, 48(sp) # 8-byte Folded Reload
104; RV64I-NEXT:    ld s1, 40(sp) # 8-byte Folded Reload
105; RV64I-NEXT:    .cfi_restore ra
106; RV64I-NEXT:    .cfi_restore s0
107; RV64I-NEXT:    .cfi_restore s1
108; RV64I-NEXT:    addi sp, sp, 64
109; RV64I-NEXT:    .cfi_def_cfa_offset 0
110; RV64I-NEXT:    ret
111;
112; RV64I-LP64E-LABEL: caller:
113; RV64I-LP64E:       # %bb.0:
114; RV64I-LP64E-NEXT:    addi sp, sp, -64
115; RV64I-LP64E-NEXT:    .cfi_def_cfa_offset 64
116; RV64I-LP64E-NEXT:    sd ra, 56(sp) # 8-byte Folded Spill
117; RV64I-LP64E-NEXT:    sd s0, 48(sp) # 8-byte Folded Spill
118; RV64I-LP64E-NEXT:    sd s1, 40(sp) # 8-byte Folded Spill
119; RV64I-LP64E-NEXT:    .cfi_offset ra, -8
120; RV64I-LP64E-NEXT:    .cfi_offset s0, -16
121; RV64I-LP64E-NEXT:    .cfi_offset s1, -24
122; RV64I-LP64E-NEXT:    addi s0, sp, 64
123; RV64I-LP64E-NEXT:    .cfi_def_cfa s0, 0
124; RV64I-LP64E-NEXT:    andi sp, sp, -64
125; RV64I-LP64E-NEXT:    mv s1, sp
126; RV64I-LP64E-NEXT:    slli a0, a0, 32
127; RV64I-LP64E-NEXT:    srli a0, a0, 32
128; RV64I-LP64E-NEXT:    addi a0, a0, 7
129; RV64I-LP64E-NEXT:    andi a0, a0, -8
130; RV64I-LP64E-NEXT:    sub a0, sp, a0
131; RV64I-LP64E-NEXT:    mv sp, a0
132; RV64I-LP64E-NEXT:    mv a1, s1
133; RV64I-LP64E-NEXT:    call callee
134; RV64I-LP64E-NEXT:    addi sp, s0, -64
135; RV64I-LP64E-NEXT:    .cfi_def_cfa sp, 64
136; RV64I-LP64E-NEXT:    ld ra, 56(sp) # 8-byte Folded Reload
137; RV64I-LP64E-NEXT:    ld s0, 48(sp) # 8-byte Folded Reload
138; RV64I-LP64E-NEXT:    ld s1, 40(sp) # 8-byte Folded Reload
139; RV64I-LP64E-NEXT:    .cfi_restore ra
140; RV64I-LP64E-NEXT:    .cfi_restore s0
141; RV64I-LP64E-NEXT:    .cfi_restore s1
142; RV64I-LP64E-NEXT:    addi sp, sp, 64
143; RV64I-LP64E-NEXT:    .cfi_def_cfa_offset 0
144; RV64I-LP64E-NEXT:    ret
145  %1 = alloca i8, i32 %n
146  %2 = alloca i32, align 64
147  call void @callee(ptr %1, ptr %2)
148  ret void
149}
150