xref: /dpdk/drivers/crypto/ccp/ccp_pmd_private.h (revision e977e4199a8d6bab72cf94e154adcad1fb964e5e)
1 /*   SPDX-License-Identifier: BSD-3-Clause
2  *   Copyright(c) 2018 Advanced Micro Devices, Inc. All rights reserved.
3  */
4 
5 #ifndef _CCP_PMD_PRIVATE_H_
6 #define _CCP_PMD_PRIVATE_H_
7 
8 #include <rte_cryptodev.h>
9 #include "ccp_crypto.h"
10 
11 #define CRYPTODEV_NAME_CCP_PMD crypto_ccp
12 
13 #define CCP_LOG_ERR(fmt, args...) \
14 	RTE_LOG(ERR, CRYPTODEV, "[%s] %s() line %u: " fmt "\n",  \
15 			RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
16 			__func__, __LINE__, ## args)
17 
18 #ifdef RTE_LIBRTE_CCP_DEBUG
19 #define CCP_LOG_INFO(fmt, args...) \
20 	RTE_LOG(INFO, CRYPTODEV, "[%s] %s() line %u: " fmt "\n", \
21 			RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
22 			__func__, __LINE__, ## args)
23 
24 #define CCP_LOG_DBG(fmt, args...) \
25 	RTE_LOG(DEBUG, CRYPTODEV, "[%s] %s() line %u: " fmt "\n", \
26 			RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
27 			__func__, __LINE__, ## args)
28 #else
29 #define CCP_LOG_INFO(fmt, args...)
30 #define CCP_LOG_DBG(fmt, args...)
31 #endif
32 
33 /**< Maximum queue pairs supported by CCP PMD */
34 #define CCP_PMD_MAX_QUEUE_PAIRS	1
35 #define CCP_NB_MAX_DESCRIPTORS 1024
36 #define CCP_MAX_BURST 64
37 
38 #include "ccp_dev.h"
39 
40 /* private data structure for each CCP crypto device */
41 struct ccp_private {
42 	unsigned int max_nb_qpairs;	/**< Max number of queue pairs */
43 	unsigned int max_nb_sessions;	/**< Max number of sessions */
44 	uint8_t crypto_num_dev;		/**< Number of working crypto devices */
45 	bool auth_opt;			/**< Authentication offload option */
46 	struct ccp_device *last_dev;	/**< Last working crypto device */
47 };
48 
49 /* CCP batch info */
50 struct ccp_batch_info {
51 	struct rte_crypto_op *op[CCP_MAX_BURST];
52 	/**< optable populated at enque time from app*/
53 	int op_idx;
54 	struct ccp_queue *cmd_q;
55 	uint16_t opcnt;
56 	/**< no. of crypto ops in batch*/
57 	int desccnt;
58 	/**< no. of ccp queue descriptors*/
59 	uint32_t head_offset;
60 	/**< ccp queue head tail offsets time of enqueue*/
61 	uint32_t tail_offset;
62 	uint8_t lsb_buf[CCP_SB_BYTES * CCP_MAX_BURST];
63 	phys_addr_t lsb_buf_phys;
64 	/**< LSB intermediate buf for passthru */
65 	int lsb_buf_idx;
66 	uint16_t auth_ctr;
67 	/**< auth only ops batch for CPU based auth */
68 } __rte_cache_aligned;
69 
70 /**< CCP crypto queue pair */
71 struct ccp_qp {
72 	uint16_t id;
73 	/**< Queue Pair Identifier */
74 	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
75 	/**< Unique Queue Pair Name */
76 	struct rte_ring *processed_pkts;
77 	/**< Ring for placing process packets */
78 	struct rte_mempool *sess_mp;
79 	/**< Session Mempool */
80 	struct rte_mempool *batch_mp;
81 	/**< Session Mempool for batch info */
82 	struct rte_cryptodev_stats qp_stats;
83 	/**< Queue pair statistics */
84 	struct ccp_batch_info *b_info;
85 	/**< Store ops pulled out of queue */
86 	struct rte_cryptodev *dev;
87 	/**< rte crypto device to which this qp belongs */
88 	uint8_t temp_digest[DIGEST_LENGTH_MAX];
89 	/**< Buffer used to store the digest generated
90 	 * by the driver when verifying a digest provided
91 	 * by the user (using authentication verify operation)
92 	 */
93 } __rte_cache_aligned;
94 
95 
96 /**< device specific operations function pointer structure */
97 extern struct rte_cryptodev_ops *ccp_pmd_ops;
98 
99 uint16_t
100 ccp_cpu_pmd_enqueue_burst(void *queue_pair,
101 			  struct rte_crypto_op **ops,
102 			  uint16_t nb_ops);
103 uint16_t
104 ccp_cpu_pmd_dequeue_burst(void *queue_pair,
105 			  struct rte_crypto_op **ops,
106 			  uint16_t nb_ops);
107 
108 #endif /* _CCP_PMD_PRIVATE_H_ */
109