History log of /dpdk/drivers/crypto/ccp/ccp_pmd_private.h (Results 1 – 12 of 12)
Revision Date Author Comments
# 2b843cac 13-Dec-2023 David Marchand <david.marchand@redhat.com>

drivers: use per line logging in helpers

Use RTE_LOG(_DP)?_LINE(_PREFIX)? in existing macros that append a \n.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Chengwen Feng <fen

drivers: use per line logging in helpers

Use RTE_LOG(_DP)?_LINE(_PREFIX)? in existing macros that append a \n.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Thomas Monjalon <thomas@monjalon.net>

show more ...


# 0d526c7a 25-Jun-2024 David Marchand <david.marchand@redhat.com>

crypto/ccp: use a dynamic logtype

Register a logtype for this bus driver and stop logging as CRYPTODEV.

Signed-off-by: David Marchand <david.marchand@redhat.com>


# 27595cd8 15-Apr-2024 Tyler Retzlaff <roretzla@linux.microsoft.com>

drivers: move alignment attribute on types for MSVC

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment

drivers: move alignment attribute on types for MSVC

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>

show more ...


# bdce2564 04-Oct-2022 Akhil Goyal <gakhil@marvell.com>

cryptodev: rework session framework

As per current design, rte_cryptodev_sym_session_create() and
rte_cryptodev_sym_session_init() use separate mempool objects
for a single session.
And structure rt

cryptodev: rework session framework

As per current design, rte_cryptodev_sym_session_create() and
rte_cryptodev_sym_session_init() use separate mempool objects
for a single session.
And structure rte_cryptodev_sym_session is not directly used
by the application, it may cause ABI breakage if the structure
is modified in future.

To address these two issues, the rte_cryptodev_sym_session_create
will take one mempool object that the session and session private
data are virtually/physically contiguous, and initializes both
fields. The API rte_cryptodev_sym_session_init is removed.

rte_cryptodev_sym_session_create will now return an opaque session
pointer which will be used by the app and other APIs.

In data path, opaque session pointer is attached to rte_crypto_op
and the PMD can call an internal library API to get the session
private data pointer based on the driver id.

Note: currently single session may be used by different device
drivers, given it is initialized by them. After the change the
session created by one device driver cannot be used or
reinitialized by another driver.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Kai Ji <kai.ji@intel.com>
Tested-by: Gagandeep Singh <g.singh@nxp.com>
Tested-by: David Coyle <david.coyle@intel.com>
Tested-by: Kevin O'Sullivan <kevin.osullivan@intel.com>

show more ...


# 72775857 22-Nov-2019 Amaranath Somalapuram <asomalap@amd.com>

crypto/ccp: fix scheduling of burst

CCP driver was scheduling only one CCP in a single burst(enqueue).
Effective throughput was limited to 1 CCP performance.
Scheduling multiple ccp within one burst

crypto/ccp: fix scheduling of burst

CCP driver was scheduling only one CCP in a single burst(enqueue).
Effective throughput was limited to 1 CCP performance.
Scheduling multiple ccp within one burst will increase the ccp performance.
this changes will divide the enqueue packets equally among the multiple CCP

Fixes: e0d88a394e ("crypto/ccp: support run-time CPU based auth")
Cc: stable@dpdk.org

Signed-off-by: Amaranath Somalapuram <asomalap@amd.com>

show more ...


# 0121f275 22-Nov-2019 Amaranath Somalapuram <asomalap@amd.com>

crypto/ccp: fix maximum queues and burst size

CCP driver crash when running l2fwd
issue happen when changing MAX_PKT_BURST 32 to 256
increasing the CCP qp to 8 and CCP_MAX_BURST to 256

Fixes: ef4b0

crypto/ccp: fix maximum queues and burst size

CCP driver crash when running l2fwd
issue happen when changing MAX_PKT_BURST 32 to 256
increasing the CCP qp to 8 and CCP_MAX_BURST to 256

Fixes: ef4b04f87f ("crypto/ccp: support device init")
Cc: stable@dpdk.org

Signed-off-by: Amaranath Somalapuram <asomalap@amd.com>

show more ...


# 725d2a7f 10-Jan-2019 Fan Zhang <roy.fan.zhang@intel.com>

cryptodev: change queue pair configure structure

This patch changes the cryptodev queue pair configure structure
to enable two mempool passed into cryptodev PMD simutaneously.

Signed-off-by: Fan Zh

cryptodev: change queue pair configure structure

This patch changes the cryptodev queue pair configure structure
to enable two mempool passed into cryptodev PMD simutaneously.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

show more ...


# e1fc5b76 05-Jul-2018 Pablo de Lara <pablo.de.lara.guarch@intel.com>

cryptodev: remove max number of sessions parameter

Most crypto PMDs do not have a limitation
of the number of the sessions that can be handled
internally. The value that was set before was not
actua

cryptodev: remove max number of sessions parameter

Most crypto PMDs do not have a limitation
of the number of the sessions that can be handled
internally. The value that was set before was not
actually used at all, since the sessions are created
at the application level.
Therefore, this value is not parsed from the initial
crypto parameters anymore and it is set to 0,
meaning that there is no actual limit.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

show more ...


# e0d88a39 10-May-2018 Ravi Kumar <ravi1.kumar@amd.com>

crypto/ccp: support run-time CPU based auth

CCP PMD supports authentication offload to either of CCP or CPU.
The earlier version of patch provides this option as compile time.
This patch changes thi

crypto/ccp: support run-time CPU based auth

CCP PMD supports authentication offload to either of CCP or CPU.
The earlier version of patch provides this option as compile time.
This patch changes this option from compile time to run time.
User can pass "ccp_auth_opt=1" as an additional arguments to vdev
parameter to enable authentication operations on CPU.

Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>

show more ...


# 6c561b03 19-Mar-2018 Ravi Kumar <ravi1.kumar@amd.com>

crypto/ccp: support CPU based MD5 and SHA2 family

Auth operations can be performed on CPU without offloading
to CCP if CONFIG_RTE_LIBRTE_PMD_CCP_CPU_AUTH is enabled in
DPDK configuration. CCP PMD sk

crypto/ccp: support CPU based MD5 and SHA2 family

Auth operations can be performed on CPU without offloading
to CCP if CONFIG_RTE_LIBRTE_PMD_CCP_CPU_AUTH is enabled in
DPDK configuration. CCP PMD skip offloading auth operations
to hardware engines and perform them using openssl APIs.

Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>

show more ...


# 3c20cf98 19-Mar-2018 Ravi Kumar <ravi1.kumar@amd.com>

crypto/ccp: support basic PMD ops

Added device specific basic crypto ops callback functions.

Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>


# ef4b04f8 19-Mar-2018 Ravi Kumar <ravi1.kumar@amd.com>

crypto/ccp: support device init

CCP PMD is a virtual crypto PMD which schedules a number of available
actual CCP hardware engines underneath. The PMD
manages all devices by its own. The PMD supports

crypto/ccp: support device init

CCP PMD is a virtual crypto PMD which schedules a number of available
actual CCP hardware engines underneath. The PMD
manages all devices by its own. The PMD supports CCP_5a and
CCP_5b versions of crypto engines and this patch adds support
to initialize and use such devices.

Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>

show more ...