1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Advanced Micro Devices, Inc. All rights reserved. 3 */ 4 5 #ifndef _CCP_PMD_PRIVATE_H_ 6 #define _CCP_PMD_PRIVATE_H_ 7 8 #include <rte_cryptodev.h> 9 #include "ccp_crypto.h" 10 11 extern int crypto_ccp_logtype; 12 #define RTE_LOGTYPE_CRYPTO_CCP crypto_ccp_logtype 13 14 #define CCP_LOG_ERR(...) \ 15 RTE_LOG_LINE_PREFIX(ERR, CRYPTO_CCP, "%s() line %u: ", \ 16 __func__ RTE_LOG_COMMA __LINE__, __VA_ARGS__) 17 18 #ifdef RTE_LIBRTE_CCP_DEBUG 19 #define CCP_LOG_INFO(...) \ 20 RTE_LOG_LINE_PREFIX(INFO, CRYPTO_CCP, "%s() line %u: ", \ 21 __func__ RTE_LOG_COMMA __LINE__, __VA_ARGS__) 22 23 #define CCP_LOG_DBG(...) \ 24 RTE_LOG_LINE_PREFIX(DEBUG, CRYPTO_CCP, "%s() line %u: ", \ 25 __func__ RTE_LOG_COMMA __LINE__, __VA_ARGS__) 26 #else 27 #define CCP_LOG_INFO(...) 28 #define CCP_LOG_DBG(...) 29 #endif 30 31 /**< Maximum queue pairs supported by CCP PMD */ 32 #define CCP_PMD_MAX_QUEUE_PAIRS 8 33 #define CCP_NB_MAX_DESCRIPTORS 1024 34 #define CCP_MAX_BURST 256 35 36 #include "ccp_dev.h" 37 38 /* private data structure for each CCP crypto device */ 39 struct ccp_private { 40 unsigned int max_nb_qpairs; /**< Max number of queue pairs */ 41 uint8_t crypto_num_dev; /**< Number of working crypto devices */ 42 bool auth_opt; /**< Authentication offload option */ 43 struct ccp_device *last_dev; /**< Last working crypto device */ 44 }; 45 46 /* CCP batch info */ 47 struct __rte_cache_aligned ccp_batch_info { 48 struct rte_crypto_op *op[CCP_MAX_BURST]; 49 /**< optable populated at enque time from app*/ 50 int op_idx; 51 uint16_t b_idx; 52 struct ccp_queue *cmd_q; 53 uint16_t opcnt; 54 uint16_t total_nb_ops; 55 /**< no. of crypto ops in batch*/ 56 int desccnt; 57 /**< no. of ccp queue descriptors*/ 58 uint32_t head_offset; 59 /**< ccp queue head tail offsets time of enqueue*/ 60 uint32_t tail_offset; 61 uint8_t lsb_buf[CCP_SB_BYTES * CCP_MAX_BURST]; 62 phys_addr_t lsb_buf_phys; 63 /**< LSB intermediate buf for passthru */ 64 int lsb_buf_idx; 65 uint16_t auth_ctr; 66 /**< auth only ops batch for CPU based auth */ 67 }; 68 69 /**< CCP crypto queue pair */ 70 struct __rte_cache_aligned ccp_qp { 71 uint16_t id; 72 /**< Queue Pair Identifier */ 73 char name[RTE_CRYPTODEV_NAME_MAX_LEN]; 74 /**< Unique Queue Pair Name */ 75 struct rte_ring *processed_pkts; 76 /**< Ring for placing process packets */ 77 struct rte_mempool *sess_mp; 78 /**< Session Mempool */ 79 struct rte_mempool *batch_mp; 80 /**< Session Mempool for batch info */ 81 struct rte_cryptodev_stats qp_stats; 82 /**< Queue pair statistics */ 83 struct ccp_batch_info *b_info; 84 /**< Store ops pulled out of queue */ 85 struct rte_cryptodev *dev; 86 /**< rte crypto device to which this qp belongs */ 87 uint8_t temp_digest[DIGEST_LENGTH_MAX]; 88 /**< Buffer used to store the digest generated 89 * by the driver when verifying a digest provided 90 * by the user (using authentication verify operation) 91 */ 92 }; 93 94 95 /**< device specific operations function pointer structure */ 96 extern struct rte_cryptodev_ops *ccp_pmd_ops; 97 98 uint16_t 99 ccp_cpu_pmd_enqueue_burst(void *queue_pair, 100 struct rte_crypto_op **ops, 101 uint16_t nb_ops); 102 uint16_t 103 ccp_cpu_pmd_dequeue_burst(void *queue_pair, 104 struct rte_crypto_op **ops, 105 uint16_t nb_ops); 106 107 #endif /* _CCP_PMD_PRIVATE_H_ */ 108