xref: /dpdk/drivers/crypto/ccp/ccp_pmd_private.h (revision 3c20cf98e2c99e6178585299056f3fb6d08467f3)
1ef4b04f8SRavi Kumar /*   SPDX-License-Identifier: BSD-3-Clause
2ef4b04f8SRavi Kumar  *   Copyright(c) 2018 Advanced Micro Devices, Inc. All rights reserved.
3ef4b04f8SRavi Kumar  */
4ef4b04f8SRavi Kumar 
5ef4b04f8SRavi Kumar #ifndef _CCP_PMD_PRIVATE_H_
6ef4b04f8SRavi Kumar #define _CCP_PMD_PRIVATE_H_
7ef4b04f8SRavi Kumar 
8ef4b04f8SRavi Kumar #include <rte_cryptodev.h>
9ef4b04f8SRavi Kumar 
10ef4b04f8SRavi Kumar #define CRYPTODEV_NAME_CCP_PMD crypto_ccp
11ef4b04f8SRavi Kumar 
12ef4b04f8SRavi Kumar #define CCP_LOG_ERR(fmt, args...) \
13ef4b04f8SRavi Kumar 	RTE_LOG(ERR, CRYPTODEV, "[%s] %s() line %u: " fmt "\n",  \
14ef4b04f8SRavi Kumar 			RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
15ef4b04f8SRavi Kumar 			__func__, __LINE__, ## args)
16ef4b04f8SRavi Kumar 
17ef4b04f8SRavi Kumar #ifdef RTE_LIBRTE_CCP_DEBUG
18ef4b04f8SRavi Kumar #define CCP_LOG_INFO(fmt, args...) \
19ef4b04f8SRavi Kumar 	RTE_LOG(INFO, CRYPTODEV, "[%s] %s() line %u: " fmt "\n", \
20ef4b04f8SRavi Kumar 			RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
21ef4b04f8SRavi Kumar 			__func__, __LINE__, ## args)
22ef4b04f8SRavi Kumar 
23ef4b04f8SRavi Kumar #define CCP_LOG_DBG(fmt, args...) \
24ef4b04f8SRavi Kumar 	RTE_LOG(DEBUG, CRYPTODEV, "[%s] %s() line %u: " fmt "\n", \
25ef4b04f8SRavi Kumar 			RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
26ef4b04f8SRavi Kumar 			__func__, __LINE__, ## args)
27ef4b04f8SRavi Kumar #else
28ef4b04f8SRavi Kumar #define CCP_LOG_INFO(fmt, args...)
29ef4b04f8SRavi Kumar #define CCP_LOG_DBG(fmt, args...)
30ef4b04f8SRavi Kumar #endif
31ef4b04f8SRavi Kumar 
32ef4b04f8SRavi Kumar /**< Maximum queue pairs supported by CCP PMD */
33ef4b04f8SRavi Kumar #define CCP_PMD_MAX_QUEUE_PAIRS	1
34ef4b04f8SRavi Kumar #define CCP_NB_MAX_DESCRIPTORS 1024
35ef4b04f8SRavi Kumar #define CCP_MAX_BURST 64
36ef4b04f8SRavi Kumar 
37*3c20cf98SRavi Kumar #include "ccp_dev.h"
38*3c20cf98SRavi Kumar 
39ef4b04f8SRavi Kumar /* private data structure for each CCP crypto device */
40ef4b04f8SRavi Kumar struct ccp_private {
41ef4b04f8SRavi Kumar 	unsigned int max_nb_qpairs;	/**< Max number of queue pairs */
42ef4b04f8SRavi Kumar 	unsigned int max_nb_sessions;	/**< Max number of sessions */
43ef4b04f8SRavi Kumar 	uint8_t crypto_num_dev;		/**< Number of working crypto devices */
44*3c20cf98SRavi Kumar 	struct ccp_device *last_dev;	/**< Last working crypto device */
45ef4b04f8SRavi Kumar };
46ef4b04f8SRavi Kumar 
47*3c20cf98SRavi Kumar /* CCP batch info */
48*3c20cf98SRavi Kumar struct ccp_batch_info {
49*3c20cf98SRavi Kumar 	struct rte_crypto_op *op[CCP_MAX_BURST];
50*3c20cf98SRavi Kumar 	/**< optable populated at enque time from app*/
51*3c20cf98SRavi Kumar 	int op_idx;
52*3c20cf98SRavi Kumar 	struct ccp_queue *cmd_q;
53*3c20cf98SRavi Kumar 	uint16_t opcnt;
54*3c20cf98SRavi Kumar 	/**< no. of crypto ops in batch*/
55*3c20cf98SRavi Kumar 	int desccnt;
56*3c20cf98SRavi Kumar 	/**< no. of ccp queue descriptors*/
57*3c20cf98SRavi Kumar 	uint32_t head_offset;
58*3c20cf98SRavi Kumar 	/**< ccp queue head tail offsets time of enqueue*/
59*3c20cf98SRavi Kumar 	uint32_t tail_offset;
60*3c20cf98SRavi Kumar 	uint8_t lsb_buf[CCP_SB_BYTES * CCP_MAX_BURST];
61*3c20cf98SRavi Kumar 	phys_addr_t lsb_buf_phys;
62*3c20cf98SRavi Kumar 	/**< LSB intermediate buf for passthru */
63*3c20cf98SRavi Kumar 	int lsb_buf_idx;
64*3c20cf98SRavi Kumar } __rte_cache_aligned;
65*3c20cf98SRavi Kumar 
66*3c20cf98SRavi Kumar /**< CCP crypto queue pair */
67*3c20cf98SRavi Kumar struct ccp_qp {
68*3c20cf98SRavi Kumar 	uint16_t id;
69*3c20cf98SRavi Kumar 	/**< Queue Pair Identifier */
70*3c20cf98SRavi Kumar 	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
71*3c20cf98SRavi Kumar 	/**< Unique Queue Pair Name */
72*3c20cf98SRavi Kumar 	struct rte_ring *processed_pkts;
73*3c20cf98SRavi Kumar 	/**< Ring for placing process packets */
74*3c20cf98SRavi Kumar 	struct rte_mempool *sess_mp;
75*3c20cf98SRavi Kumar 	/**< Session Mempool */
76*3c20cf98SRavi Kumar 	struct rte_mempool *batch_mp;
77*3c20cf98SRavi Kumar 	/**< Session Mempool for batch info */
78*3c20cf98SRavi Kumar 	struct rte_cryptodev_stats qp_stats;
79*3c20cf98SRavi Kumar 	/**< Queue pair statistics */
80*3c20cf98SRavi Kumar 	struct ccp_batch_info *b_info;
81*3c20cf98SRavi Kumar 	/**< Store ops pulled out of queue */
82*3c20cf98SRavi Kumar 	struct rte_cryptodev *dev;
83*3c20cf98SRavi Kumar 	/**< rte crypto device to which this qp belongs */
84*3c20cf98SRavi Kumar } __rte_cache_aligned;
85*3c20cf98SRavi Kumar 
86*3c20cf98SRavi Kumar 
87ef4b04f8SRavi Kumar /**< device specific operations function pointer structure */
88ef4b04f8SRavi Kumar extern struct rte_cryptodev_ops *ccp_pmd_ops;
89ef4b04f8SRavi Kumar 
90ef4b04f8SRavi Kumar uint16_t
91ef4b04f8SRavi Kumar ccp_cpu_pmd_enqueue_burst(void *queue_pair,
92ef4b04f8SRavi Kumar 			  struct rte_crypto_op **ops,
93ef4b04f8SRavi Kumar 			  uint16_t nb_ops);
94ef4b04f8SRavi Kumar uint16_t
95ef4b04f8SRavi Kumar ccp_cpu_pmd_dequeue_burst(void *queue_pair,
96ef4b04f8SRavi Kumar 			  struct rte_crypto_op **ops,
97ef4b04f8SRavi Kumar 			  uint16_t nb_ops);
98ef4b04f8SRavi Kumar 
99ef4b04f8SRavi Kumar #endif /* _CCP_PMD_PRIVATE_H_ */
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