1ef4b04f8SRavi Kumar /* SPDX-License-Identifier: BSD-3-Clause 2ef4b04f8SRavi Kumar * Copyright(c) 2018 Advanced Micro Devices, Inc. All rights reserved. 3ef4b04f8SRavi Kumar */ 4ef4b04f8SRavi Kumar 5ef4b04f8SRavi Kumar #ifndef _CCP_PMD_PRIVATE_H_ 6ef4b04f8SRavi Kumar #define _CCP_PMD_PRIVATE_H_ 7ef4b04f8SRavi Kumar 8ef4b04f8SRavi Kumar #include <rte_cryptodev.h> 96c561b03SRavi Kumar #include "ccp_crypto.h" 10ef4b04f8SRavi Kumar 110d526c7aSDavid Marchand extern int crypto_ccp_logtype; 120d526c7aSDavid Marchand #define RTE_LOGTYPE_CRYPTO_CCP crypto_ccp_logtype 13ef4b04f8SRavi Kumar 14*2b843cacSDavid Marchand #define CCP_LOG_ERR(...) \ 15*2b843cacSDavid Marchand RTE_LOG_LINE_PREFIX(ERR, CRYPTO_CCP, "%s() line %u: ", \ 16*2b843cacSDavid Marchand __func__ RTE_LOG_COMMA __LINE__, __VA_ARGS__) 17ef4b04f8SRavi Kumar 18ef4b04f8SRavi Kumar #ifdef RTE_LIBRTE_CCP_DEBUG 19*2b843cacSDavid Marchand #define CCP_LOG_INFO(...) \ 20*2b843cacSDavid Marchand RTE_LOG_LINE_PREFIX(INFO, CRYPTO_CCP, "%s() line %u: ", \ 21*2b843cacSDavid Marchand __func__ RTE_LOG_COMMA __LINE__, __VA_ARGS__) 22ef4b04f8SRavi Kumar 23*2b843cacSDavid Marchand #define CCP_LOG_DBG(...) \ 24*2b843cacSDavid Marchand RTE_LOG_LINE_PREFIX(DEBUG, CRYPTO_CCP, "%s() line %u: ", \ 25*2b843cacSDavid Marchand __func__ RTE_LOG_COMMA __LINE__, __VA_ARGS__) 26ef4b04f8SRavi Kumar #else 27*2b843cacSDavid Marchand #define CCP_LOG_INFO(...) 28*2b843cacSDavid Marchand #define CCP_LOG_DBG(...) 29ef4b04f8SRavi Kumar #endif 30ef4b04f8SRavi Kumar 31ef4b04f8SRavi Kumar /**< Maximum queue pairs supported by CCP PMD */ 320121f275SAmaranath Somalapuram #define CCP_PMD_MAX_QUEUE_PAIRS 8 33ef4b04f8SRavi Kumar #define CCP_NB_MAX_DESCRIPTORS 1024 340121f275SAmaranath Somalapuram #define CCP_MAX_BURST 256 35ef4b04f8SRavi Kumar 363c20cf98SRavi Kumar #include "ccp_dev.h" 373c20cf98SRavi Kumar 38ef4b04f8SRavi Kumar /* private data structure for each CCP crypto device */ 39ef4b04f8SRavi Kumar struct ccp_private { 40ef4b04f8SRavi Kumar unsigned int max_nb_qpairs; /**< Max number of queue pairs */ 41ef4b04f8SRavi Kumar uint8_t crypto_num_dev; /**< Number of working crypto devices */ 42e0d88a39SRavi Kumar bool auth_opt; /**< Authentication offload option */ 433c20cf98SRavi Kumar struct ccp_device *last_dev; /**< Last working crypto device */ 44ef4b04f8SRavi Kumar }; 45ef4b04f8SRavi Kumar 463c20cf98SRavi Kumar /* CCP batch info */ 4727595cd8STyler Retzlaff struct __rte_cache_aligned ccp_batch_info { 483c20cf98SRavi Kumar struct rte_crypto_op *op[CCP_MAX_BURST]; 493c20cf98SRavi Kumar /**< optable populated at enque time from app*/ 503c20cf98SRavi Kumar int op_idx; 5172775857SAmaranath Somalapuram uint16_t b_idx; 523c20cf98SRavi Kumar struct ccp_queue *cmd_q; 533c20cf98SRavi Kumar uint16_t opcnt; 5472775857SAmaranath Somalapuram uint16_t total_nb_ops; 553c20cf98SRavi Kumar /**< no. of crypto ops in batch*/ 563c20cf98SRavi Kumar int desccnt; 573c20cf98SRavi Kumar /**< no. of ccp queue descriptors*/ 583c20cf98SRavi Kumar uint32_t head_offset; 593c20cf98SRavi Kumar /**< ccp queue head tail offsets time of enqueue*/ 603c20cf98SRavi Kumar uint32_t tail_offset; 613c20cf98SRavi Kumar uint8_t lsb_buf[CCP_SB_BYTES * CCP_MAX_BURST]; 623c20cf98SRavi Kumar phys_addr_t lsb_buf_phys; 633c20cf98SRavi Kumar /**< LSB intermediate buf for passthru */ 643c20cf98SRavi Kumar int lsb_buf_idx; 656c561b03SRavi Kumar uint16_t auth_ctr; 66e0d88a39SRavi Kumar /**< auth only ops batch for CPU based auth */ 6727595cd8STyler Retzlaff }; 683c20cf98SRavi Kumar 693c20cf98SRavi Kumar /**< CCP crypto queue pair */ 7027595cd8STyler Retzlaff struct __rte_cache_aligned ccp_qp { 713c20cf98SRavi Kumar uint16_t id; 723c20cf98SRavi Kumar /**< Queue Pair Identifier */ 733c20cf98SRavi Kumar char name[RTE_CRYPTODEV_NAME_MAX_LEN]; 743c20cf98SRavi Kumar /**< Unique Queue Pair Name */ 753c20cf98SRavi Kumar struct rte_ring *processed_pkts; 763c20cf98SRavi Kumar /**< Ring for placing process packets */ 773c20cf98SRavi Kumar struct rte_mempool *sess_mp; 783c20cf98SRavi Kumar /**< Session Mempool */ 793c20cf98SRavi Kumar struct rte_mempool *batch_mp; 803c20cf98SRavi Kumar /**< Session Mempool for batch info */ 813c20cf98SRavi Kumar struct rte_cryptodev_stats qp_stats; 823c20cf98SRavi Kumar /**< Queue pair statistics */ 833c20cf98SRavi Kumar struct ccp_batch_info *b_info; 843c20cf98SRavi Kumar /**< Store ops pulled out of queue */ 853c20cf98SRavi Kumar struct rte_cryptodev *dev; 863c20cf98SRavi Kumar /**< rte crypto device to which this qp belongs */ 876c561b03SRavi Kumar uint8_t temp_digest[DIGEST_LENGTH_MAX]; 886c561b03SRavi Kumar /**< Buffer used to store the digest generated 896c561b03SRavi Kumar * by the driver when verifying a digest provided 906c561b03SRavi Kumar * by the user (using authentication verify operation) 916c561b03SRavi Kumar */ 9227595cd8STyler Retzlaff }; 933c20cf98SRavi Kumar 943c20cf98SRavi Kumar 95ef4b04f8SRavi Kumar /**< device specific operations function pointer structure */ 96ef4b04f8SRavi Kumar extern struct rte_cryptodev_ops *ccp_pmd_ops; 97ef4b04f8SRavi Kumar 98ef4b04f8SRavi Kumar uint16_t 99ef4b04f8SRavi Kumar ccp_cpu_pmd_enqueue_burst(void *queue_pair, 100ef4b04f8SRavi Kumar struct rte_crypto_op **ops, 101ef4b04f8SRavi Kumar uint16_t nb_ops); 102ef4b04f8SRavi Kumar uint16_t 103ef4b04f8SRavi Kumar ccp_cpu_pmd_dequeue_burst(void *queue_pair, 104ef4b04f8SRavi Kumar struct rte_crypto_op **ops, 105ef4b04f8SRavi Kumar uint16_t nb_ops); 106ef4b04f8SRavi Kumar 107ef4b04f8SRavi Kumar #endif /* _CCP_PMD_PRIVATE_H_ */ 108