1 //========- unittests/Support/Host.cpp - Host.cpp tests --------------========// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/TargetParser/Host.h" 10 #include "llvm/ADT/SmallVector.h" 11 #include "llvm/Config/config.h" 12 #include "llvm/Support/FileSystem.h" 13 #include "llvm/Support/Path.h" 14 #include "llvm/Support/Program.h" 15 #include "llvm/Support/Threading.h" 16 #include "llvm/TargetParser/Triple.h" 17 18 #include "gtest/gtest.h" 19 20 #define ASSERT_NO_ERROR(x) \ 21 if (std::error_code ASSERT_NO_ERROR_ec = x) { \ 22 SmallString<128> MessageStorage; \ 23 raw_svector_ostream Message(MessageStorage); \ 24 Message << #x ": did not return errc::success.\n" \ 25 << "error number: " << ASSERT_NO_ERROR_ec.value() << "\n" \ 26 << "error message: " << ASSERT_NO_ERROR_ec.message() << "\n"; \ 27 GTEST_FATAL_FAILURE_(MessageStorage.c_str()); \ 28 } else { \ 29 } 30 31 using namespace llvm; 32 33 TEST(getLinuxHostCPUName, ARM) { 34 StringRef CortexA9ProcCpuinfo = R"( 35 processor : 0 36 model name : ARMv7 Processor rev 10 (v7l) 37 BogoMIPS : 1393.66 38 Features : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32 39 CPU implementer : 0x41 40 CPU architecture: 7 41 CPU variant : 0x2 42 CPU part : 0xc09 43 CPU revision : 10 44 45 processor : 1 46 model name : ARMv7 Processor rev 10 (v7l) 47 BogoMIPS : 1393.66 48 Features : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32 49 CPU implementer : 0x41 50 CPU architecture: 7 51 CPU variant : 0x2 52 CPU part : 0xc09 53 CPU revision : 10 54 55 Hardware : Generic OMAP4 (Flattened Device Tree) 56 Revision : 0000 57 Serial : 0000000000000000 58 )"; 59 60 EXPECT_EQ(sys::detail::getHostCPUNameForARM(CortexA9ProcCpuinfo), 61 "cortex-a9"); 62 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 63 "CPU part : 0xc0f"), 64 "cortex-a15"); 65 // Verify that both CPU implementer and CPU part are checked: 66 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x40\n" 67 "CPU part : 0xc0f"), 68 "generic"); 69 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" 70 "CPU part : 0x06f"), 71 "krait"); 72 } 73 74 TEST(getLinuxHostCPUName, AArch64) { 75 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 76 "CPU part : 0xd03"), 77 "cortex-a53"); 78 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 79 "CPU part : 0xd05"), 80 "cortex-a55"); 81 82 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 83 "CPU part : 0xd40"), 84 "neoverse-v1"); 85 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 86 "CPU part : 0xd4f"), 87 "neoverse-v2"); 88 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 89 "CPU part : 0xd84"), 90 "neoverse-v3"); 91 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 92 "CPU part : 0xd0c"), 93 "neoverse-n1"); 94 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 95 "CPU part : 0xd49"), 96 "neoverse-n2"); 97 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 98 "CPU part : 0xd8e"), 99 "neoverse-n3"); 100 // Verify that both CPU implementer and CPU part are checked: 101 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x40\n" 102 "CPU part : 0xd03"), 103 "generic"); 104 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" 105 "CPU part : 0x201"), 106 "kryo"); 107 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" 108 "CPU part : 0x800"), 109 "cortex-a73"); 110 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" 111 "CPU part : 0x801"), 112 "cortex-a73"); 113 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 114 "CPU part : 0xd46"), 115 "cortex-a510"); 116 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 117 "CPU part : 0xd47"), 118 "cortex-a710"); 119 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" 120 "CPU part : 0xd48"), 121 "cortex-x2"); 122 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" 123 "CPU part : 0xc00"), 124 "falkor"); 125 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" 126 "CPU part : 0xc01"), 127 "saphira"); 128 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x6d\n" 129 "CPU part : 0xd49"), 130 "neoverse-n2"); 131 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0xc0\n" 132 "CPU part : 0xac3"), 133 "ampere1"); 134 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0xc0\n" 135 "CPU part : 0xac4"), 136 "ampere1a"); 137 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0xc0\n" 138 "CPU part : 0xac5"), 139 "ampere1b"); 140 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" 141 "CPU part : 0x001"), 142 "oryon-1"); 143 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x46\n" 144 "CPU part : 0x003"), 145 "fujitsu-monaka"); 146 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x61\n" 147 "CPU part : 0x039"), 148 "apple-m2"); 149 150 // MSM8992/4 weirdness 151 StringRef MSM8992ProcCpuInfo = R"( 152 Processor : AArch64 Processor rev 3 (aarch64) 153 processor : 0 154 processor : 1 155 processor : 2 156 processor : 3 157 processor : 4 158 processor : 5 159 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 160 CPU implementer : 0x41 161 CPU architecture: 8 162 CPU variant : 0x0 163 CPU part : 0xd03 164 CPU revision : 3 165 166 Hardware : Qualcomm Technologies, Inc MSM8992 167 )"; 168 169 EXPECT_EQ(sys::detail::getHostCPUNameForARM(MSM8992ProcCpuInfo), 170 "cortex-a53"); 171 172 // Exynos big.LITTLE weirdness 173 const std::string ExynosProcCpuInfo = R"( 174 processor : 0 175 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 176 CPU implementer : 0x41 177 CPU architecture: 8 178 CPU variant : 0x0 179 CPU part : 0xd05 180 181 processor : 1 182 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 183 CPU implementer : 0x53 184 CPU architecture: 8 185 )"; 186 187 // Verify default for Exynos. 188 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ExynosProcCpuInfo + 189 "CPU variant : 0xc\n" 190 "CPU part : 0xafe"), 191 "exynos-m3"); 192 // Verify Exynos M3. 193 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ExynosProcCpuInfo + 194 "CPU variant : 0x1\n" 195 "CPU part : 0x002"), 196 "exynos-m3"); 197 // Verify Exynos M4. 198 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ExynosProcCpuInfo + 199 "CPU variant : 0x1\n" 200 "CPU part : 0x003"), 201 "exynos-m4"); 202 203 const std::string ThunderX2T99ProcCpuInfo = R"( 204 processor : 0 205 BogoMIPS : 400.00 206 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics 207 CPU implementer : 0x43 208 CPU architecture: 8 209 CPU variant : 0x1 210 CPU part : 0x0af 211 )"; 212 213 // Verify different versions of ThunderX2T99. 214 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo + 215 "CPU implementer : 0x42\n" 216 "CPU part : 0x516"), 217 "thunderx2t99"); 218 219 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo + 220 "CPU implementer : 0x42\n" 221 "CPU part : 0x0516"), 222 "thunderx2t99"); 223 224 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo + 225 "CPU implementer : 0x43\n" 226 "CPU part : 0x516"), 227 "thunderx2t99"); 228 229 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo + 230 "CPU implementer : 0x43\n" 231 "CPU part : 0x0516"), 232 "thunderx2t99"); 233 234 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo + 235 "CPU implementer : 0x42\n" 236 "CPU part : 0xaf"), 237 "thunderx2t99"); 238 239 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo + 240 "CPU implementer : 0x42\n" 241 "CPU part : 0x0af"), 242 "thunderx2t99"); 243 244 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo + 245 "CPU implementer : 0x43\n" 246 "CPU part : 0xaf"), 247 "thunderx2t99"); 248 249 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo + 250 "CPU implementer : 0x43\n" 251 "CPU part : 0x0af"), 252 "thunderx2t99"); 253 254 // Verify ThunderXT88. 255 const std::string ThunderXT88ProcCpuInfo = R"( 256 processor : 0 257 BogoMIPS : 200.00 258 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 259 CPU implementer : 0x43 260 CPU architecture: 8 261 CPU variant : 0x1 262 CPU part : 0x0a1 263 )"; 264 265 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderXT88ProcCpuInfo + 266 "CPU implementer : 0x43\n" 267 "CPU part : 0x0a1"), 268 "thunderxt88"); 269 270 EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderXT88ProcCpuInfo + 271 "CPU implementer : 0x43\n" 272 "CPU part : 0xa1"), 273 "thunderxt88"); 274 275 // Verify HiSilicon processors. 276 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x48\n" 277 "CPU part : 0xd01"), 278 "tsv110"); 279 280 // Verify A64FX. 281 const std::string A64FXProcCpuInfo = R"( 282 processor : 0 283 BogoMIPS : 200.00 284 Features : fp asimd evtstrm sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm fcma dcpop sve 285 CPU implementer : 0x46 286 CPU architecture: 8 287 CPU variant : 0x1 288 CPU part : 0x001 289 )"; 290 291 EXPECT_EQ(sys::detail::getHostCPUNameForARM(A64FXProcCpuInfo), "a64fx"); 292 293 // Verify Nvidia Carmel. 294 const std::string CarmelProcCpuInfo = R"( 295 processor : 0 296 model name : ARMv8 Processor rev 0 (v8l) 297 BogoMIPS : 62.50 298 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm dcpop 299 CPU implementer : 0x4e 300 CPU architecture: 8 301 CPU variant : 0x0 302 CPU part : 0x004 303 CPU revision : 0 304 )"; 305 306 EXPECT_EQ(sys::detail::getHostCPUNameForARM(CarmelProcCpuInfo), "carmel"); 307 308 // Snapdragon mixed implementer quirk 309 const std::string Snapdragon865ProcCPUInfo = R"( 310 processor : 0 311 BogoMIPS : 38.40 312 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp 313 CPU implementer : 0x51 314 CPU architecture: 8 315 CPU variant : 0xd 316 CPU part : 0x805 317 CPU revision : 14 318 processor : 1 319 processor : 2 320 processor : 3 321 processor : 4 322 processor : 5 323 processor : 6 324 BogoMIPS : 38.40 325 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp 326 CPU implementer : 0x41 327 CPU architecture: 8 328 CPU variant : 0x1 329 CPU part : 0xd0d 330 CPU revision : 0 331 )"; 332 EXPECT_EQ(sys::detail::getHostCPUNameForARM(Snapdragon865ProcCPUInfo), "cortex-a77"); 333 } 334 335 TEST(getLinuxHostCPUName, s390x) { 336 SmallVector<std::string> ModelIDs( 337 {"9175", "3931", "8561", "3906", "2964", "2827", "2817", "2097", "2064"}); 338 SmallVector<std::string> VectorSupport({"", "vx"}); 339 SmallVector<StringRef> ExpectedCPUs; 340 341 // Model Id: 9175 342 ExpectedCPUs.push_back("zEC12"); 343 ExpectedCPUs.push_back("arch15"); 344 345 // Model Id: 3931 346 ExpectedCPUs.push_back("zEC12"); 347 ExpectedCPUs.push_back("z16"); 348 349 // Model Id: 8561 350 ExpectedCPUs.push_back("zEC12"); 351 ExpectedCPUs.push_back("z15"); 352 353 // Model Id: 3906 354 ExpectedCPUs.push_back("zEC12"); 355 ExpectedCPUs.push_back("z14"); 356 357 // Model Id: 2964 358 ExpectedCPUs.push_back("zEC12"); 359 ExpectedCPUs.push_back("z13"); 360 361 // Model Id: 2827 362 ExpectedCPUs.push_back("zEC12"); 363 ExpectedCPUs.push_back("zEC12"); 364 365 // Model Id: 2817 366 ExpectedCPUs.push_back("z196"); 367 ExpectedCPUs.push_back("z196"); 368 369 // Model Id: 2097 370 ExpectedCPUs.push_back("z10"); 371 ExpectedCPUs.push_back("z10"); 372 373 // Model Id: 2064 374 ExpectedCPUs.push_back("generic"); 375 ExpectedCPUs.push_back("generic"); 376 377 const std::string DummyBaseVectorInfo = 378 "features : esan3 zarch stfle msa ldisp eimm dfp edat etf3eh highgprs " 379 "te "; 380 const std::string DummyBaseMachineInfo = 381 "processor 0: version = FF, identification = 059C88, machine = "; 382 383 int CheckIndex = 0; 384 for (size_t I = 0; I < ModelIDs.size(); I++) { 385 for (size_t J = 0; J < VectorSupport.size(); J++) { 386 const std::string DummyCPUInfo = DummyBaseVectorInfo + VectorSupport[J] + 387 "\n" + DummyBaseMachineInfo + 388 ModelIDs[I]; 389 EXPECT_EQ(sys::detail::getHostCPUNameForS390x(DummyCPUInfo), 390 ExpectedCPUs[CheckIndex++]); 391 } 392 } 393 } 394 395 TEST(getLinuxHostCPUName, RISCV) { 396 const StringRef SifiveU74MCProcCPUInfo = R"( 397 processor : 0 398 hart : 2 399 isa : rv64imafdc 400 mmu : sv39 401 uarch : sifive,u74-mc 402 )"; 403 EXPECT_EQ(sys::detail::getHostCPUNameForRISCV(SifiveU74MCProcCPUInfo), 404 "sifive-u74"); 405 EXPECT_EQ( 406 sys::detail::getHostCPUNameForRISCV("uarch : sifive,bullet0\n"), 407 "sifive-u74"); 408 } 409 410 static bool runAndGetCommandOutput( 411 const char *ExePath, ArrayRef<llvm::StringRef> argv, 412 std::unique_ptr<char[]> &Buffer, off_t &Size) { 413 bool Success = false; 414 [ExePath, argv, &Buffer, &Size, &Success] { 415 using namespace llvm::sys; 416 SmallString<128> TestDirectory; 417 ASSERT_NO_ERROR(fs::createUniqueDirectory("host_test", TestDirectory)); 418 419 SmallString<128> OutputFile(TestDirectory); 420 path::append(OutputFile, "out"); 421 StringRef OutputPath = OutputFile.str(); 422 423 const std::optional<StringRef> Redirects[] = { 424 /*STDIN=*/std::nullopt, /*STDOUT=*/OutputPath, /*STDERR=*/std::nullopt}; 425 int RetCode = 426 ExecuteAndWait(ExePath, argv, /*env=*/std::nullopt, Redirects); 427 ASSERT_EQ(0, RetCode); 428 429 int FD = 0; 430 ASSERT_NO_ERROR(fs::openFileForRead(OutputPath, FD)); 431 Size = ::lseek(FD, 0, SEEK_END); 432 ASSERT_NE(-1, Size); 433 ::lseek(FD, 0, SEEK_SET); 434 Buffer = std::make_unique<char[]>(Size); 435 ASSERT_EQ(::read(FD, Buffer.get(), Size), Size); 436 ::close(FD); 437 438 ASSERT_NO_ERROR(fs::remove(OutputPath)); 439 ASSERT_NO_ERROR(fs::remove(TestDirectory.str())); 440 Success = true; 441 }(); 442 return Success; 443 } 444 445 TEST(HostTest, DummyRunAndGetCommandOutputUse) { 446 // Suppress defined-but-not-used warnings when the tests using the helper are 447 // disabled. 448 (void)&runAndGetCommandOutput; 449 } 450 451 TEST(HostTest, getMacOSHostVersion) { 452 llvm::Triple HostTriple(llvm::sys::getProcessTriple()); 453 if (!HostTriple.isMacOSX()) 454 GTEST_SKIP(); 455 456 const char *SwVersPath = "/usr/bin/sw_vers"; 457 StringRef argv[] = {SwVersPath, "-productVersion"}; 458 std::unique_ptr<char[]> Buffer; 459 off_t Size; 460 ASSERT_EQ(runAndGetCommandOutput(SwVersPath, argv, Buffer, Size), true); 461 StringRef SystemVersionStr = StringRef(Buffer.get(), Size).rtrim(); 462 463 // Ensure that the two versions match. 464 VersionTuple SystemVersion; 465 ASSERT_EQ(llvm::Triple((Twine("x86_64-apple-macos") + SystemVersionStr)) 466 .getMacOSXVersion(SystemVersion), 467 true); 468 VersionTuple HostVersion; 469 ASSERT_EQ(HostTriple.getMacOSXVersion(HostVersion), true); 470 471 if (SystemVersion.getMajor() > 10) { 472 // Don't compare the 'Minor' and 'Micro' versions, as they're always '0' for 473 // the 'Darwin' triples on 11.x. 474 ASSERT_EQ(SystemVersion.getMajor(), HostVersion.getMajor()); 475 } else { 476 // Don't compare the 'Micro' version, as it's always '0' for the 'Darwin' 477 // triples. 478 ASSERT_EQ(SystemVersion.getMajor(), HostVersion.getMajor()); 479 ASSERT_EQ(SystemVersion.getMinor(), HostVersion.getMinor()); 480 } 481 } 482 483 // Helper to return AIX system version. Must return void to use ASSERT_*. 484 static void getAIXSystemVersion(VersionTuple &SystemVersion) { 485 const char *ExePath = "/usr/bin/oslevel"; 486 StringRef argv[] = {ExePath}; 487 std::unique_ptr<char[]> Buffer; 488 off_t Size; 489 ASSERT_EQ(runAndGetCommandOutput(ExePath, argv, Buffer, Size), true); 490 StringRef SystemVersionStr = StringRef(Buffer.get(), Size).rtrim(); 491 492 SystemVersion = 493 llvm::Triple((Twine("powerpc-ibm-aix") + SystemVersionStr)) 494 .getOSVersion(); 495 } 496 497 TEST(HostTest, AIXHostVersionDetect) { 498 llvm::Triple HostTriple(llvm::sys::getProcessTriple()); 499 if (HostTriple.getOS() != Triple::AIX) 500 GTEST_SKIP(); 501 502 llvm::Triple ConfiguredHostTriple(LLVM_HOST_TRIPLE); 503 ASSERT_EQ(ConfiguredHostTriple.getOS(), Triple::AIX); 504 505 VersionTuple SystemVersion; 506 getAIXSystemVersion(SystemVersion); 507 508 // Ensure that the host triple version (major) and release (minor) numbers, 509 // unless explicitly configured, match with those of the current system. 510 auto SysMajor = SystemVersion.getMajor(); 511 auto SysMinor = SystemVersion.getMinor(); 512 VersionTuple HostVersion = HostTriple.getOSVersion(); 513 if (ConfiguredHostTriple.getOSMajorVersion()) { 514 // Explicitly configured, force a match. We do it this way so the 515 // asserts are always executed. 516 SysMajor = HostVersion.getMajor(); 517 SysMinor = HostVersion.getMinor(); 518 } 519 ASSERT_EQ(SysMajor, HostVersion.getMajor()); 520 ASSERT_EQ(SysMinor, HostVersion.getMinor()); 521 } 522 523 TEST(HostTest, AIXTargetVersionDetect) { 524 llvm::Triple TargetTriple(llvm::sys::getDefaultTargetTriple()); 525 if (TargetTriple.getOS() != Triple::AIX) 526 GTEST_SKIP(); 527 528 // Ensure that the target triple version (major) and release (minor) numbers 529 // match with those of the current system. 530 llvm::Triple ConfiguredTargetTriple(LLVM_DEFAULT_TARGET_TRIPLE); 531 if (ConfiguredTargetTriple.getOSMajorVersion()) 532 GTEST_SKIP(); // The version was configured explicitly; skip. 533 534 VersionTuple SystemVersion; 535 getAIXSystemVersion(SystemVersion); 536 VersionTuple TargetVersion = TargetTriple.getOSVersion(); 537 ASSERT_EQ(SystemVersion.getMajor(), TargetVersion.getMajor()); 538 ASSERT_EQ(SystemVersion.getMinor(), TargetVersion.getMinor()); 539 } 540 541 TEST(HostTest, AIXHostCPUDetect) { 542 llvm::Triple HostTriple(llvm::sys::getProcessTriple()); 543 if (HostTriple.getOS() != Triple::AIX) 544 GTEST_SKIP(); 545 546 // Return a value based on the current processor implementation mode. 547 const char *ExePath = "/usr/sbin/getsystype"; 548 StringRef argv[] = {ExePath, "-i"}; 549 std::unique_ptr<char[]> Buffer; 550 off_t Size; 551 ASSERT_EQ(runAndGetCommandOutput(ExePath, argv, Buffer, Size), true); 552 StringRef CPU(Buffer.get(), Size); 553 StringRef MCPU = StringSwitch<const char *>(CPU) 554 .Case("POWER 4\n", "pwr4") 555 .Case("POWER 5\n", "pwr5") 556 .Case("POWER 6\n", "pwr6") 557 .Case("POWER 7\n", "pwr7") 558 .Case("POWER 8\n", "pwr8") 559 .Case("POWER 9\n", "pwr9") 560 .Case("POWER 10\n", "pwr10") 561 .Case("POWER 11\n", "pwr11") 562 .Default("unknown"); 563 564 StringRef HostCPU = sys::getHostCPUName(); 565 566 // Just do the comparison on the base implementation mode. 567 if (HostCPU == "970") 568 HostCPU = StringRef("pwr4"); 569 else 570 HostCPU = HostCPU.rtrim('x'); 571 572 EXPECT_EQ(HostCPU, MCPU); 573 } 574