1;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2; Copyright(c) 2011-2015 Intel Corporation All rights reserved. 3; 4; Redistribution and use in source and binary forms, with or without 5; modification, are permitted provided that the following conditions 6; are met: 7; * Redistributions of source code must retain the above copyright 8; notice, this list of conditions and the following disclaimer. 9; * Redistributions in binary form must reproduce the above copyright 10; notice, this list of conditions and the following disclaimer in 11; the documentation and/or other materials provided with the 12; distribution. 13; * Neither the name of Intel Corporation nor the names of its 14; contributors may be used to endorse or promote products derived 15; from this software without specific prior written permission. 16; 17; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 30%ifndef _REG_SIZES_ASM_ 31%define _REG_SIZES_ASM_ 32 33%ifndef AS_FEATURE_LEVEL 34%define AS_FEATURE_LEVEL 4 35%endif 36 37%define EFLAGS_HAS_CPUID (1<<21) 38%define FLAG_CPUID1_ECX_CLMUL (1<<1) 39%define FLAG_CPUID1_EDX_SSE2 (1<<26) 40%define FLAG_CPUID1_ECX_SSE3 (1) 41%define FLAG_CPUID1_ECX_SSE4_1 (1<<19) 42%define FLAG_CPUID1_ECX_SSE4_2 (1<<20) 43%define FLAG_CPUID1_ECX_POPCNT (1<<23) 44%define FLAG_CPUID1_ECX_AESNI (1<<25) 45%define FLAG_CPUID1_ECX_OSXSAVE (1<<27) 46%define FLAG_CPUID1_ECX_AVX (1<<28) 47%define FLAG_CPUID1_EBX_AVX2 (1<<5) 48 49%define FLAG_CPUID7_EBX_AVX2 (1<<5) 50%define FLAG_CPUID7_EBX_AVX512F (1<<16) 51%define FLAG_CPUID7_EBX_AVX512DQ (1<<17) 52%define FLAG_CPUID7_EBX_AVX512IFMA (1<<21) 53%define FLAG_CPUID7_EBX_AVX512PF (1<<26) 54%define FLAG_CPUID7_EBX_AVX512ER (1<<27) 55%define FLAG_CPUID7_EBX_AVX512CD (1<<28) 56%define FLAG_CPUID7_EBX_AVX512BW (1<<30) 57%define FLAG_CPUID7_EBX_AVX512VL (1<<31) 58 59%define FLAG_CPUID7_ECX_AVX512VBMI (1<<1) 60%define FLAG_CPUID7_ECX_AVX512VBMI2 (1 << 6) 61%define FLAG_CPUID7_ECX_GFNI (1 << 8) 62%define FLAG_CPUID7_ECX_VAES (1 << 9) 63%define FLAG_CPUID7_ECX_VPCLMULQDQ (1 << 10) 64%define FLAG_CPUID7_ECX_VNNI (1 << 11) 65%define FLAG_CPUID7_ECX_BITALG (1 << 12) 66%define FLAG_CPUID7_ECX_VPOPCNTDQ (1 << 14) 67 68%define FLAGS_CPUID7_EBX_AVX512_G1 (FLAG_CPUID7_EBX_AVX512F | FLAG_CPUID7_EBX_AVX512VL | FLAG_CPUID7_EBX_AVX512BW | FLAG_CPUID7_EBX_AVX512CD | FLAG_CPUID7_EBX_AVX512DQ) 69%define FLAGS_CPUID7_ECX_AVX512_G2 (FLAG_CPUID7_ECX_AVX512VBMI2 | FLAG_CPUID7_ECX_GFNI | FLAG_CPUID7_ECX_VAES | FLAG_CPUID7_ECX_VPCLMULQDQ | FLAG_CPUID7_ECX_VNNI | FLAG_CPUID7_ECX_BITALG | FLAG_CPUID7_ECX_VPOPCNTDQ) 70%define FLAGS_CPUID7_ECX_AVX2_G2 (FLAG_CPUID7_ECX_GFNI | FLAG_CPUID7_ECX_VAES | FLAG_CPUID7_ECX_VPCLMULQDQ) 71 72%define FLAG_XGETBV_EAX_XMM (1<<1) 73%define FLAG_XGETBV_EAX_YMM (1<<2) 74%define FLAG_XGETBV_EAX_XMM_YMM 0x6 75%define FLAG_XGETBV_EAX_ZMM_OPM 0xe0 76 77%define FLAG_CPUID1_EAX_AVOTON 0x000406d0 78%define FLAG_CPUID1_EAX_STEP_MASK 0xfffffff0 79 80; define d and w variants for registers 81 82%define raxd eax 83%define raxw ax 84%define raxb al 85 86%define rbxd ebx 87%define rbxw bx 88%define rbxb bl 89 90%define rcxd ecx 91%define rcxw cx 92%define rcxb cl 93 94%define rdxd edx 95%define rdxw dx 96%define rdxb dl 97 98%define rsid esi 99%define rsiw si 100%define rsib sil 101 102%define rdid edi 103%define rdiw di 104%define rdib dil 105 106%define rbpd ebp 107%define rbpw bp 108%define rbpb bpl 109 110%define ymm0x xmm0 111%define ymm1x xmm1 112%define ymm2x xmm2 113%define ymm3x xmm3 114%define ymm4x xmm4 115%define ymm5x xmm5 116%define ymm6x xmm6 117%define ymm7x xmm7 118%define ymm8x xmm8 119%define ymm9x xmm9 120%define ymm10x xmm10 121%define ymm11x xmm11 122%define ymm12x xmm12 123%define ymm13x xmm13 124%define ymm14x xmm14 125%define ymm15x xmm15 126 127%define zmm0x xmm0 128%define zmm1x xmm1 129%define zmm2x xmm2 130%define zmm3x xmm3 131%define zmm4x xmm4 132%define zmm5x xmm5 133%define zmm6x xmm6 134%define zmm7x xmm7 135%define zmm8x xmm8 136%define zmm9x xmm9 137%define zmm10x xmm10 138%define zmm11x xmm11 139%define zmm12x xmm12 140%define zmm13x xmm13 141%define zmm14x xmm14 142%define zmm15x xmm15 143%define zmm16x xmm16 144%define zmm17x xmm17 145%define zmm18x xmm18 146%define zmm19x xmm19 147%define zmm20x xmm20 148%define zmm21x xmm21 149%define zmm22x xmm22 150%define zmm23x xmm23 151%define zmm24x xmm24 152%define zmm25x xmm25 153%define zmm26x xmm26 154%define zmm27x xmm27 155%define zmm28x xmm28 156%define zmm29x xmm29 157%define zmm30x xmm30 158%define zmm31x xmm31 159 160%define zmm0y ymm0 161%define zmm1y ymm1 162%define zmm2y ymm2 163%define zmm3y ymm3 164%define zmm4y ymm4 165%define zmm5y ymm5 166%define zmm6y ymm6 167%define zmm7y ymm7 168%define zmm8y ymm8 169%define zmm9y ymm9 170%define zmm10y ymm10 171%define zmm11y ymm11 172%define zmm12y ymm12 173%define zmm13y ymm13 174%define zmm14y ymm14 175%define zmm15y ymm15 176%define zmm16y ymm16 177%define zmm17y ymm17 178%define zmm18y ymm18 179%define zmm19y ymm19 180%define zmm20y ymm20 181%define zmm21y ymm21 182%define zmm22y ymm22 183%define zmm23y ymm23 184%define zmm24y ymm24 185%define zmm25y ymm25 186%define zmm26y ymm26 187%define zmm27y ymm27 188%define zmm28y ymm28 189%define zmm29y ymm29 190%define zmm30y ymm30 191%define zmm31y ymm31 192 193%define DWORD(reg) reg %+ d 194%define WORD(reg) reg %+ w 195%define BYTE(reg) reg %+ b 196 197%define XWORD(reg) reg %+ x 198 199%ifdef INTEL_CET_ENABLED 200 %ifdef __NASM_VER__ 201 %if AS_FEATURE_LEVEL >= 10 202 %ifidn __OUTPUT_FORMAT__,elf32 203section .note.gnu.property note alloc noexec align=4 204DD 0x00000004,0x0000000c,0x00000005,0x00554e47 205DD 0xc0000002,0x00000004,0x00000003 206 %endif 207 %ifidn __OUTPUT_FORMAT__,elf64 208section .note.gnu.property note alloc noexec align=8 209DD 0x00000004,0x00000010,0x00000005,0x00554e47 210DD 0xc0000002,0x00000004,0x00000003,0x00000000 211 %endif 212 %endif 213 %endif 214%endif 215 216%ifidn __OUTPUT_FORMAT__,elf32 217section .note.GNU-stack noalloc noexec nowrite progbits 218section .text 219%endif 220%ifidn __OUTPUT_FORMAT__,elf64 221 %define __x86_64__ 222section .note.GNU-stack noalloc noexec nowrite progbits 223section .text 224%endif 225%ifidn __OUTPUT_FORMAT__,win64 226 %define __x86_64__ 227%endif 228%ifidn __OUTPUT_FORMAT__,macho64 229 %define __x86_64__ 230%endif 231 232%ifdef __x86_64__ 233 %define endbranch db 0xf3, 0x0f, 0x1e, 0xfa 234%else 235 %define endbranch db 0xf3, 0x0f, 0x1e, 0xfb 236%endif 237 238%ifdef REL_TEXT 239 %define WRT_OPT 240%elifidn __OUTPUT_FORMAT__, elf64 241 %define WRT_OPT wrt ..plt 242%else 243 %define WRT_OPT 244%endif 245 246%macro mk_global 1-3 247 %ifdef __NASM_VER__ 248 %ifidn __OUTPUT_FORMAT__, macho64 249 global %1 250 %elifidn __OUTPUT_FORMAT__, win64 251 global %1 252 %else 253 global %1:%2 %3 254 %endif 255 %else 256 global %1:%2 %3 257 %endif 258%endmacro 259 260 261; Fixes for nasm lack of MS proc helpers 262%ifdef __NASM_VER__ 263 %ifidn __OUTPUT_FORMAT__, win64 264 %macro alloc_stack 1 265 sub rsp, %1 266 %endmacro 267 268 %macro proc_frame 1 269 %1: 270 %endmacro 271 272 %macro save_xmm128 2 273 movdqa [rsp + %2], %1 274 %endmacro 275 276 %macro save_reg 2 277 mov [rsp + %2], %1 278 %endmacro 279 280 %macro rex_push_reg 1 281 push %1 282 %endmacro 283 284 %macro push_reg 1 285 push %1 286 %endmacro 287 288 %define end_prolog 289 %endif 290 291 %define endproc_frame 292%endif 293 294%ifidn __OUTPUT_FORMAT__, macho64 295 %define elf64 macho64 296 mac_equ equ 1 297%endif 298%endif ; ifndef _REG_SIZES_ASM_ 299