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Searched refs:mes (Results 1 – 25 of 27) sorted by relevance

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/openbsd-src/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_mes.c47 struct amdgpu_mes *mes = &adev->mes; in amdgpu_mes_kernel_doorbell_get() local
54 found = find_next_zero_bit(mes->doorbell_bitmap, mes->num_mes_dbs, offset); in amdgpu_mes_kernel_doorbell_get()
55 if (found >= mes->num_mes_dbs) { in amdgpu_mes_kernel_doorbell_get()
60 set_bit(found, mes->doorbell_bitmap); in amdgpu_mes_kernel_doorbell_get()
63 *doorbell_index = mes->db_start_dw_offset + found * 2; in amdgpu_mes_kernel_doorbell_get()
72 struct amdgpu_mes *mes = &adev->mes; in amdgpu_mes_kernel_doorbell_free() local
75 rel_index = (doorbell_index - mes in amdgpu_mes_kernel_doorbell_free()
83 struct amdgpu_mes *mes = &adev->mes; amdgpu_mes_doorbell_init() local
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H A Dmes_v10_1.c89 static int mes_v10_1_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, in mes_v10_1_submit_pkt_and_poll_completion() argument
97 struct amdgpu_device *adev = mes->adev; in mes_v10_1_submit_pkt_and_poll_completion()
98 struct amdgpu_ring *ring = &mes->ring; in mes_v10_1_submit_pkt_and_poll_completion()
103 spin_lock_irqsave(&mes->ring_lock, flags); in mes_v10_1_submit_pkt_and_poll_completion()
105 spin_unlock_irqrestore(&mes->ring_lock, flags); in mes_v10_1_submit_pkt_and_poll_completion()
110 api_status->api_completion_fence_addr = mes->ring.fence_drv.gpu_addr; in mes_v10_1_submit_pkt_and_poll_completion()
111 api_status->api_completion_fence_value = ++mes->ring.fence_drv.sync_seq; in mes_v10_1_submit_pkt_and_poll_completion()
115 spin_unlock_irqrestore(&mes->ring_lock, flags); in mes_v10_1_submit_pkt_and_poll_completion()
147 static int mes_v10_1_add_hw_queue(struct amdgpu_mes *mes, in mes_v10_1_add_hw_queue() argument
150 struct amdgpu_device *adev = mes->adev; in mes_v10_1_add_hw_queue()
[all …]
H A Dmes_v11_0.c97 static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, in mes_v11_0_submit_pkt_and_poll_completion() argument
105 struct amdgpu_device *adev = mes->adev; in mes_v11_0_submit_pkt_and_poll_completion()
106 struct amdgpu_ring *ring = &mes->ring; in mes_v11_0_submit_pkt_and_poll_completion()
118 spin_lock_irqsave(&mes->ring_lock, flags); in mes_v11_0_submit_pkt_and_poll_completion()
120 spin_unlock_irqrestore(&mes->ring_lock, flags); in mes_v11_0_submit_pkt_and_poll_completion()
125 api_status->api_completion_fence_addr = mes->ring.fence_drv.gpu_addr; in mes_v11_0_submit_pkt_and_poll_completion()
126 api_status->api_completion_fence_value = ++mes->ring.fence_drv.sync_seq; in mes_v11_0_submit_pkt_and_poll_completion()
130 spin_unlock_irqrestore(&mes->ring_lock, flags); in mes_v11_0_submit_pkt_and_poll_completion()
162 static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes, in mes_v11_0_add_hw_queue() argument
165 struct amdgpu_device *adev = mes->adev; in mes_v11_0_add_hw_queue()
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H A Damdgpu_mes.h311 int (*add_hw_queue)(struct amdgpu_mes *mes,
314 int (*remove_hw_queue)(struct amdgpu_mes *mes,
317 int (*unmap_legacy_queue)(struct amdgpu_mes *mes,
320 int (*suspend_gang)(struct amdgpu_mes *mes,
323 int (*resume_gang)(struct amdgpu_mes *mes,
326 int (*misc_op)(struct amdgpu_mes *mes,
330 #define amdgpu_mes_kiq_hw_init(adev) (adev)->mes.kiq_hw_init((adev))
331 #define amdgpu_mes_kiq_hw_fini(adev) (adev)->mes.kiq_hw_fini((adev))
446 static inline void amdgpu_mes_lock(struct amdgpu_mes *mes) in amdgpu_mes_lock() argument
448 mutex_lock(&mes->mutex_hidden); in amdgpu_mes_lock()
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H A Damdgpu_doorbell_mgr.c158 adev->mes.db_start_dw_offset = size / sizeof(u32); in amdgpu_doorbell_create_kernel_doorbells()
H A Damdgpu_kms.c343 fw_info->ver = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK; in amdgpu_firmware_info()
344 fw_info->feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK) in amdgpu_firmware_info()
348 fw_info->ver = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; in amdgpu_firmware_info()
349 fw_info->feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK) in amdgpu_firmware_info()
H A Dsdma_v6_0.c1482 spin_lock(&adev->mes.queue_id_lock); in sdma_v6_0_process_trap_irq()
1483 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id); in sdma_v6_0_process_trap_irq()
1488 spin_unlock(&adev->mes.queue_id_lock); in sdma_v6_0_process_trap_irq()
H A Dsdma_v5_2.c1436 spin_lock(&adev->mes.queue_id_lock); in sdma_v5_2_process_trap_irq()
1437 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id); in sdma_v5_2_process_trap_irq()
1442 spin_unlock(&adev->mes.queue_id_lock); in sdma_v5_2_process_trap_irq()
H A Dsdma_v5_0.c1576 spin_lock(&adev->mes.queue_id_lock); in sdma_v5_0_process_trap_irq()
1577 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id); in sdma_v5_0_process_trap_irq()
1582 spin_unlock(&adev->mes.queue_id_lock); in sdma_v5_0_process_trap_irq()
H A Damdgpu_ucode.c708 FW_VERSION_ATTR(mes_fw_version, 0444, mes.sched_version & AMDGPU_MES_VERSION_MASK);
709 FW_VERSION_ATTR(mes_kiq_fw_version, 0444, mes.kiq_version & AMDGPU_MES_VERSION_MASK);
H A Damdgpu_gfx.c937 if (adev->mes.ring.sched.ready) in amdgpu_kiq_rreg()
1010 if (adev->mes.ring.sched.ready) { in amdgpu_kiq_wreg()
H A Damdgpu_gmc.c558 if (ring == &adev->mes.ring) in amdgpu_gmc_allocate_vm_inv_eng()
H A Dgfx_v11_0.c1250 adev->mes.fw[pipe]->data; in gfx_v11_0_rlc_backdoor_autoload_copy_mes_ucode()
1252 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v11_0_rlc_backdoor_autoload_copy_mes_ucode()
1259 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v11_0_rlc_backdoor_autoload_copy_mes_ucode()
4130 if (adev->enable_mes_kiq && adev->mes.kiq_hw_init) in gfx_v11_0_cp_resume()
5165 /* assume doorbell always being used by mes mapped queue */ in gfx_v11_0_ring_set_wptr_gfx()
5228 /* assume doorbell always used by mes mapped queue */ in gfx_v11_0_ring_set_wptr_compute()
5858 spin_lock(&adev->mes.queue_id_lock); in gfx_v11_0_eop_irq()
5859 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id); in gfx_v11_0_eop_irq()
5861 DRM_DEBUG("process mes queue id = %d\n", mes_queue_id); in gfx_v11_0_eop_irq()
5864 spin_unlock(&adev->mes in gfx_v11_0_eop_irq()
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H A Dgmc_v11_0.c297 if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring.sched.ready) && in gmc_v11_0_flush_gpu_tlb()
H A Damdgpu_virt.c84 if (adev->mes.ring.sched.ready) { in amdgpu_virt_kiq_reg_write_reg_wait()
H A Damdgpu_drv.c650 * DOC: mes (int)
654 MODULE_PARM_DESC(mes,
656 module_param_named(mes, amdgpu_mes, int, 0444);
H A Damdgpu.h998 /* mes */
1001 struct amdgpu_mes mes; member
H A Dgfx_v10_0.c6863 if (adev->enable_mes_kiq && adev->mes.kiq_hw_init) in gfx_v10_0_cp_resume()
8169 /* assume doorbell always being used by mes mapped queue */ in gfx_v10_0_ring_set_wptr_gfx()
8232 /* assume doorbell always used by mes mapped queue */ in gfx_v10_0_ring_set_wptr_compute()
8909 spin_lock(&adev->mes.queue_id_lock); in gfx_v10_0_eop_irq()
8910 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id); in gfx_v10_0_eop_irq()
8912 DRM_DEBUG("process mes queue id = %d\n", mes_queue_id); in gfx_v10_0_eop_irq()
8915 spin_unlock(&adev->mes.queue_id_lock); in gfx_v10_0_eop_irq()
/openbsd-src/usr.sbin/npppd/npppd/
H A Dpap.c279 pap_response(pap *_this, int authok, const char *mes) in pap_response() argument
290 if (mes == NULL) in pap_response()
293 lmes = strlen(mes); in pap_response()
298 memcpy(pktp1, mes, lmes); in pap_response()
/openbsd-src/sys/dev/pci/drm/amd/amdkfd/
H A Dkfd_debug.h137 (dev->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 70); in kfd_dbg_has_ttmps_always_setup()
H A Dkfd_device_queue_manager.c243 amdgpu_mes_lock(&adev->mes); in add_queue_mes()
244 r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input); in add_queue_mes()
245 amdgpu_mes_unlock(&adev->mes); in add_queue_mes()
270 amdgpu_mes_lock(&adev->mes); in remove_queue_mes()
271 r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input); in remove_queue_mes()
272 amdgpu_mes_unlock(&adev->mes); in remove_queue_mes()
H A Dkfd_topology.c1827 uint32_t mes_api_rev = (dev->gpu->adev->mes.sched_version & in kfd_topology_set_dbg_firmware_support()
1830 uint32_t mes_rev = dev->gpu->adev->mes.sched_version & in kfd_topology_set_dbg_firmware_support()
H A Dkfd_device.c487 uint32_t mes_rev = node->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; in kfd_gws_init()
H A Dkfd_chardev.c348 ((dev->adev->mes.sched_version & AMDGPU_MES_API_VERSION_MASK) in kfd_ioctl_create_queue()
/openbsd-src/usr.bin/calendar/calendars/fr_FR.UTF-8/
H A Dcalendar.fetes15 * par mes collègues de travail ; on n'y trouve donc que

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