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Searched refs:dpcd (Results 1 – 23 of 23) sorted by relevance

/openbsd-src/sys/dev/pci/drm/include/drm/display/
H A Ddrm_dp_helper.h47 int drm_dp_read_clock_recovery_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
49 int drm_dp_read_channel_eq_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
53 const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
56 const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
107 drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_link_rate()
109 return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); in drm_dp_max_link_rate()
113 drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_lane_count()
115 return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in drm_dp_max_lane_count()
119 drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_enhanced_frame_cap()
121 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_enhanced_frame_cap()
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H A Ddrm_dp_mst_helper.h668 * @lock: protects @mst_state, @mst_primary, @dpcd, and
719 * @dpcd: Cache of DPCD for primary port.
721 u8 dpcd[DP_RECEIVER_CAP_SIZE];
817 bool drm_dp_read_mst_cap(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
714 u8 dpcd[DP_RECEIVER_CAP_SIZE]; global() member
/openbsd-src/sys/dev/pci/drm/display/
H A Ddrm_dp_helper.c284 static int __read_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], in __read_delay()
300 if (cr && dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) in __read_delay()
326 rd_interval = dpcd[offset]; in __read_delay()
339 int drm_dp_read_clock_recovery_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], in drm_dp_read_clock_recovery_delay()
342 return __read_delay(aux, dpcd, dp_phy, uhbr, true); in drm_dp_read_clock_recovery_delay()
346 int drm_dp_read_channel_eq_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], in drm_dp_read_channel_eq_delay()
349 return __read_delay(aux, dpcd, dp_phy, uhbr, false); in drm_dp_read_channel_eq_delay()
374 const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_link_train_clock_recovery_delay()
376 u8 rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & in drm_dp_link_train_clock_recovery_delay()
380 if (dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) in drm_dp_link_train_clock_recovery_delay()
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H A Ddrm_dp_mst_topology.c2755 drm_dbg_kms(mgr->dev, "failed to dpcd write %d %d\n", tosend, ret); in drm_dp_send_sideband_msg()
3585 * @dpcd: A cached copy of the DPCD capabilities for this sink
3590 const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_read_mst_cap()
3594 if (dpcd[DP_DPCD_REV] < DP_DPCD_REV_12) in drm_dp_read_mst_cap()
3626 /* get dpcd info */ in drm_dp_mst_topology_mgr_set_mst()
3627 ret = drm_dp_read_dpcd_caps(mgr->aux, mgr->dpcd); in drm_dp_mst_topology_mgr_set_mst()
3747 if (drm_dp_read_dpcd_caps(mgr->aux, mgr->dpcd) < 0) { in drm_dp_mst_topology_mgr_resume()
3748 drm_dbg_kms(mgr->dev, "dpcd read failed - undocked during suspend?\n"); in drm_dp_mst_topology_mgr_resume()
3764 drm_dbg_kms(mgr->dev, "dpcd read failed - undocked during suspend?\n"); in drm_dp_mst_topology_mgr_resume()
4931 seq_printf(m, "dpcd rea in drm_dp_delayed_destroy_port()
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/openbsd-src/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_atombios_dp.c253 const u8 dpcd[DP_DPCD_SIZE], in amdgpu_atombios_dp_get_dp_link_config()
260 unsigned max_link_rate = drm_dp_max_link_rate(dpcd); in amdgpu_atombios_dp_get_dp_link_config()
261 unsigned max_lane_num = drm_dp_max_lane_count(dpcd); in amdgpu_atombios_dp_get_dp_link_config()
322 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in amdgpu_atombios_dp_probe_oui()
339 if (dig_connector->dpcd[DP_DPCD_REV] > 0x10) { in amdgpu_atombios_dp_ds_ports()
359 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); in amdgpu_atombios_dp_get_dpcd()
361 DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd), in amdgpu_atombios_dp_get_dpcd()
362 dig_connector->dpcd); in amdgpu_atombios_dp_get_dpcd()
369 dig_connector->dpcd[0] = 0; in amdgpu_atombios_dp_get_dpcd()
421 ret = amdgpu_atombios_dp_get_dp_link_config(connector, dig_connector->dpcd, in amdgpu_atombios_dp_set_link_config()
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H A Damdgpu_mode.h464 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
H A Damdgpu_connectors.c1470 amdgpu_dig_connector->dpcd, in amdgpu_connector_dp_detect()
/openbsd-src/sys/dev/pci/drm/radeon/
H A Datombios_dp.c307 const u8 dpcd[DP_DPCD_SIZE], in radeon_dp_get_dp_link_config()
313 unsigned max_link_rate = drm_dp_max_link_rate(dpcd); in radeon_dp_get_dp_link_config()
314 unsigned max_lane_num = drm_dp_max_lane_count(dpcd); in radeon_dp_get_dp_link_config()
375 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in radeon_dp_probe_oui()
396 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); in radeon_dp_getdpcd()
398 DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd), in radeon_dp_getdpcd()
399 dig_connector->dpcd); in radeon_dp_getdpcd()
406 dig_connector->dpcd[0] = 0; in radeon_dp_getdpcd()
463 ret = radeon_dp_get_dp_link_config(connector, dig_connector->dpcd, in radeon_dp_set_link_config()
490 ret = radeon_dp_get_dp_link_config(connector, dig_connector->dpcd, in radeon_dp_mode_valid_helper()
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H A Dradeon_mode.h466 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
/openbsd-src/sys/dev/pci/drm/i915/display/
H A Dintel_dp_link_training.c68 const u8 dpcd[DP_RECEIVER_CAP_SIZE], in intel_dp_read_lttpr_phy_caps()
73 if (drm_dp_read_lttpr_phy_caps(&intel_dp->aux, dpcd, dp_phy, phy_caps) < 0) { in intel_dp_read_lttpr_phy_caps()
84 const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in intel_dp_read_lttpr_common_caps()
88 ret = drm_dp_read_lttpr_common_caps(&intel_dp->aux, dpcd, in intel_dp_read_lttpr_common_caps()
132 static int intel_dp_init_lttpr_phys(struct intel_dp *intel_dp, const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in intel_dp_init_lttpr()
136 if (!intel_dp_read_lttpr_common_caps(intel_dp, dpcd)) in intel_dp_init_lttpr()
193 static int intel_dp_init_lttpr(struct intel_dp *intel_dp, const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in intel_dp_init_lttpr_and_dprx_caps()
198 lttpr_count = intel_dp_init_lttpr_phys(intel_dp, dpcd); in intel_dp_init_lttpr_and_dprx_caps()
201 intel_dp_read_lttpr_phy_caps(intel_dp, dpcd, DP_PHY_LTTPR(i)); in intel_dp_init_lttpr_and_dprx_caps()
235 u8 dpcd[DP_RECEIVER_CAP_SIZ in intel_dp_lttpr_voltage_max()
194 u8 dpcd[DP_RECEIVER_CAP_SIZE]; intel_dp_init_lttpr_and_dprx_caps() local
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H A Dintel_dp.c136 /* update sink rates from dpcd */
158 max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); in intel_dp_set_dpcd_sink_rates()
173 if (intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B) { in intel_dp_set_dpcd_sink_rates()
237 intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd); in intel_dp_set_max_sink_lane_count()
897 if (!drm_dp_is_branch(intel_dp->dpcd)) in dfp_can_convert_from_rgb()
914 if (!drm_dp_is_branch(intel_dp->dpcd)) in dfp_can_convert_from_ycbcr444()
2325 drm_dp_enhanced_frame_cap(intel_dp->dpcd); in intel_dp_compute_config()
2434 return intel_dp->dpcd[DP_DPCD_REV] == 0x11 && in downstream_hpd_needs_d0()
2435 drm_dp_is_branch(intel_dp->dpcd) && in downstream_hpd_needs_d0()
2503 if (intel_dp->dpcd[DP_DPCD_RE in intel_dp_set_power()
4634 u8 *dpcd = intel_dp->dpcd; intel_dp_detect_dpcd() local
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H A Dintel_lspcon.c87 if (drm_dp_read_desc(&dp->aux, &dp->desc, drm_dp_is_branch(dp->dpcd))) { in lspcon_detect_vendor()
661 if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd) != 0) { in lspcon_init()
H A Dintel_vrr.c33 if (!drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd)) in intel_vrr_is_capable()
H A Dintel_display_debugfs.c238 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); in intel_dp_info()
242 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, in intel_dp_info()
H A Dintel_display_types.h1715 u8 dpcd[DP_RECEIVER_CAP_SIZE];
1713 u8 dpcd[DP_RECEIVER_CAP_SIZE]; global() member
H A Dg4x_dp.c135 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
H A Dintel_psr.c642 drm_dp_tps3_supported(intel_dp->dpcd)) in intel_psr1_get_tp_time()
H A Dintel_cx0_phy.c1774 (intel_dp->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5); in intel_c10pll_update_pll()
/openbsd-src/sys/dev/pci/drm/i915/gvt/
H A Ddisplay.c519 kfree(port->dpcd); in clean_virtual_dp_monitor()
520 port->dpcd = NULL; in clean_virtual_dp_monitor()
552 port->dpcd = kzalloc(sizeof(*(port->dpcd)), GFP_KERNEL); in setup_virtual_dp_monitor()
553 if (!port->dpcd) { in setup_virtual_dp_monitor()
562 memcpy(port->dpcd->data, dpcd_fix_data, DPCD_HEADER_SIZE); in setup_virtual_dp_monitor()
563 port->dpcd->data_valid = true; in setup_virtual_dp_monitor()
564 port->dpcd->data[DPCD_SINK_COUNT] = 0x1; in setup_virtual_dp_monitor()
H A Dhandlers.c1122 static void dp_aux_ch_ctl_link_training(struct intel_vgpu_dpcd_data *dpcd, in dp_aux_ch_ctl_link_training() argument
1128 dpcd->data[DPCD_LANE0_1_STATUS] |= DPCD_LANES_CR_DONE; in dp_aux_ch_ctl_link_training()
1130 dpcd->data[DPCD_LANE2_3_STATUS] |= DPCD_LANES_CR_DONE; in dp_aux_ch_ctl_link_training()
1135 dpcd->data[DPCD_LANE0_1_STATUS] |= DPCD_LANES_EQ_DONE; in dp_aux_ch_ctl_link_training()
1136 dpcd->data[DPCD_LANE0_1_STATUS] |= DPCD_SYMBOL_LOCKED; in dp_aux_ch_ctl_link_training()
1138 dpcd->data[DPCD_LANE2_3_STATUS] |= DPCD_LANES_EQ_DONE; in dp_aux_ch_ctl_link_training()
1139 dpcd->data[DPCD_LANE2_3_STATUS] |= DPCD_SYMBOL_LOCKED; in dp_aux_ch_ctl_link_training()
1141 dpcd->data[DPCD_LANE_ALIGN_STATUS_UPDATED] |= in dp_aux_ch_ctl_link_training()
1147 dpcd->data[DPCD_SINK_STATUS] = DPCD_SINK_IN_SYNC; in dp_aux_ch_ctl_link_training()
1167 struct intel_vgpu_dpcd_data *dpcd = NULL; in dp_aux_ch_ctl_mmio_write() local
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H A Ddisplay.h166 struct intel_vgpu_dpcd_data *dpcd; member
/openbsd-src/sys/dev/pci/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_helpers.c511 DRM_INFO("DM_MST: DP%x, %d-lane link detected\n", aconnector->mst_mgr.dpcd[0], in dm_helpers_dp_mst_start_top_mgr()
512 aconnector->mst_mgr.dpcd[2] & DP_MAX_LANE_COUNT_MASK);
752 DC_LOG_DC("Configure DSC to non-virtual dpcd synaptics\n"); in write_dsc_enable_synaptics_non_virtual_dpcd_mst()
768 /* Synaptics hub not support virtual dpcd, in write_dsc_enable_synaptics_non_virtual_dpcd_mst()
818 DC_LOG_DC("Sent DSC pass-through enable to virtual dpcd port, ret = %u\n", in dm_helpers_dp_write_dsc_enable()
826 "virtual dpcd", in dm_helpers_dp_write_dsc_enable()
833 "virtual dpcd", in dm_helpers_dp_write_dsc_enable()
840 DC_LOG_DC("Sent DSC pass-through disable to virtual dpcd port, ret = %u\n", in dm_helpers_dp_write_dsc_enable()
H A Damdgpu_dm.c1398 * changed, need get latest link status from dpcd in dm_handle_hpd_rx_offload_work()
2356 if (drm_dp_read_dpcd_caps(mgr->aux, mgr->dpcd) < 0) { in resume_mst_branch_status()
2357 drm_dbg_kms(mgr->dev, "dpcd read failed - undocked during suspend?\n"); in resume_mst_branch_status()
2373 drm_dbg_kms(mgr->dev, "dpcd read failed - undocked during suspend?\n"); in resume_mst_branch_status()