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Searched refs:dev_priv (Results 1 – 25 of 181) sorted by relevance

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/openbsd-src/sys/dev/pci/drm/i915/soc/
H A Dintel_pch.c12 intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) in intel_pch_type() argument
16 drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); in intel_pch_type()
17 drm_WARN_ON(&dev_priv->drm, GRAPHICS_VER(dev_priv) != 5); in intel_pch_type()
20 drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n"); in intel_pch_type()
21 drm_WARN_ON(&dev_priv->drm, in intel_pch_type()
22 GRAPHICS_VER(dev_priv) != 6 && !IS_IVYBRIDGE(dev_priv)); in intel_pch_type()
25 drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n"); in intel_pch_type()
26 drm_WARN_ON(&dev_priv->drm, in intel_pch_type()
27 GRAPHICS_VER(dev_priv) != 6 && !IS_IVYBRIDGE(dev_priv)); in intel_pch_type()
31 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n"); in intel_pch_type()
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H A Dintel_pch.h67 #define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type) argument
68 #define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id) argument
69 #define HAS_PCH_MTP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_MTP) argument
70 #define HAS_PCH_DG2(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_DG2) argument
71 #define HAS_PCH_ADP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ADP) argument
72 #define HAS_PCH_DG1(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_DG1) argument
73 #define HAS_PCH_TGP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_TGP) argument
74 #define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP) argument
75 #define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP) argument
76 #define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT) argument
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/openbsd-src/sys/dev/pci/drm/i915/display/
H A Dintel_display_irq.c26 intel_handle_vblank(struct drm_i915_private *dev_priv, enum pipe pipe) in intel_handle_vblank() argument
28 struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe); in intel_handle_vblank()
39 void ilk_update_display_irq(struct drm_i915_private *dev_priv, in ilk_update_display_irq() argument
44 lockdep_assert_held(&dev_priv->irq_lock); in ilk_update_display_irq()
45 drm_WARN_ON(&dev_priv->drm, enabled_irq_mask & ~interrupt_mask); in ilk_update_display_irq()
47 new_val = dev_priv->irq_mask; in ilk_update_display_irq()
51 if (new_val != dev_priv->irq_mask && in ilk_update_display_irq()
52 !drm_WARN_ON(&dev_priv->drm, !intel_irqs_enabled(dev_priv))) { in ilk_update_display_irq()
53 dev_priv->irq_mask = new_val; in ilk_update_display_irq()
54 intel_uncore_write(&dev_priv->uncore, DEIMR, dev_priv->irq_mask); in ilk_update_display_irq()
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H A Dintel_fifo_underrun.c60 struct drm_i915_private *dev_priv = to_i915(dev); in ivb_can_enable_err_int() local
64 lockdep_assert_held(&dev_priv->irq_lock); in ivb_can_enable_err_int()
66 for_each_pipe(dev_priv, pipe) { in ivb_can_enable_err_int()
67 crtc = intel_crtc_for_pipe(dev_priv, pipe); in ivb_can_enable_err_int()
78 struct drm_i915_private *dev_priv = to_i915(dev); in cpt_can_enable_serr_int() local
82 lockdep_assert_held(&dev_priv->irq_lock); in cpt_can_enable_serr_int()
84 for_each_pipe(dev_priv, pipe) { in cpt_can_enable_serr_int()
85 crtc = intel_crtc_for_pipe(dev_priv, pipe); in cpt_can_enable_serr_int()
96 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_check_fifo_underruns() local
100 lockdep_assert_held(&dev_priv->irq_lock); in i9xx_check_fifo_underruns()
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H A Dintel_display_power_well.c149 bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv, in intel_display_power_well_is_enabled() argument
154 power_well = lookup_power_well(dev_priv, power_well_id); in intel_display_power_well_is_enabled()
156 return intel_power_well_is_enabled(dev_priv, power_well); in intel_display_power_well_is_enabled()
185 static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv, in hsw_power_well_post_enable() argument
189 intel_vga_reset_io_mem(dev_priv); in hsw_power_well_post_enable()
192 gen8_irq_power_well_post_enable(dev_priv, irq_pipe_mask); in hsw_power_well_post_enable()
195 static void hsw_power_well_pre_disable(struct drm_i915_private *dev_priv, in hsw_power_well_pre_disable() argument
199 gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask); in hsw_power_well_pre_disable()
217 aux_ch_to_digital_port(struct drm_i915_private *dev_priv, in aux_ch_to_digital_port() argument
223 for_each_intel_encoder(&dev_priv->drm, encoder) { in aux_ch_to_digital_port()
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H A Dintel_pch_refclk.c13 static void lpt_fdi_reset_mphy(struct drm_i915_private *dev_priv) in lpt_fdi_reset_mphy() argument
15 intel_de_rmw(dev_priv, SOUTH_CHICKEN2, 0, FDI_MPHY_IOSFSB_RESET_CTL); in lpt_fdi_reset_mphy()
17 if (wait_for_us(intel_de_read(dev_priv, SOUTH_CHICKEN2) & in lpt_fdi_reset_mphy()
19 drm_err(&dev_priv->drm, "FDI mPHY reset assert timeout\n"); in lpt_fdi_reset_mphy()
21 intel_de_rmw(dev_priv, SOUTH_CHICKEN2, FDI_MPHY_IOSFSB_RESET_CTL, 0); in lpt_fdi_reset_mphy()
23 if (wait_for_us((intel_de_read(dev_priv, SOUTH_CHICKEN2) & in lpt_fdi_reset_mphy()
25 drm_err(&dev_priv->drm, "FDI mPHY reset de-assert timeout\n"); in lpt_fdi_reset_mphy()
29 static void lpt_fdi_program_mphy(struct drm_i915_private *dev_priv) in lpt_fdi_program_mphy() argument
33 lpt_fdi_reset_mphy(dev_priv); in lpt_fdi_program_mphy()
35 tmp = intel_sbi_read(dev_priv, 0x8008, SBI_MPHY); in lpt_fdi_program_mphy()
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H A Dintel_cdclk.c81 void intel_cdclk_get_cdclk(struct drm_i915_private *dev_priv, in intel_cdclk_get_cdclk() argument
84 dev_priv->display.funcs.cdclk->get_cdclk(dev_priv, cdclk_config); in intel_cdclk_get_cdclk()
87 static void intel_cdclk_set_cdclk(struct drm_i915_private *dev_priv, in intel_cdclk_set_cdclk() argument
91 dev_priv->display.funcs.cdclk->set_cdclk(dev_priv, cdclk_config, pipe); in intel_cdclk_set_cdclk()
94 static int intel_cdclk_modeset_calc_cdclk(struct drm_i915_private *dev_priv, in intel_cdclk_modeset_calc_cdclk() argument
97 return dev_priv->display.funcs.cdclk->modeset_calc_cdclk(cdclk_config); in intel_cdclk_modeset_calc_cdclk()
100 static u8 intel_cdclk_calc_voltage_level(struct drm_i915_private *dev_priv, in intel_cdclk_calc_voltage_level() argument
103 return dev_priv->display.funcs.cdclk->calc_voltage_level(cdclk); in intel_cdclk_calc_voltage_level()
106 static void fixed_133mhz_get_cdclk(struct drm_i915_private *dev_priv, in fixed_133mhz_get_cdclk() argument
112 static void fixed_200mhz_get_cdclk(struct drm_i915_private *dev_priv, in fixed_200mhz_get_cdclk() argument
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H A Dintel_fdi.c22 static void assert_fdi_tx(struct drm_i915_private *dev_priv, in assert_fdi_tx() argument
27 if (HAS_DDI(dev_priv)) { in assert_fdi_tx()
35 cur_state = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder)) & TRANS_DDI_FUNC_ENABLE; in assert_fdi_tx()
37 cur_state = intel_de_read(dev_priv, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE; in assert_fdi_tx()
39 I915_STATE_WARN(dev_priv, cur_state != state, in assert_fdi_tx()
54 static void assert_fdi_rx(struct drm_i915_private *dev_priv, in assert_fdi_rx() argument
59 cur_state = intel_de_read(dev_priv, FDI_RX_CTL(pipe)) & FDI_RX_ENABLE; in assert_fdi_rx()
60 I915_STATE_WARN(dev_priv, cur_state != state, in assert_fdi_rx()
117 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fdi_link_train() local
119 dev_priv->display.funcs.fdi->fdi_link_train(crtc, crtc_state); in intel_fdi_link_train()
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H A Dintel_pch_display.c37 static void assert_pch_dp_disabled(struct drm_i915_private *dev_priv, in assert_pch_dp_disabled() argument
44 state = g4x_dp_port_enabled(dev_priv, dp_reg, port, &port_pipe); in assert_pch_dp_disabled()
46 I915_STATE_WARN(dev_priv, state && port_pipe == pipe, in assert_pch_dp_disabled()
50 I915_STATE_WARN(dev_priv, in assert_pch_dp_disabled()
51 HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B, in assert_pch_dp_disabled()
56 static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv, in assert_pch_hdmi_disabled() argument
63 state = intel_sdvo_port_enabled(dev_priv, hdmi_reg, &port_pipe); in assert_pch_hdmi_disabled()
65 I915_STATE_WARN(dev_priv, state && port_pipe == pipe, in assert_pch_hdmi_disabled()
69 I915_STATE_WARN(dev_priv, in assert_pch_hdmi_disabled()
70 HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B, in assert_pch_hdmi_disabled()
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H A Dintel_hotplug.c88 enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv, in intel_hpd_pin_default() argument
144 static bool intel_hpd_irq_storm_detect(struct drm_i915_private *dev_priv, in intel_hpd_irq_storm_detect() argument
147 struct intel_hotplug *hpd = &dev_priv->display.hotplug; in intel_hpd_irq_storm_detect()
155 (!long_hpd && !dev_priv->display.hotplug.hpd_short_storm_enabled)) in intel_hpd_irq_storm_detect()
166 drm_dbg_kms(&dev_priv->drm, in intel_hpd_irq_storm_detect()
170 drm_dbg_kms(&dev_priv->drm, in intel_hpd_irq_storm_detect()
180 intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv) in intel_hpd_irq_storm_switch_to_polling() argument
186 lockdep_assert_held(&dev_priv->irq_lock); in intel_hpd_irq_storm_switch_to_polling()
188 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); in intel_hpd_irq_storm_switch_to_polling()
197 dev_priv->display.hotplug.stats[pin].state != HPD_MARK_DISABLED) in intel_hpd_irq_storm_switch_to_polling()
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H A Dintel_display_power.c215 bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv, in __intel_display_power_is_enabled() argument
221 if (dev_priv->runtime_pm.suspended) in __intel_display_power_is_enabled()
226 for_each_power_domain_well_reverse(dev_priv, power_well, domain) { in __intel_display_power_is_enabled()
256 bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv, in intel_display_power_is_enabled() argument
262 power_domains = &dev_priv->display.power.domains; in intel_display_power_is_enabled()
265 ret = __intel_display_power_is_enabled(dev_priv, domain); in intel_display_power_is_enabled()
306 void intel_display_power_set_target_dc_state(struct drm_i915_private *dev_priv, in intel_display_power_set_target_dc_state() argument
311 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in intel_display_power_set_target_dc_state()
314 power_well = lookup_power_well(dev_priv, SKL_DISP_DC_OFF); in intel_display_power_set_target_dc_state()
316 if (drm_WARN_ON(&dev_priv->drm, !power_well)) in intel_display_power_set_target_dc_state()
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H A Dintel_combo_phy.c55 icl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy) in icl_get_procmon_ref_values() argument
59 val = intel_de_read(dev_priv, ICL_PORT_COMP_DW3(phy)); in icl_get_procmon_ref_values()
77 static void icl_set_procmon_ref_values(struct drm_i915_private *dev_priv, in icl_set_procmon_ref_values() argument
82 procmon = icl_get_procmon_ref_values(dev_priv, phy); in icl_set_procmon_ref_values()
84 intel_de_rmw(dev_priv, ICL_PORT_COMP_DW1(phy), in icl_set_procmon_ref_values()
87 intel_de_write(dev_priv, ICL_PORT_COMP_DW9(phy), procmon->dw9); in icl_set_procmon_ref_values()
88 intel_de_write(dev_priv, ICL_PORT_COMP_DW10(phy), procmon->dw10); in icl_set_procmon_ref_values()
91 static bool check_phy_reg(struct drm_i915_private *dev_priv, in check_phy_reg() argument
95 u32 val = intel_de_read(dev_priv, reg); in check_phy_reg()
98 drm_dbg(&dev_priv->drm, in check_phy_reg()
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H A Dvlv_dsi.c89 struct drm_i915_private *dev_priv = to_i915(dev); in vlv_dsi_wait_for_fifo_empty() local
95 if (intel_de_wait_for_set(dev_priv, MIPI_GEN_FIFO_STAT(port), in vlv_dsi_wait_for_fifo_empty()
97 drm_err(&dev_priv->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
100 static void write_data(struct drm_i915_private *dev_priv, in write_data() argument
112 intel_de_write(dev_priv, reg, val); in write_data()
116 static void read_data(struct drm_i915_private *dev_priv, in read_data() argument
123 u32 val = intel_de_read(dev_priv, reg); in read_data()
135 struct drm_i915_private *dev_priv = to_i915(dev); in intel_dsi_host_transfer() local
163 if (intel_de_wait_for_clear(dev_priv, MIPI_GEN_FIFO_STAT(port), in intel_dsi_host_transfer()
165 drm_err(&dev_priv->drm, in intel_dsi_host_transfer()
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H A Dintel_hotplug_irq.c134 static void intel_hpd_init_pins(struct drm_i915_private *dev_priv) in intel_hpd_init_pins() argument
136 struct intel_hotplug *hpd = &dev_priv->display.hotplug; in intel_hpd_init_pins()
138 if (HAS_GMCH(dev_priv)) { in intel_hpd_init_pins()
139 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in intel_hpd_init_pins()
140 IS_CHERRYVIEW(dev_priv)) in intel_hpd_init_pins()
147 if (DISPLAY_VER(dev_priv) >= 14) in intel_hpd_init_pins()
149 else if (DISPLAY_VER(dev_priv) >= 11) in intel_hpd_init_pins()
151 else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) in intel_hpd_init_pins()
153 else if (DISPLAY_VER(dev_priv) == 9) in intel_hpd_init_pins()
155 else if (DISPLAY_VER(dev_priv) >= 8) in intel_hpd_init_pins()
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H A Dintel_lpe_audio.c80 #define HAS_LPE_AUDIO(dev_priv) ((dev_priv)->display.audio.lpe.platdev != NULL) argument
83 lpe_audio_platdev_create(struct drm_i915_private *dev_priv) in lpe_audio_platdev_create() argument
88 struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); in lpe_audio_platdev_create()
104 rsc[0].start = rsc[0].end = dev_priv->display.audio.lpe.irq; in lpe_audio_platdev_create()
115 pinfo.parent = dev_priv->drm.dev; in lpe_audio_platdev_create()
124 pdata->num_pipes = INTEL_NUM_PIPES(dev_priv); in lpe_audio_platdev_create()
125 pdata->num_ports = IS_CHERRYVIEW(dev_priv) ? 3 : 2; /* B,C,D or B,C */ in lpe_audio_platdev_create()
136 drm_err(&dev_priv->drm, in lpe_audio_platdev_create()
147 static void lpe_audio_platdev_destroy(struct drm_i915_private *dev_priv) in lpe_audio_platdev_destroy() argument
158 platform_device_unregister(dev_priv->display.audio.lpe.platdev); in lpe_audio_platdev_destroy()
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H A Dintel_dpio_phy.c220 bxt_get_phy_list(struct drm_i915_private *dev_priv, int *count) in bxt_get_phy_list() argument
222 if (IS_GEMINILAKE(dev_priv)) { in bxt_get_phy_list()
232 bxt_get_phy_info(struct drm_i915_private *dev_priv, enum dpio_phy phy) in bxt_get_phy_info() argument
236 bxt_get_phy_list(dev_priv, &count); in bxt_get_phy_info()
241 void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, enum port port, in bxt_port_to_phy_channel() argument
247 phys = bxt_get_phy_list(dev_priv, &count); in bxt_port_to_phy_channel()
266 drm_WARN(&dev_priv->drm, 1, "PHY not found for PORT %c", in bxt_port_to_phy_channel()
275 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in bxt_ddi_phy_set_signal_levels() local
284 if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans)) in bxt_ddi_phy_set_signal_levels()
287 bxt_port_to_phy_channel(dev_priv, encoder->port, &phy, &ch); in bxt_ddi_phy_set_signal_levels()
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H A Dvlv_dsi_regs.h101 #define _MIPIA_DEVICE_READY (_MIPI_MMIO_BASE(dev_priv) + 0xb000)
102 #define _MIPIC_DEVICE_READY (_MIPI_MMIO_BASE(dev_priv) + 0xb800)
111 #define _MIPIA_INTR_STAT (_MIPI_MMIO_BASE(dev_priv) + 0xb004)
112 #define _MIPIC_INTR_STAT (_MIPI_MMIO_BASE(dev_priv) + 0xb804)
114 #define _MIPIA_INTR_EN (_MIPI_MMIO_BASE(dev_priv) + 0xb008)
115 #define _MIPIC_INTR_EN (_MIPI_MMIO_BASE(dev_priv) + 0xb808)
150 #define _MIPIA_DSI_FUNC_PRG (_MIPI_MMIO_BASE(dev_priv) + 0xb00c)
151 #define _MIPIC_DSI_FUNC_PRG (_MIPI_MMIO_BASE(dev_priv) + 0xb80c)
173 #define _MIPIA_HS_TX_TIMEOUT (_MIPI_MMIO_BASE(dev_priv) + 0xb010)
174 #define _MIPIC_HS_TX_TIMEOUT (_MIPI_MMIO_BASE(dev_priv) + 0xb810)
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H A Dintel_pps.c21 static void vlv_steal_power_sequencer(struct drm_i915_private *dev_priv,
63 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); in intel_pps_lock() local
69 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE); in intel_pps_lock()
70 mutex_lock(&dev_priv->display.pps.mutex); in intel_pps_lock()
78 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); in intel_pps_unlock() local
80 mutex_unlock(&dev_priv->display.pps.mutex); in intel_pps_unlock()
81 intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref); in intel_pps_unlock()
89 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); in vlv_power_sequencer_kick() local
97 if (drm_WARN(&dev_priv->drm, in vlv_power_sequencer_kick()
98 intel_de_read(dev_priv, intel_dp->output_reg) & DP_PORT_EN, in vlv_power_sequencer_kick()
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H A Dintel_crt.c83 bool intel_crt_port_enabled(struct drm_i915_private *dev_priv, in intel_crt_port_enabled() argument
88 val = intel_de_read(dev_priv, adpa_reg); in intel_crt_port_enabled()
91 if (HAS_PCH_CPT(dev_priv)) in intel_crt_port_enabled()
102 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_get_hw_state() local
107 wakeref = intel_display_power_get_if_enabled(dev_priv, in intel_crt_get_hw_state()
112 ret = intel_crt_port_enabled(dev_priv, crt->adpa_reg, pipe); in intel_crt_get_hw_state()
114 intel_display_power_put(dev_priv, encoder->power_domain, wakeref); in intel_crt_get_hw_state()
121 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_get_flags() local
125 tmp = intel_de_read(dev_priv, crt->adpa_reg); in intel_crt_get_flags()
170 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_set_dpms() local
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H A Dintel_pipe_crc.c75 static void i9xx_pipe_crc_auto_source(struct drm_i915_private *dev_priv, in i9xx_pipe_crc_auto_source() argument
85 drm_modeset_lock_all(&dev_priv->drm); in i9xx_pipe_crc_auto_source()
86 for_each_intel_encoder(&dev_priv->drm, encoder) { in i9xx_pipe_crc_auto_source()
113 drm_WARN(&dev_priv->drm, 1, "nonexisting DP port %c\n", in i9xx_pipe_crc_auto_source()
122 drm_modeset_unlock_all(&dev_priv->drm); in i9xx_pipe_crc_auto_source()
125 static int vlv_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv, in vlv_pipe_crc_ctl_reg() argument
133 i9xx_pipe_crc_auto_source(dev_priv, pipe, source); in vlv_pipe_crc_ctl_reg()
148 if (!IS_CHERRYVIEW(dev_priv)) in vlv_pipe_crc_ctl_reg()
170 u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X); in vlv_pipe_crc_ctl_reg()
186 intel_de_write(dev_priv, PORT_DFT2_G4X, tmp); in vlv_pipe_crc_ctl_reg()
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/openbsd-src/sys/dev/pci/drm/i915/
H A Di915_irq.c178 struct drm_i915_private *dev_priv = in ivb_parity_work() local
179 container_of(work, typeof(*dev_priv), l3_parity.error_work); in ivb_parity_work()
180 struct intel_gt *gt = to_gt(dev_priv); in ivb_parity_work()
190 mutex_lock(&dev_priv->drm.struct_mutex); in ivb_parity_work()
193 if (drm_WARN_ON(&dev_priv->drm, !dev_priv->l3_parity.which_slice)) in ivb_parity_work()
196 misccpctl = intel_uncore_rmw(&dev_priv->uncore, GEN7_MISCCPCTL, in ivb_parity_work()
198 intel_uncore_posting_read(&dev_priv->uncore, GEN7_MISCCPCTL); in ivb_parity_work()
200 while ((slice = ffs(dev_priv->l3_parity.which_slice)) != 0) { in ivb_parity_work()
204 if (drm_WARN_ON_ONCE(&dev_priv->drm, in ivb_parity_work()
205 slice >= NUM_L3_SLICES(dev_priv))) in ivb_parity_work()
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H A Di915_suspend.c36 static void intel_save_swf(struct drm_i915_private *dev_priv) in intel_save_swf() argument
41 if (GRAPHICS_VER(dev_priv) == 2 && IS_MOBILE(dev_priv)) { in intel_save_swf()
43 dev_priv->regfile.saveSWF0[i] = intel_de_read(dev_priv, SWF0(i)); in intel_save_swf()
44 dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i)); in intel_save_swf()
47 dev_priv->regfile.saveSWF3[i] = intel_de_read(dev_priv, SWF3(i)); in intel_save_swf()
48 } else if (GRAPHICS_VER(dev_priv) == 2) { in intel_save_swf()
50 dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i)); in intel_save_swf()
51 } else if (HAS_GMCH(dev_priv)) { in intel_save_swf()
53 dev_priv->regfile.saveSWF0[i] = intel_de_read(dev_priv, SWF0(i)); in intel_save_swf()
54 dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i)); in intel_save_swf()
[all …]
H A Di915_driver.c111 static int i915_workqueues_init(struct drm_i915_private *dev_priv) in i915_workqueues_init() argument
127 dev_priv->wq = alloc_ordered_workqueue("i915", 0); in i915_workqueues_init()
128 if (dev_priv->wq == NULL) in i915_workqueues_init()
131 dev_priv->display.hotplug.dp_wq = alloc_ordered_workqueue("i915-dp", 0); in i915_workqueues_init()
132 if (dev_priv->display.hotplug.dp_wq == NULL) in i915_workqueues_init()
141 dev_priv->unordered_wq = alloc_workqueue("i915-unordered", 0, 0); in i915_workqueues_init()
142 if (dev_priv->unordered_wq == NULL) in i915_workqueues_init()
148 destroy_workqueue(dev_priv->display.hotplug.dp_wq); in i915_workqueues_init()
150 destroy_workqueue(dev_priv->wq); in i915_workqueues_init()
152 drm_err(&dev_priv in i915_workqueues_init()
157 i915_workqueues_cleanup(struct drm_i915_private * dev_priv) i915_workqueues_cleanup() argument
174 intel_detect_preproduction_hw(struct drm_i915_private * dev_priv) intel_detect_preproduction_hw() argument
215 i915_driver_early_probe(struct drm_i915_private * dev_priv) i915_driver_early_probe() argument
292 i915_driver_late_release(struct drm_i915_private * dev_priv) i915_driver_late_release() argument
317 i915_driver_mmio_probe(struct drm_i915_private * dev_priv) i915_driver_mmio_probe() argument
366 i915_driver_mmio_release(struct drm_i915_private * dev_priv) i915_driver_mmio_release() argument
449 i915_driver_hw_probe(struct drm_i915_private * dev_priv) i915_driver_hw_probe() argument
587 i915_driver_hw_remove(struct drm_i915_private * dev_priv) i915_driver_hw_remove() argument
606 i915_driver_register(struct drm_i915_private * dev_priv) i915_driver_register() argument
651 i915_driver_unregister(struct drm_i915_private * dev_priv) i915_driver_unregister() argument
688 i915_welcome_messages(struct drm_i915_private * dev_priv) i915_welcome_messages() argument
903 struct drm_i915_private *dev_priv = to_i915(dev); i915_driver_release() local
974 intel_suspend_encoders(struct drm_i915_private * dev_priv) intel_suspend_encoders() argument
996 intel_shutdown_encoders(struct drm_i915_private * dev_priv) intel_shutdown_encoders() argument
1059 suspend_to_idle(struct drm_i915_private * dev_priv) suspend_to_idle() argument
1092 struct drm_i915_private *dev_priv = to_i915(dev); i915_drm_suspend() local
1139 struct drm_i915_private *dev_priv = to_i915(dev); i915_drm_suspend_late() local
1214 struct drm_i915_private *dev_priv = to_i915(dev); i915_drm_resume() local
1291 struct drm_i915_private *dev_priv = to_i915(dev); i915_drm_resume_early() local
1528 struct drm_i915_private *dev_priv = kdev_to_i915(kdev); intel_runtime_suspend() local
1628 struct drm_i915_private *dev_priv = kdev_to_i915(kdev); intel_runtime_resume() local
1973 struct inteldrm_softc *dev_priv = v; inteldrm_wsioctl() local
2040 struct inteldrm_softc *dev_priv = v; inteldrm_alloc_screen() local
2049 struct inteldrm_softc *dev_priv = v; inteldrm_free_screen() local
2059 struct inteldrm_softc *dev_priv = v; inteldrm_show_screen() local
2081 struct inteldrm_softc *dev_priv = v; inteldrm_doswitch() local
2095 struct inteldrm_softc *dev_priv = v; inteldrm_enter_ddb() local
2109 struct inteldrm_softc *dev_priv = v; inteldrm_getchar() local
2118 struct inteldrm_softc *dev_priv = v; inteldrm_load_font() local
2127 struct inteldrm_softc *dev_priv = v; inteldrm_list_font() local
2136 struct inteldrm_softc *dev_priv = v; inteldrm_burner() local
2159 struct inteldrm_softc *dev_priv = arg1; inteldrm_burner_cb() local
2195 struct inteldrm_softc *dev_priv = v; inteldrm_scrollback() local
2251 struct inteldrm_softc *dev_priv = (struct inteldrm_softc *)self; inteldrm_attach() local
2390 inteldrm_forcedetach(struct inteldrm_softc * dev_priv) inteldrm_forcedetach() argument
2414 struct inteldrm_softc *dev_priv = (struct inteldrm_softc *)self; inteldrm_attachhook() local
2497 struct inteldrm_softc *dev_priv = (struct inteldrm_softc *)self; inteldrm_activate() local
2539 inteldrm_native_backlight(struct inteldrm_softc * dev_priv) inteldrm_native_backlight() argument
2584 inteldrm_firmware_backlight(struct inteldrm_softc * dev_priv,struct wsdisplay_param * dp) inteldrm_firmware_backlight() argument
2625 inteldrm_init_backlight(struct inteldrm_softc * dev_priv) inteldrm_init_backlight() argument
2640 struct inteldrm_softc *dev_priv = arg; inteldrm_intr() local
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H A Dintel_stolen.c12 gen3_stolen_base(struct inteldrm_softc *dev_priv) in gen3_stolen_base() argument
14 uint32_t bsm = pci_conf_read(dev_priv->pc, dev_priv->tag, in gen3_stolen_base()
20 gen11_stolen_base(struct inteldrm_softc *dev_priv) in gen11_stolen_base() argument
22 uint64_t bsm = pci_conf_read(dev_priv->pc, dev_priv->tag, in gen11_stolen_base()
25 bsm |= (uint64_t)pci_conf_read(dev_priv->pc, dev_priv->tag, in gen11_stolen_base()
31 i830_stolen_size(struct inteldrm_softc *dev_priv) in i830_stolen_size() argument
35 pci_read_config_word(dev_priv->gmch.pdev, I830_GMCH_CTRL, in i830_stolen_size()
52 gen3_stolen_size(struct inteldrm_softc *dev_priv) in gen3_stolen_size() argument
56 pci_read_config_word(dev_priv->gmch.pdev, I830_GMCH_CTRL, in gen3_stolen_size()
93 gen6_stolen_size(struct inteldrm_softc *dev_priv) in gen6_stolen_size() argument
[all …]
H A Dintel_gvt.c51 static bool is_supported_device(struct drm_i915_private *dev_priv) in is_supported_device() argument
53 if (IS_BROADWELL(dev_priv)) in is_supported_device()
55 if (IS_SKYLAKE(dev_priv)) in is_supported_device()
57 if (IS_KABYLAKE(dev_priv)) in is_supported_device()
59 if (IS_BROXTON(dev_priv)) in is_supported_device()
61 if (IS_COFFEELAKE(dev_priv)) in is_supported_device()
63 if (IS_COMETLAKE(dev_priv)) in is_supported_device()
69 static void free_initial_hw_state(struct drm_i915_private *dev_priv) in free_initial_hw_state() argument
71 struct i915_virtual_gpu *vgpu = &dev_priv->vgpu; in free_initial_hw_state()
83 struct drm_i915_private *dev_priv = iter->i915; in save_mmio() local
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