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Searched refs:getLocVT (Results 1 – 25 of 32) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp238 assert(VA.getLocVT() == MVT::v2i32); in LowerReturn_32()
251 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
260 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
323 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
326 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
329 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
355 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_64()
416 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerFormalArguments_32()
442 WholeValue = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), WholeValue); in LowerFormalArguments_32()
449 if (VA.getLocVT() == MVT::f32) in LowerFormalArguments_32()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp272 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
275 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
278 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
484 EVT RegVT = VA.getLocVT(); in LowerCallArguments()
501 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerCallArguments()
510 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCallArguments()
642 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerReturn()
670 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEISelLowering.cpp348 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
351 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
354 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
362 assert(VA.getLocVT() == MVT::i64); in LowerReturn()
380 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
422 MF.addLiveIn(VA.getLocReg(), getRegClassFor(VA.getLocVT())); in LowerFormalArguments()
423 SDValue Arg = DAG.getCopyFromReg(Chain, DL, VReg, VA.getLocVT()); in LowerFormalArguments()
429 Arg = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
433 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
442 assert(VA.getLocVT() == MVT::i64); in LowerFormalArguments()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp322 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
355 InVals.push_back(DAG.getConstant(0, DL, VA.getLocVT())); in LowerFormalArguments()
430 Arg = DAG.getNode(ISD::SIGN_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
433 Arg = DAG.getNode(ISD::ZERO_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
436 Arg = DAG.getNode(ISD::ANY_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
535 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp117 assert(VA.getLocVT().getSizeInBits() <= 64 && "Unsupported location size"); in assignValueToReg()
131 MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(), in assignValueToAddress()
288 uint64_t LocSize = VA.getLocVT().getFixedSizeInBits(); in assignValueToReg()
H A DARMCallingConv.cpp178 assert(PendingMembers[0].getLocVT() == LocVT); in CC_ARM_AAPCS_Custom_Aggregate()
H A DARMFastISel.cpp1899 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1949 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1958 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1965 unsigned BC = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg); in ProcessCallArgs()
1968 ArgVT = VA.getLocVT(); in ProcessCallArgs()
1981 assert(VA.getLocVT() == MVT::f64 && in ProcessCallArgs()
H A DARMISelLowering.cpp2111 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i32 && in LowerCallResult()
2119 (VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2f64)) { in LowerCallResult()
2134 if (VA.getLocVT() == MVT::v2f64) { in LowerCallResult()
2154 Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(), in LowerCallResult()
2173 Val = MoveToHPR(dl, DAG, VA.getLocVT(), VA.getValVT(), Val); in LowerCallResult()
2330 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2333 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2336 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2339 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
2348 Arg = MoveFromHPR(dl, DAG, VA.getLocVT(), VA.getValVT(), Arg); in LowerCall()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp460 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
492 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerCCCArguments()
496 << EVT(VA.getLocVT()).getEVTString() << "\n"; in LowerCCCArguments()
505 VA.getLocVT(), DL, Chain, FIN, in LowerCCCArguments()
561 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
667 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
670 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
673 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp159 auto Copy = MIRBuilder.buildCopy(LLT{VA.getLocVT()}, PhysReg); in assignValueToReg()
293 LLT LocTy{VA.getLocVT()}; in extendRegister()
370 VA.getLocMemOffset(), VA.getLocVT(), LocInfo); in setLocInfo()
373 VA.getLocReg(), VA.getLocVT(), LocInfo); in setLocInfo()
H A DMipsISelLowering.cpp3255 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); in LowerCall()
3327 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCall()
3329 ISD::SHL, DL, VA.getLocVT(), Arg, in LowerCall()
3330 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA.getLocVT())); in LowerCall()
3499 RVLocs[i].getLocVT(), InFlag); in LowerCallResult()
3505 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCallResult()
3509 Shift, DL, VA.getLocVT(), Val, in LowerCallResult()
3510 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA.getLocVT())); in LowerCallResult()
3527 Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, in LowerCallResult()
3533 Val = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Val, in LowerCallResult()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp642 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
685 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
688 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
698 VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
770 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
836 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
839 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
842 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86FastISel.cpp3317 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3323 bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3326 ArgVT = VA.getLocVT(); in fastLowerCall()
3330 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3343 bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3346 ArgVT = VA.getLocVT(); in fastLowerCall()
3350 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3352 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3355 Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3358 Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
[all …]
H A DX86CallLowering.cpp120 VA.getLocVT().getStoreSize(), in assignValueToAddress()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp316 if (VA.getLocVT().getSizeInBits() > Arg.getValueType().getSizeInBits()) { in MatchingStackOffset()
390 ValVT = VA.getLocVT(); in LowerMemArgument()
592 EVT RegVT = VA.getLocVT(); in LowerCall()
681 uint32_t OpSize = (VA.getLocVT().getSizeInBits() + 7) / 8; in LowerCall()
846 EVT CopyVT = VA.getLocVT(); in LowerCallResult()
893 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1038 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1040 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1043 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1045 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1150 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1153 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1156 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1301 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
1321 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
1324 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
1335 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
1478 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerReturn()
1506 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp72 : VA.getLocVT().getStoreSize(); in getStackValueStoreSizeHack()
167 LLT LocTy(VA.getLocVT()); in assignValueToAddress()
298 MVT LocVT = VA.getLocVT(); in assignValueToAddress()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp231 Val = DAG.getBitcast(VA.getLocVT(), Val); in LowerReturn()
234 Val = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
237 Val = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
240 Val = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
248 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
481 Arg = DAG.getBitcast(VA.getLocVT(), Arg); in LowerCall()
484 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
487 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
490 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
501 LargestAlignSeen, Align(VA.getLocVT().getStoreSizeInBits() / 8)); in LowerCall()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp635 const MVT LocVT = VA.getLocVT(); in handleAssignments()
1055 LLT LocTy{VA.getLocVT()}; in extendRegister()
1139 const MVT LocVT = VA.getLocVT(); in assignValueToReg()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h153 MVT getLocVT() const { return LocVT; } in getLocVT() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp35 if (VA.getLocVT().getSizeInBits() < 32) { in extendRegisterMin32()
109 if (VA.getLocVT().getSizeInBits() < 32) { in assignValueToReg()
117 buildExtensionHint(VA, Copy.getReg(0), LLT(VA.getLocVT())); in assignValueToReg()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp6643 VA1.getLocVT(), CCValAssign::Full)); in CC_RISCVAssign2XLen()
6651 VA1.getLocVT(), CCValAssign::Full)); in CC_RISCVAssign2XLen()
6967 if (VA.getValVT().isFixedLengthVector() && VA.getLocVT().isScalableVector()) in convertLocVTToValVT()
6971 if (VA.getLocVT().isInteger() && VA.getValVT() == MVT::f16) in convertLocVTToValVT()
6973 else if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) in convertLocVTToValVT()
6989 EVT LocVT = VA.getLocVT(); in unpackFromRegLoc()
7005 EVT LocVT = VA.getLocVT(); in convertValVTToLocVT()
7015 if (VA.getLocVT().isInteger() && VA.getValVT() == MVT::f16) in convertValVTToLocVT()
7016 Val = DAG.getNode(RISCVISD::FMV_X_ANYEXTH, DL, VA.getLocVT(), Val); in convertValVTToLocVT()
7017 else if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) in convertValVTToLocVT()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1149 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1193 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
1281 EVT RegVT = VA.getLocVT(); in LowerCall()
1471 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1324 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
1327 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
1335 assert(VA.getLocVT() == MVT::i64); in convertLocVTToValVT()
1351 return DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1353 return DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1355 return DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1359 assert(VA.getLocVT() == MVT::i64); in convertValVTToLocVT()
1362 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VA.getLocVT(), Value, in convertValVTToLocVT()
1398 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
1446 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerFormalArguments()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4884 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
4940 ? VA.getLocVT().getSizeInBits() in LowerFormalArguments()
4962 MemVT = VA.getLocVT(); in LowerFormalArguments()
4967 MemVT = VA.getLocVT(); in LowerFormalArguments()
4981 ExtType, DL, VA.getLocVT(), Chain, FIN, in LowerFormalArguments()
5217 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i64 && in LowerCallResult()
5228 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), InFlag); in LowerCallResult()
5243 Val = DAG.getNode(ISD::SRL, DL, VA.getLocVT(), Val, in LowerCallResult()
5244 DAG.getConstant(32, DL, VA.getLocVT())); in LowerCallResult()
5654 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
[all …]

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