| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 786 Register OldValRes, Register SuccessRes, Register Addr, Register CmpVal, in buildAtomicCmpXchgWithSuccess() argument 792 LLT CmpValTy = getMRI()->getType(CmpVal); in buildAtomicCmpXchgWithSuccess() 807 .addUse(CmpVal) in buildAtomicCmpXchgWithSuccess() 814 Register CmpVal, Register NewVal, in buildAtomicCmpXchg() argument 819 LLT CmpValTy = getMRI()->getType(CmpVal); in buildAtomicCmpXchg() 832 .addUse(CmpVal) in buildAtomicCmpXchg()
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| H A D | LegalizerHelper.cpp | 3032 Register CmpVal = MI.getOperand(3).getReg(); in lower() local 3034 MIRBuilder.buildAtomicCmpXchg(OldValRes, Addr, CmpVal, NewVal, in lower() 3036 MIRBuilder.buildICmp(CmpInst::ICMP_EQ, SuccessRes, OldValRes, CmpVal); in lower()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2343 uint64_t Mask, uint64_t CmpVal, in getTestUnderMaskCond() argument 2362 if (CmpVal == 0) { in getTestUnderMaskCond() 2368 if (EffectivelyUnsigned && CmpVal > 0 && CmpVal <= Low) { in getTestUnderMaskCond() 2374 if (EffectivelyUnsigned && CmpVal < Low) { in getTestUnderMaskCond() 2382 if (CmpVal == Mask) { in getTestUnderMaskCond() 2388 if (EffectivelyUnsigned && CmpVal >= Mask - Low && CmpVal < Mask) { in getTestUnderMaskCond() 2394 if (EffectivelyUnsigned && CmpVal > Mask - Low && CmpVal <= Mask) { in getTestUnderMaskCond() 2402 if (EffectivelyUnsigned && CmpVal >= Mask - High && CmpVal < High) { in getTestUnderMaskCond() 2408 if (EffectivelyUnsigned && CmpVal > Mask - High && CmpVal <= High) { in getTestUnderMaskCond() 2418 if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == Low) in getTestUnderMaskCond() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 449 Value *AlignedAddr, Value *CmpVal,
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| H A D | RISCVISelLowering.cpp | 8404 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument 8409 CmpVal = Builder.CreateSExt(CmpVal, Builder.getInt64Ty()); in emitMaskedAtomicCmpXchgIntrinsic() 8418 MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering}); in emitMaskedAtomicCmpXchgIntrinsic()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 1149 Register Addr, Register CmpVal, Register NewVal, 1167 Register CmpVal, Register NewVal,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 2375 SDValue CmpVal = Mem->getOperand(2); in SelectATOMIC_CMP_SWAP() local 2380 SDValue Ops[] = {CmpVal, VAddr, SRsrc, SOffset, Offset, CPol, in SelectATOMIC_CMP_SWAP() 2393 SDValue CmpVal = Mem->getOperand(2); in SelectATOMIC_CMP_SWAP() local 2395 SDValue Ops[] = {CmpVal, SRsrc, SOffset, Offset, CPol, Mem->getChain()}; in SelectATOMIC_CMP_SWAP()
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| H A D | AMDGPULegalizerInfo.cpp | 2497 Register CmpVal = MI.getOperand(2).getReg(); in legalizeAtomicCmpXChg() local 2503 LLT ValTy = MRI.getType(CmpVal); in legalizeAtomicCmpXChg() 2506 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg() 3956 Register CmpVal; in legalizeBufferAtomic() local 3959 CmpVal = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferAtomic() 3997 MIB.addReg(CmpVal); in legalizeBufferAtomic()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 385 double CmpVal = IsUnsigned ? -(double)Limit * 2.0 : -(double)Limit; in LowerFPToInt() local 426 .addFPImm(cast<ConstantFP>(ConstantFP::get(Ty, CmpVal))); in LowerFPToInt()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 4333 APInt CmpVal = APInt::getOneBitSet(TypeBits, ShAmt); in foldICmpEquality() local 4334 return new ICmpInst(NewPred, Xor, Builder.getInt(CmpVal)); in foldICmpEquality() 5132 unsigned CmpVal = CI->countTrailingZeros(); in foldICmpUsingKnownBits() local 5134 return new ICmpInst(NewPred, X, ConstantInt::get(X->getType(), CmpVal)); in foldICmpUsingKnownBits()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/ |
| H A D | AddressSanitizer.cpp | 1768 Value *CmpVal = Constant::getNullValue(ShadowTy); in instrumentAddress() local 1772 Value *Cmp = IRB.CreateICmpNE(ShadowValue, CmpVal); in instrumentAddress()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1893 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 1906 Register CmpVal = MI.getOperand(2).getReg(); in emitAtomicCmpSwapPartword() local 1984 .addReg(CmpVal).addImm(MaskImm); in emitAtomicCmpSwapPartword()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 5553 static bool isUndefOrEqual(int Val, int CmpVal) { in isUndefOrEqual() argument 5554 return ((Val == SM_SentinelUndef) || (Val == CmpVal)); in isUndefOrEqual() 5559 static bool isUndefOrEqual(ArrayRef<int> Mask, int CmpVal) { in isUndefOrEqual() argument 5560 return llvm::all_of(Mask, [CmpVal](int M) { in isUndefOrEqual() 5561 return (M == SM_SentinelUndef) || (M == CmpVal); in isUndefOrEqual() 42408 const APInt &CmpVal = CmpConstant->getAPIntValue(); in combineSetCCMOVMSK() local 42412 assert(CmpBits == CmpVal.getBitWidth() && "Value size mismatch"); in combineSetCCMOVMSK() 42429 bool IsAnyOf = CmpOpcode == X86ISD::CMP && CmpVal.isNullValue(); in combineSetCCMOVMSK() 42431 CmpVal.isMask(NumElts); in combineSetCCMOVMSK()
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