| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 29 ISD::ArgFlagsTy &ArgFlags, in CC_X86_32_RegCall_Assign2Regs() argument 93 ISD::ArgFlagsTy &ArgFlags, in CC_X86_VectorCallAssignRegister() argument 130 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_X86_64_VectorCall() argument 132 if (ArgFlags.isSecArgPass()) { in CC_X86_64_VectorCall() 133 if (ArgFlags.isHva()) in CC_X86_64_VectorCall() 135 ArgFlags, State); in CC_X86_64_VectorCall() 155 if (!ArgFlags.isHva() || ArgFlags.isHvaStart()) { in CC_X86_64_VectorCall() 171 if (!ArgFlags.isHva()) { in CC_X86_64_VectorCall() 180 return ArgFlags.isHva(); in CC_X86_64_VectorCall() 190 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_X86_32_VectorCall() argument [all …]
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| H A D | X86CallingConv.h | 24 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 28 ISD::ArgFlagsTy ArgFlags, CCState &State);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMCallingConv.h | 21 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 24 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 27 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 30 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 33 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 37 ISD::ArgFlagsTy ArgFlags, CCState &State); 39 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 42 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 45 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 48 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
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| H A D | ARMCallingConv.cpp | 51 ISD::ArgFlagsTy ArgFlags, in CC_ARM_APCS_Custom_f64() argument 104 ISD::ArgFlagsTy ArgFlags, in CC_ARM_AAPCS_Custom_f64() argument 136 ISD::ArgFlagsTy ArgFlags, in RetCC_ARM_APCS_Custom_f64() argument 147 ISD::ArgFlagsTy ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() argument 149 return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() 172 ISD::ArgFlagsTy ArgFlags, in CC_ARM_AAPCS_Custom_Aggregate() argument 185 ValNo, ValVT, LocVT, LocInfo, ArgFlags.getNonZeroOrigAlign().value())); in CC_ARM_AAPCS_Custom_Aggregate() 187 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_ARM_AAPCS_Custom_Aggregate() 270 Alignment = ArgFlags.getNonZeroMemAlign() <= 4 ? Align(4) : Align(8); in CC_ARM_AAPCS_Custom_Aggregate() 301 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_ARM_AAPCS_Custom_f16() argument [all …]
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| H A D | ARMFastISel.cpp | 220 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1874 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in ProcessCallArgs() argument 1881 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, in ProcessCallArgs() 2221 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in ARMEmitLibcall() local 2225 ArgFlags.reserve(I->getNumOperands()); in ARMEmitLibcall() 2240 ArgFlags.push_back(Flags); in ARMEmitLibcall() 2246 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in ARMEmitLibcall() 2330 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local 2335 ArgFlags.reserve(arg_size); in SelectCall() 2373 ArgFlags.push_back(Flags); in SelectCall() [all …]
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| H A D | ARMCallingConv.td | 13 CCIf<!strconcat("ArgFlags.getNonZeroOrigAlign() == ", Align), A>; 137 CCIfType<[i32], CCIf<"ArgFlags.getNonZeroOrigAlign() != Align(8)",
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallingConvention.h | 20 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 24 ISD::ArgFlagsTy ArgFlags, CCState &State); 27 ISD::ArgFlagsTy ArgFlags, CCState &State); 30 ISD::ArgFlagsTy ArgFlags, CCState &State); 33 ISD::ArgFlagsTy ArgFlags, CCState &State); 36 ISD::ArgFlagsTy ArgFlags, CCState &State); 39 ISD::ArgFlagsTy ArgFlags, CCState &State); 41 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 44 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 48 ISD::ArgFlagsTy ArgFlags, CCState &State);
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| H A D | AArch64CallingConvention.cpp | 43 MVT LocVT, ISD::ArgFlagsTy &ArgFlags, in finishStackBlock() argument 53 ArgFlags.setInConsecutiveRegs(false); in finishStackBlock() 54 ArgFlags.setInConsecutiveRegsLast(false); in finishStackBlock() 72 ArgFlags, State)) in finishStackBlock() 76 ArgFlags.setInConsecutiveRegs(true); in finishStackBlock() 77 ArgFlags.setInConsecutiveRegsLast(true); in finishStackBlock() 106 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Stack_Block() argument 114 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_AArch64_Custom_Stack_Block() 117 return finishStackBlock(PendingMembers, LocVT, ArgFlags, State, Align(8)); in CC_AArch64_Custom_Stack_Block() 125 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Block() argument [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.h | 23 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 26 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 29 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 32 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 35 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 38 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 42 ISD::ArgFlagsTy ArgFlags, CCState &State);
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| H A D | PPCCallingConv.cpp | 26 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_Dummy() argument 34 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignArgRegs() argument 60 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() argument 84 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignFPArgRegs() argument 112 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SPE_CustomSplitFP64() argument 141 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SPE_RetF64() argument
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| H A D | PPCFastISel.cpp | 187 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1375 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in processCallArgs() argument 1387 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_PPC64_ELF_FIS); in processCallArgs() 1603 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in fastLowerCall() local 1608 ArgFlags.reserve(NumArgs); in fastLowerCall() 1637 ArgFlags.push_back(Flags); in fastLowerCall() 1644 if (!processCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in fastLowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | CallingConvLower.cpp | 46 Align MinAlign, ISD::ArgFlagsTy ArgFlags) { in HandleByVal() argument 47 Align Alignment = ArgFlags.getNonZeroByValAlign(); in HandleByVal() 48 unsigned Size = ArgFlags.getByValSize(); in HandleByVal() 96 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local 97 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) in AnalyzeFormalArguments() 109 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn() local 110 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in CheckReturn() 123 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local 124 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in AnalyzeReturn() 136 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/ |
| H A D | TargetCallingConv.td | 41 class CCIfByVal<CCAction A> : CCIf<"ArgFlags.isByVal()", A> { 46 class CCIfPreallocated<CCAction A> : CCIf<"ArgFlags.isPreallocated()", A> { 51 class CCIfSwiftSelf<CCAction A> : CCIf<"ArgFlags.isSwiftSelf()", A> { 56 class CCIfSwiftAsync<CCAction A> : CCIf<"ArgFlags.isSwiftAsync()", A> { 61 class CCIfSwiftError<CCAction A> : CCIf<"ArgFlags.isSwiftError()", A> { 66 class CCIfCFGuardTarget<CCAction A> : CCIf<"ArgFlags.isCFGuardTarget()", A> { 71 class CCIfConsecutiveRegs<CCAction A> : CCIf<"ArgFlags.isInConsecutiveRegs()", A> { 80 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {} 84 class CCIfNest<CCAction A> : CCIf<"ArgFlags.isNest()", A> {} 88 class CCIfSplit<CCAction A> : CCIf<"ArgFlags.isSplit()", A> {} [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZCallingConv.h | 97 ISD::ArgFlagsTy &ArgFlags, in CC_SystemZ_I128Indirect() argument 103 if (!ArgFlags.isSplit() && PendingMembers.empty()) in CC_SystemZ_I128Indirect() 111 if (!ArgFlags.isSplitEnd()) in CC_SystemZ_I128Indirect() 145 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_XPLINK64_Shadow_Reg() argument 168 ISD::ArgFlagsTy &ArgFlags, in CC_XPLINK64_Allocate128BitVararg() argument
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| H A D | SystemZCallingConv.td | 12 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
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| /netbsd-src/external/apache2/llvm/dist/clang/include/clang/Basic/ |
| H A D | IdentifierTable.h | 696 ArgFlags = 0x07 enumerator 707 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector() 714 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector() 720 return reinterpret_cast<IdentifierInfo *>(InfoPtr & ~ArgFlags); in getAsIdentifierInfo() 725 return reinterpret_cast<MultiKeywordSelector *>(InfoPtr & ~ArgFlags); in getMultiKeywordSelector() 729 return InfoPtr & ArgFlags; in getIdentifierInfoFlag()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | CallingConvLower.h | 179 ISD::ArgFlagsTy ArgFlags, CCState &State); 186 ISD::ArgFlagsTy &ArgFlags, CCState &State); 450 ISD::ArgFlagsTy ArgFlags);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kCallingConv.h | 41 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_M68k_Any_AssignToReg() argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallingConv.td | 14 class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {} 16 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 499 ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags; in AnalyzeArguments() local 506 if (ArgFlags.isSExt()) in AnalyzeArguments() 508 else if (ArgFlags.isZExt()) in AnalyzeArguments() 515 if (ArgFlags.isByVal()) { in AnalyzeArguments() 516 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, Align(2), ArgFlags); in AnalyzeArguments() 534 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments() 544 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCallingConv.td | 91 // without any additional information (in ArgFlags) stating that
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 2851 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, in CC_MipsO32() argument 2865 if (ArgFlags.isByVal()) in CC_MipsO32() 2869 if (ArgFlags.isInReg() && !Subtarget.isLittle()) { in CC_MipsO32() 2872 if (ArgFlags.isSExt()) in CC_MipsO32() 2874 else if (ArgFlags.isZExt()) in CC_MipsO32() 2884 if (ArgFlags.isSExt()) in CC_MipsO32() 2886 else if (ArgFlags.isZExt()) in CC_MipsO32() 2899 Align OrigAlign = ArgFlags.getNonZeroOrigAlign(); in CC_MipsO32() 2909 if (ArgFlags.isSplit()) { in CC_MipsO32() 2964 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() argument [all …]
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| H A D | MipsFastISel.cpp | 274 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 279 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() argument 285 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64() argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 371 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Lanai32_VarArg() argument 376 return CC_Lanai32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State); in CC_Lanai32_VarArg() 382 if (ArgFlags.isSExt()) in CC_Lanai32_VarArg() 384 else if (ArgFlags.isZExt()) in CC_Lanai32_VarArg()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 6675 ISD::ArgFlagsTy ArgFlags, CCState &State, bool IsFixed, in CC_RISCV() argument 6737 if (!IsFixed && ArgFlags.getNonZeroOrigAlign() == TwoXLenInBytes && in CC_RISCV() 6755 assert(!ArgFlags.isSplit() && PendingLocs.empty() && in CC_RISCV() 6783 if (!LocVT.isVector() && (ArgFlags.isSplit() || !PendingLocs.empty())) { in CC_RISCV() 6788 PendingArgFlags.push_back(ArgFlags); in CC_RISCV() 6789 if (!ArgFlags.isSplitEnd()) { in CC_RISCV() 6796 if (!LocVT.isVector() && ArgFlags.isSplitEnd() && PendingLocs.size() <= 2) { in CC_RISCV() 6805 ArgFlags); in CC_RISCV() 6857 assert(ArgFlags.isSplitEnd() && "Expected ArgFlags.isSplitEnd()"); in CC_RISCV() 6913 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in analyzeInputArgs() local [all …]
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