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Searched refs:TargetRegisterInfo (Results 1 – 25 of 467) sorted by relevance

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/llvm-project/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp1 //==- TargetRegisterInfo.cpp - Target Register Information Implementation --==//
9 // This file implements the TargetRegisterInfo interface.
13 #include "llvm/CodeGen/TargetRegisterInfo.h"
52 TargetRegisterInfo::TargetRegisterInfo(
63 TargetRegisterInfo::~TargetRegisterInfo() = default;
65 bool TargetRegisterInfo::shouldRegionSplitForVirtReg(
76 void TargetRegisterInfo::markSuperRegs(BitVector &RegisterSet,
82 bool TargetRegisterInfo in markSuperRegs()
53 TargetRegisterInfo::TargetRegisterInfo( TargetRegisterInfo() function in TargetRegisterInfo
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H A DRegisterCoalescer.h23 class TargetRegisterInfo; variable
29 const TargetRegisterInfo &TRI;
60 CoalescerPair(const TargetRegisterInfo &tri) : TRI(tri) {} in CoalescerPair()
65 const TargetRegisterInfo &tri) in CoalescerPair()
H A DInterferenceCache.h30 class TargetRegisterInfo; variable
117 void revalidate(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
120 bool valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
124 const TargetRegisterInfo *TRI, const MachineFunction *MF);
139 const TargetRegisterInfo *TRI = nullptr;
170 const TargetRegisterInfo *tri);
H A DTargetFrameLoweringImpl.cpp51 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getFrameIndexReference()
84 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in determineCalleeSaves()
98 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in determineCalleeSaves()
154 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
182 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
H A DRegisterBank.cpp24 const TargetRegisterInfo &TRI) const { in verify()
66 LLVM_DUMP_METHOD void RegisterBank::dump(const TargetRegisterInfo *TRI) const { in dump()
72 const TargetRegisterInfo *TRI) const { in print()
/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVRegisterBankInfo.h23 class TargetRegisterInfo; variable
42 const TargetRegisterInfo &TRI) const;
46 const TargetRegisterInfo &TRI) const;
50 const TargetRegisterInfo &TRI) const;
54 const TargetRegisterInfo &TRI) const;
/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCRegisterBankInfo.h19 #include "llvm/CodeGen/TargetRegisterInfo.h"
25 class TargetRegisterInfo; variable
66 PPCRegisterBankInfo(const TargetRegisterInfo &TRI);
83 const TargetRegisterInfo &TRI,
88 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
92 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.h24 class TargetRegisterInfo; variable
127 const TargetRegisterInfo &TRI,
132 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
136 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
140 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
147 AArch64RegisterBankInfo(const TargetRegisterInfo &TRI);
/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86RegisterBankInfo.h41 class TargetRegisterInfo; variable
70 const TargetRegisterInfo &TRI,
75 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
79 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
82 X86RegisterBankInfo(const TargetRegisterInfo &TRI);
/llvm-project/llvm/include/llvm/CodeGen/
H A DRegisterBank.h23 class TargetRegisterInfo; variable
57 bool verify(const RegisterBankInfo &RBI, const TargetRegisterInfo &TRI) const;
72 void dump(const TargetRegisterInfo *TRI = nullptr) const;
80 const TargetRegisterInfo *TRI = nullptr) const;
H A DMachineOutliner.h79 void initFromEndOfBlockToStartOfSeq(const TargetRegisterInfo &TRI) { in initFromEndOfBlockToStartOfSeq()
96 void initInSeq(const TargetRegisterInfo &TRI) { in initInSeq()
160 const TargetRegisterInfo &TRI) { in isAvailableAcrossAndOutOfSeq()
169 const TargetRegisterInfo &TRI) { in isAnyUnavailableAcrossOrOutOfSeq()
185 bool isAvailableInsideSeq(Register Reg, const TargetRegisterInfo &TRI) { in isAvailableInsideSeq()
H A DMachineInstr.h60 class TargetRegisterInfo;
1492 /// If TargetRegisterInfo is non-null, then it also checks if there
1496 bool readsRegister(Register Reg, const TargetRegisterInfo *TRI) const {
1514 /// If TargetRegisterInfo is non-null, then it also checks if there is
1516 bool killsRegister(Register Reg, const TargetRegisterInfo *TRI) const {
1521 /// If TargetRegisterInfo is non-null, then it also checks
1524 bool definesRegister(Register Reg, const TargetRegisterInfo *TRI) const {
1531 bool modifiesRegister(Register Reg, const TargetRegisterInfo *TRI) const {
1536 /// If TargetRegisterInfo is non-null, then it also checks
1538 bool registerDefIsDead(Register Reg, const TargetRegisterInfo *TR
58 class TargetRegisterInfo; global() variable
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H A DLiveRegUnits.h31 const TargetRegisterInfo *TRI = nullptr;
39 LiveRegUnits(const TargetRegisterInfo &TRI) { in LiveRegUnits()
50 const TargetRegisterInfo *TRI) { in accumulateUsedDefed()
73 void init(const TargetRegisterInfo &TRI) { in init()
H A DDetectDeadLanes.h40 class TargetRegisterInfo; variable
52 const TargetRegisterInfo *TRI);
99 const TargetRegisterInfo *TRI;
/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.h70 const TargetRegisterInfo *TRI,
77 const TargetRegisterInfo *TRI) const override;
82 const TargetRegisterInfo *TRI) const override;
128 const TargetRegisterInfo *TRI,
137 const TargetRegisterInfo *TRI) const override;
143 const TargetRegisterInfo *TRI) const override;
/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfExpression.h31 class TargetRegisterInfo; variable
159 virtual bool isFrameRegister(const TargetRegisterInfo &TRI,
187 bool addMachineReg(const TargetRegisterInfo &TRI, llvm::Register MachineReg,
266 bool addMachineRegExpression(const TargetRegisterInfo &TRI,
334 bool isFrameRegister(const TargetRegisterInfo &TRI,
364 bool isFrameRegister(const TargetRegisterInfo &TRI,
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBlockRanges.h29 class TargetRegisterInfo; variable
150 const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI);
153 PrintRangeMap(const RegToRangeMap &M, const TargetRegisterInfo &I) in PrintRangeMap()
160 const TargetRegisterInfo &TRI;
165 const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI);
173 const TargetRegisterInfo &TRI;
/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrInfo.h39 class TargetRegisterInfo; variable
143 const TargetRegisterInfo *TRI, Register VReg, in storeRegToStackSlot()
151 const TargetRegisterInfo *TRI, Register VReg, in loadRegFromStackSlot()
159 const TargetRegisterClass *RC, const TargetRegisterInfo *TRI,
166 const TargetRegisterInfo *TRI, int64_t Offset,
H A DMipsFrameLowering.cpp89 const TargetRegisterInfo *TRI = STI.getRegisterInfo();
98 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP()
110 const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
/llvm-project/llvm/lib/Target/ARC/
H A DARCFrameLowering.h46 const TargetRegisterInfo *TRI) const override;
52 const TargetRegisterInfo *TRI) const override;
62 llvm::MachineFunction &, const llvm::TargetRegisterInfo *,
/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.h60 const TargetRegisterInfo *RegisterInfo, Register VReg,
67 const TargetRegisterInfo *RegisterInfo, Register VReg,
76 const TargetRegisterInfo *TRI) const override;
81 const TargetRegisterInfo *TRI) const;
/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.h204 const TargetRegisterInfo *TRI,
301 const TargetRegisterInfo &TRI) const override;
388 const TargetRegisterInfo *TRI) const override;
395 const TargetRegisterInfo *TRI) const override;
401 const TargetRegisterInfo *TRI) const override;
426 const TargetRegisterInfo *TRI, Register VReg,
432 const TargetRegisterInfo *TRI, Register VReg,
529 const TargetRegisterInfo *TRI) const override;
531 const TargetRegisterInfo *TRI) const override;
533 const TargetRegisterInfo *TR
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/llvm-project/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.h34 const TargetRegisterInfo &getRegisterInfo() const { return RI; } in getRegisterInfo()
73 const TargetRegisterInfo *TRI, Register VReg,
79 const TargetRegisterInfo *TRI, Register VReg,
H A DXCoreMachineFunctionInfo.cpp46 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot()
64 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot()
77 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot()
/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYFrameLowering.h46 MachineFunction &MF, const TargetRegisterInfo *TRI, in assignCalleeSavedSpillSlots()
57 const TargetRegisterInfo *TRI) const override;
62 const TargetRegisterInfo *TRI) const override;

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