| /llvm-project/llvm/lib/TargetParser/ |
| H A D | TargetParser.cpp | 27 unsigned Features; member
31 // Name Canonical Kind Features
65 // Name Canonical Kind Features
208 return Entry->Features; in getArchAttrR600()
214 return Entry->Features; in fillValidArchListAMDGCN()
323 StringMap<bool> &Features) { in fillAMDGPUFeatureMap()
329 Features["16-bit-insts"] = true; in fillAMDGPUFeatureMap()
330 Features["ashr-pk-insts"] = true; in fillAMDGPUFeatureMap()
331 Features["atomic-buffer-pk-add-bf16-inst"] = true; in fillAMDGPUFeatureMap()
332 Features["atomi in fillAMDGPUFeatureMap()
316 fillAMDGPUFeatureMap(StringRef GPU,const Triple & T,StringMap<bool> & Features) fillAMDGPUFeatureMap() argument
620 insertWaveSizeFeature(StringRef GPU,const Triple & T,StringMap<bool> & Features,std::string & ErrorMsg) insertWaveSizeFeature() argument
[all...] |
| H A D | Host.cpp | 682 #define testFeature(F) (Features[F / 32] & (1 << (F % 32))) != 0 in getIntelProcessorTypeAndSubtype()
686 const unsigned *Features, in getIntelProcessorTypeAndSubtype()
1087 const unsigned *Features, in getAMDProcessorTypeAndSubtype()
1261 unsigned *Features) { in getAvailableFeatures()
1265 Features[F / 32] |= 1U << (F % 32); in getAvailableFeatures()
1404 unsigned Features[(X86::CPU_FEATURE_MAX + 31) / 32] = {0}; in getHostCPUName()
1406 getAvailableFeatures(ECX, EDX, MaxLeaf, Features); in getHostCPUName()
1416 CPU = getIntelProcessorTypeAndSubtype(Family, Model, Features, &Type,
1419 CPU = getAMDProcessorTypeAndSubtype(Family, Model, Features, &Type,
1814 StringMap<bool> Features; in getHostCPUFeatures()
648 getIntelProcessorTypeAndSubtype(unsigned Family,unsigned Model,const unsigned * Features,unsigned * Type,unsigned * Subtype) getIntelProcessorTypeAndSubtype() argument
1009 getAMDProcessorTypeAndSubtype(unsigned Family,unsigned Model,const unsigned * Features,unsigned * Type,unsigned * Subtype) getAMDProcessorTypeAndSubtype() argument
1163 getAvailableFeatures(unsigned ECX,unsigned EDX,unsigned MaxLeaf,unsigned * Features) getAvailableFeatures() argument
1306 unsigned Features[(X86::CPU_FEATURE_MAX + 31) / 32] = {0}; getHostCPUName() local
1649 getHostCPUFeatures(StringMap<bool> & Features) getHostCPUFeatures() argument
1845 getHostCPUFeatures(StringMap<bool> & Features) getHostCPUFeatures() argument
1914 getHostCPUFeatures(StringMap<bool> & Features) getHostCPUFeatures() argument
1926 getHostCPUFeatures(StringMap<bool> & Features) getHostCPUFeatures() argument
1942 getHostCPUFeatures(StringMap<bool> & Features) getHostCPUFeatures() argument
[all...] |
| H A D | CSKYTargetParser.cpp | 21 std::vector<StringRef> &Features) { in getFPUFeatures() argument
28 Features.push_back("+fpuv2_sf"); in getFPUFeatures()
29 Features.push_back("+fpuv2_df"); in getFPUFeatures()
30 Features.push_back("+fdivdu"); in getFPUFeatures()
33 Features.push_back("+fpuv2_sf"); in getFPUFeatures()
34 Features.push_back("+fpuv2_df"); in getFPUFeatures()
37 Features.push_back("+fpuv2_sf"); in getFPUFeatures()
38 Features.push_back("+fpuv2_df"); in getFPUFeatures()
39 Features.push_back("+fdivdu"); in getFPUFeatures()
42 Features.push_back("+fpuv2_sf"); in getFPUFeatures()
[all …]
|
| H A D | SubtargetFeature.cpp | 40 Features.push_back(hasFlag(String) ? String.lower() in AddFeature()
46 Features.insert(Features.cend(), OtherFeatures.begin(), OtherFeatures.end()); in addFeaturesVector()
51 Split(Features, Initial); in SubtargetFeatures()
55 return join(Features.begin(), Features.end(), ","); in getString()
59 for (const auto &F : Features) in print()
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNProcessors.td | 24 FeatureISAVersion6_0_0.Features
28 FeatureISAVersion6_0_0.Features
32 FeatureISAVersion6_0_1.Features
36 FeatureISAVersion6_0_1.Features
40 FeatureISAVersion6_0_1.Features
44 FeatureISAVersion6_0_2.Features
48 FeatureISAVersion6_0_2.Features
52 FeatureISAVersion6_0_2.Features
60 FeatureISAVersion7_0_0.Features
64 FeatureISAVersion7_0_0.Features
[all...] |
| /llvm-project/clang/lib/Driver/ToolChains/Arch/ |
| H A D | RISCV.cpp | 30 std::vector<StringRef> &Features, in getArchFeatures() argument
47 Features.push_back(Args.MakeArgString(Str)); in getArchFeatures()
50 Features.push_back(Args.MakeArgString("+experimental")); in getArchFeatures()
59 std::vector<StringRef> &Features) { in getRISCFeaturesFromMcpu() argument
74 std::vector<StringRef> &Features) { in getRISCVTargetFeatures() argument
77 if (!getArchFeatures(D, MArch, Features, Args)) in getRISCVTargetFeatures()
90 getRISCFeaturesFromMcpu(D, A, Triple, CPU, Features); in getRISCVTargetFeatures()
101 Features.push_back("+reserve-" #REG); in getRISCVTargetFeatures()
137 Features.push_back("+relax"); in getRISCVTargetFeatures()
145 Features in getRISCVTargetFeatures()
[all...] |
| H A D | AArch64.cpp | 140 llvm::AArch64::ExtensionSet &Extensions, std::vector<StringRef> &Features) { in getAArch64ArchFeaturesFromMcpu()
149 Features.push_back(Args.MakeArgString((Enabled ? "+" : "-") + Feature));
159 std::vector<StringRef> &Features) { in getAArch64MicroArchFeaturesFromMtune()
174 Features.push_back("+zcm");
175 Features.push_back("+zcz");
184 std::vector<StringRef> &Features) { in getAArch64MicroArchFeaturesFromMcpu()
192 return getAArch64MicroArchFeaturesFromMtune(D, CPU, Args, Features); in getAArch64TargetFeatures() argument
198 std::vector<StringRef> &Features, in getAArch64TargetFeatures()
220 Features); in getAArch64TargetFeatures()
223 D, getAArch64TargetCPU(Args, Triple, A), Args, Extensions, Features); in getAArch64TargetFeatures()
153 getAArch64MicroArchFeaturesFromMtune(const Driver & D,StringRef Mtune,const ArgList & Args,std::vector<StringRef> & Features) getAArch64MicroArchFeaturesFromMtune() argument
178 getAArch64MicroArchFeaturesFromMcpu(const Driver & D,StringRef Mcpu,const ArgList & Args,std::vector<StringRef> & Features) getAArch64MicroArchFeaturesFromMcpu() argument
[all...] |
| H A D | Sparc.cpp | 135 std::vector<StringRef> &Features) { in getSparcTargetFeatures()
138 Features.push_back("+soft-float"); in getSparcTargetFeatures()
142 Features.push_back("+fsmuld"); in getSparcTargetFeatures()
144 Features.push_back("-fsmuld"); in getSparcTargetFeatures()
149 Features.push_back("+popc"); in getSparcTargetFeatures()
151 Features.push_back("-popc"); in getSparcTargetFeatures()
156 Features.push_back("+vis"); in getSparcTargetFeatures()
158 Features.push_back("-vis"); in getSparcTargetFeatures()
163 Features.push_back("+vis2"); in getSparcTargetFeatures()
165 Features in getSparcTargetFeatures()
134 getSparcTargetFeatures(const Driver & D,const ArgList & Args,std::vector<StringRef> & Features) getSparcTargetFeatures() argument
[all...] |
| H A D | M68k.cpp | 69 std::vector<llvm::StringRef> &Features) { in addFloatABIFeatures() argument
74 Features.push_back("-isa-68881"); in addFloatABIFeatures()
75 Features.push_back("-isa-68882"); in addFloatABIFeatures()
84 Features.push_back("+isa-68881"); in addFloatABIFeatures()
90 Features.push_back("+isa-68882"); in addFloatABIFeatures()
95 std::vector<StringRef> &Features) { in getM68kTargetFeatures() argument
96 addFloatABIFeatures(Args, Features); in getM68kTargetFeatures()
100 Features.push_back("+reserve-a0"); in getM68kTargetFeatures()
102 Features.push_back("+reserve-a1"); in getM68kTargetFeatures()
104 Features.push_back("+reserve-a2"); in getM68kTargetFeatures()
[all …]
|
| H A D | X86.cpp | 121 std::vector<StringRef> &Features) { in getX86TargetFeatures() argument
135 Features.push_back( in getX86TargetFeatures()
143 Features.push_back("-rdrnd"); in getX86TargetFeatures()
144 Features.push_back("-aes"); in getX86TargetFeatures()
145 Features.push_back("-pclmul"); in getX86TargetFeatures()
146 Features.push_back("-rtm"); in getX86TargetFeatures()
147 Features.push_back("-fsgsbase"); in getX86TargetFeatures()
154 Features.push_back("+sse4.2"); in getX86TargetFeatures()
155 Features.push_back("+popcnt"); in getX86TargetFeatures()
156 Features in getX86TargetFeatures()
[all...] |
| H A D | LoongArch.cpp | 132 std::vector<StringRef> &Features) { in getLoongArchTargetFeatures()
136 Features.push_back("+lsx"); in getLoongArchTargetFeatures()
143 Features.push_back("+relax"); in getLoongArchTargetFeatures()
152 Features.push_back("-relax"); in getLoongArchTargetFeatures()
161 llvm::LoongArch::getArchFeatures(ArchName, Features); in getLoongArchTargetFeatures()
164 Features.push_back( in getLoongArchTargetFeatures()
174 Features.push_back("+f"); in getLoongArchTargetFeatures()
175 Features.push_back("+d"); in getLoongArchTargetFeatures()
177 Features.push_back("+f"); in getLoongArchTargetFeatures()
178 Features in getLoongArchTargetFeatures()
129 getLoongArchTargetFeatures(const Driver & D,const llvm::Triple & Triple,const ArgList & Args,std::vector<StringRef> & Features) getLoongArchTargetFeatures() argument
[all...] |
| H A D | ARM.cpp | 102 std::vector<StringRef> &Features) { in DecodeARMFeatures()
104 if (!llvm::ARM::getHWDivFeatures(HWDivID, Features)) in DecodeARMFeatures()
111 std::vector<StringRef> &Features) { in DecodeARMFeatures()
113 if (!llvm::ARM::getFPUFeatures(FPUKind, Features)) in DecodeARMFeaturesFromCPU()
121 std::vector<StringRef> &Features, in DecodeARMFeaturesFromCPU()
127 if (!appendArchExtFeatures(CPU, ArchKind, Feature, Features, ArgFPUKind)) in checkARMArchName()
134 std::vector<StringRef> &Features) { in checkARMArchName()
139 llvm::ARM::getExtensionFeatures(Extension, Features); in checkARMArchName()
148 std::vector<StringRef> &Features, in checkARMCPUName()
157 !DecodeARMFeatures(D, Split.second, CPUName, ArchKind, Features, in checkARMCPUName()
82 getARMHWDivFeatures(const Driver & D,const Arg * A,const ArgList & Args,StringRef HWDiv,std::vector<StringRef> & Features) getARMHWDivFeatures() argument
91 getARMFPUFeatures(const Driver & D,const Arg * A,const ArgList & Args,StringRef FPU,std::vector<StringRef> & Features) getARMFPUFeatures() argument
101 DecodeARMFeatures(const Driver & D,StringRef text,StringRef CPU,llvm::ARM::ArchKind ArchKind,std::vector<StringRef> & Features,llvm::ARM::FPUKind & ArgFPUKind) DecodeARMFeatures() argument
114 DecodeARMFeaturesFromCPU(const Driver & D,StringRef CPU,std::vector<StringRef> & Features) DecodeARMFeaturesFromCPU() argument
128 checkARMArchName(const Driver & D,const Arg * A,const ArgList & Args,llvm::StringRef ArchName,llvm::StringRef CPUName,std::vector<StringRef> & Features,const llvm::Triple & Triple,llvm::ARM::FPUKind & ArgFPUKind) checkARMArchName() argument
146 checkARMCPUName(const Driver & D,const Arg * A,const ArgList & Args,llvm::StringRef CPUName,llvm::StringRef ArchName,std::vector<StringRef> & Features,const llvm::Triple & Triple,llvm::ARM::FPUKind & ArgFPUKind) checkARMCPUName() argument
490 getARMTargetFeatures(const Driver & D,const llvm::Triple & Triple,const ArgList & Args,std::vector<StringRef> & Features,bool ForAS,bool ForMultilib) getARMTargetFeatures() argument
[all...] |
| H A D | Mips.cpp | 187 std::vector<StringRef> &Features) { in getMIPSTargetFeatures() argument
257 Features.push_back("+noabicalls"); in getMIPSTargetFeatures()
259 Features.push_back("-noabicalls"); in getMIPSTargetFeatures()
264 Features.push_back("-long-calls"); in getMIPSTargetFeatures()
266 Features.push_back("+long-calls"); in getMIPSTargetFeatures()
273 Features.push_back("+xgot"); in getMIPSTargetFeatures()
275 Features.push_back("-xgot"); in getMIPSTargetFeatures()
283 Features.push_back("+soft-float"); in getMIPSTargetFeatures()
290 Features.push_back("+nan2008"); in getMIPSTargetFeatures()
293 Features in getMIPSTargetFeatures()
[all...] |
| H A D | SystemZ.cpp | 58 std::vector<llvm::StringRef> &Features) { in getSystemZTargetFeatures()
62 Features.push_back("+transactional-execution"); in getSystemZTargetFeatures()
64 Features.push_back("-transactional-execution"); in getSystemZTargetFeatures()
69 Features.push_back("+vector"); in getSystemZTargetFeatures()
71 Features.push_back("-vector"); in getSystemZTargetFeatures()
76 Features.push_back("+soft-float"); in getSystemZTargetFeatures()
81 Features.push_back("+unaligned-symbols"); in getSystemZTargetFeatures()
83 Features.push_back("-unaligned-symbols");
55 getSystemZTargetFeatures(const Driver & D,const ArgList & Args,std::vector<llvm::StringRef> & Features) getSystemZTargetFeatures() argument
|
| /llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRELFStreamer.cpp | 10 static unsigned getEFlagsForFeatureSet(const FeatureBitset &Features) {
14 if (Features[AVR::ELFArchAVR1]) in getEFlagsForFeatureSet()
16 else if (Features[AVR::ELFArchAVR2]) in getEFlagsForFeatureSet()
18 else if (Features[AVR::ELFArchAVR25]) in getEFlagsForFeatureSet()
20 else if (Features[AVR::ELFArchAVR3]) in getEFlagsForFeatureSet()
22 else if (Features[AVR::ELFArchAVR31]) in getEFlagsForFeatureSet()
24 else if (Features[AVR::ELFArchAVR35]) in getEFlagsForFeatureSet()
26 else if (Features[AVR::ELFArchAVR4]) in getEFlagsForFeatureSet()
28 else if (Features[AVR::ELFArchAVR5]) in getEFlagsForFeatureSet()
30 else if (Features[AV in getEFlagsForFeatureSet()
13 getEFlagsForFeatureSet(const FeatureBitset & Features) getEFlagsForFeatureSet() argument
[all...] |
| /llvm-project/clang/lib/Basic/Targets/ |
| H A D | PPC.cpp | 34 bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features, in handleTargetFeatures()
37 for (const auto &Feature : Features) { in handleTargetFeatures()
538 llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU, in initFeatureMap()
540 Features["altivec"] = llvm::StringSwitch<bool>(CPU) in initFeatureMap()
555 Features["power9-vector"] = (CPU == "pwr9"); in initFeatureMap()
556 Features["crypto"] = llvm::StringSwitch<bool>(CPU) in initFeatureMap()
561 Features["power8-vector"] = llvm::StringSwitch<bool>(CPU) in initFeatureMap()
566 Features["bpermd"] = llvm::StringSwitch<bool>(CPU) in initFeatureMap()
572 Features["extdiv"] = llvm::StringSwitch<bool>(CPU) in initFeatureMap()
578 Features["direc in initFeatureMap()
33 handleTargetFeatures(std::vector<std::string> & Features,DiagnosticsEngine & Diags) handleTargetFeatures() argument
515 initFeatureMap(llvm::StringMap<bool> & Features,DiagnosticsEngine & Diags,StringRef CPU,const std::vector<std::string> & FeaturesVec) const initFeatureMap() argument
737 setFeatureEnabled(llvm::StringMap<bool> & Features,StringRef Name,bool Enabled) const setFeatureEnabled() argument
[all...] |
| H A D | WebAssembly.cpp | 119 void WebAssemblyTargetInfo::setSIMDLevel(llvm::StringMap<bool> &Features, in setSIMDLevel()
124 Features["relaxed-simd"] = true; in setSIMDLevel()
127 Features["simd128"] = true; in setSIMDLevel()
138 Features["simd128"] = false;
141 Features["relaxed-simd"] = false; in setFeatureEnabled()
146 void WebAssemblyTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, in setFeatureEnabled()
150 setSIMDLevel(Features, SIMD128, Enabled); in initFeatureMap()
152 setSIMDLevel(Features, RelaxedSIMD, Enabled); in initFeatureMap()
154 Features[Name] = Enabled; in initFeatureMap()
158 llvm::StringMap<bool> &Features, DiagnosticsEngin in initFeatureMap()
112 setSIMDLevel(llvm::StringMap<bool> & Features,SIMDEnum Level,bool Enabled) setSIMDLevel() argument
139 setFeatureEnabled(llvm::StringMap<bool> & Features,StringRef Name,bool Enabled) const setFeatureEnabled() argument
151 initFeatureMap(llvm::StringMap<bool> & Features,DiagnosticsEngine & Diags,StringRef CPU,const std::vector<std::string> & FeaturesVec) const initFeatureMap() argument
181 handleTargetFeatures(std::vector<std::string> & Features,DiagnosticsEngine & Diags) handleTargetFeatures() argument
[all...] |
| H A D | RISCV.cpp | 262 llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU, in initFeatureMap()
268 Features["64bit"] = true; in initFeatureMap()
271 Features["32bit"] = true; in initFeatureMap()
288 return TargetInfo::initFeatureMap(Features, Diags, CPU, AllFeatures); in initFeatureMap()
331 bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features, in hasFeature()
334 auto ParseResult = llvm::RISCVISAInfo::parseFeatures(XLen, Features); in handleTargetFeatures() argument
354 llvm::is_contained(Features, "+unaligned-scalar-mem"); in handleTargetFeatures()
356 if (llvm::is_contained(Features, "+experimental")) in handleTargetFeatures()
389 static void populateNegativeRISCVFeatures(std::vector<std::string> &Features) { in fillValidTuneCPUList()
398 Features in handleFullArchString()
246 initFeatureMap(llvm::StringMap<bool> & Features,DiagnosticsEngine & Diags,StringRef CPU,const std::vector<std::string> & FeaturesVec) const initFeatureMap() argument
393 handleFullArchString(StringRef FullArchStr,std::vector<std::string> & Features) handleFullArchString() argument
[all...] |
| /llvm-project/llvm/lib/Object/ |
| H A D | ELFObjectFile.cpp | 101 SubtargetFeatures Features; in getMIPSFeatures()
108 Features.AddFeature("mips2"); in getMIPSFeatures()
111 Features.AddFeature("mips3"); in getMIPSFeatures()
114 Features.AddFeature("mips4"); in getMIPSFeatures()
117 Features.AddFeature("mips5"); in getMIPSFeatures()
120 Features.AddFeature("mips32"); in getMIPSFeatures()
123 Features.AddFeature("mips64"); in getMIPSFeatures()
126 Features.AddFeature("mips32r2"); in getMIPSFeatures()
129 Features.AddFeature("mips64r2"); in getMIPSFeatures()
132 Features in getMIPSFeatures()
102 SubtargetFeatures Features; getMIPSFeatures() local
162 SubtargetFeatures Features; getARMFeatures() local
319 SubtargetFeatures Features; getHexagonFeatures() local
367 SubtargetFeatures Features; getRISCVFeatures() local
401 SubtargetFeatures Features; getLoongArchFeatures() local
[all...] |
| /llvm-project/llvm/test/CodeGen/X86/ |
| H A D | norex-subreg.ll | 55 %Features.6.or35 = select i1 %cmp33, i32 0, i32 undef
57 %or40 = or i32 %Features.6.or35, 4
58 %Features.8 = select i1 %cmp38, i32 %Features.6.or35, i32 %or40
60 %or45 = or i32 %Features.8, 2
62 %Features.8.or45 = select i1 %cmp43, i32 %Features.8, i32 %or45
65 %or50 = or i32 %Features.8.or45, 32
66 %Features.10 = select i1 %cmp48, i32 %Features.8.or45, i32 %or50
67 %or55 = or i32 %Features.10, 64
68 %Features.10.or55 = select i1 undef, i32 %Features.10, i32 %or55
72 %Features.12 = or i32 %Features.10.or55, %or60
[all …]
|
| /llvm-project/clang/include/clang/Basic/ |
| H A D | BuiltinsRISCV.td | 18 let Features = features;
45 let Features = "zbkx,32bit" in {
48 } // Features = "zbkx,32bit"
50 let Features = "zbkx,64bit" in {
53 } // Features = "zbkx,64bit"
66 let Features = "zknd,32bit" in {
69 } // Features = "zknd,32bit"
71 let Features = "zknd,64bit" in {
75 } // Features = "zknd,64bit"
80 let Features
[all...] |
| /llvm-project/clang/lib/Basic/ |
| H A D | TargetID.cpp | 29 auto Features = T.isAMDGCN() ? llvm::AMDGPU::getArchAttrAMDGCN(ProcKind) in getAllPossibleAMDGPUTargetIDFeatures()
31 if (Features & llvm::AMDGPU::FEATURE_SRAMECC) in getAllPossibleAMDGPUTargetIDFeatures()
33 if (Features & llvm::AMDGPU::FEATURE_XNACK) in getAllPossibleAMDGPUTargetIDFeatures()
80 auto Features = Split.second; in parseTargetIDWithFormatCheckingOnly()
81 if (Features.empty()) in parseTargetIDWithFormatCheckingOnly()
88 while (!Features.empty()) { in parseTargetIDWithFormatCheckingOnly()
89 auto Splits = Features.split(':'); in parseTargetIDWithFormatCheckingOnly()
98 Features = Splits.second; in parseTargetIDWithFormatCheckingOnly()
130 const llvm::StringMap<bool> &Features) { in getCanonicalTargetID()
133 for (const auto &F : Features) in getCanonicalTargetID()
28 auto Features = T.isAMDGCN() ? llvm::AMDGPU::getArchAttrAMDGCN(ProcKind) getAllPossibleAMDGPUTargetIDFeatures() local
79 auto Features = Split.second; parseTargetIDWithFormatCheckingOnly() local
131 getCanonicalTargetID(llvm::StringRef Processor,const llvm::StringMap<bool> & Features) getCanonicalTargetID() argument
148 llvm::StringMap<bool> Features; getConflictTargetIDCombination() member
152 llvm::StringMap<bool> Features; getConflictTargetIDCombination() local
[all...] |
| /llvm-project/clang/lib/Lex/ |
| H A D | LiteralSupport.cpp | 80 static CharSourceRange MakeCharSourceRange(const LangOptions &Features, in MakeCharSourceRange() argument
87 TokLoc.getManager(), Features); in MakeCharSourceRange()
90 TokLoc.getManager(), Features); in MakeCharSourceRange()
100 const LangOptions &Features, FullSourceLoc TokLoc, in Diag() argument
105 TokLoc.getManager(), Features); in Diag()
107 MakeCharSourceRange(Features, TokLoc, TokBegin, TokRangeBegin, TokRangeEnd); in Diag()
135 const LangOptions &Features, in ProcessCharEscape() argument
162 Diag(Diags, Features, Loc, ThisTokBegin, EscapeBegin, ThisTokBuf, in ProcessCharEscape()
168 Diag(Diags, Features, Loc, ThisTokBegin, EscapeBegin, ThisTokBuf, in ProcessCharEscape()
195 Diag(Diags, Features, Lo in ProcessCharEscape()
460 ProcessNumericUCNEscape(const char * ThisTokBegin,const char * & ThisTokBuf,const char * ThisTokEnd,uint32_t & UcnVal,unsigned short & UcnLen,bool & Delimited,FullSourceLoc Loc,DiagnosticsEngine * Diags,const LangOptions & Features,bool in_char_string_literal=false) ProcessNumericUCNEscape() argument
542 DiagnoseInvalidUnicodeCharacterName(DiagnosticsEngine * Diags,const LangOptions & Features,FullSourceLoc Loc,const char * TokBegin,const char * TokRangeBegin,const char * TokRangeEnd,llvm::StringRef Name) DiagnoseInvalidUnicodeCharacterName() argument
601 ProcessNamedUCNEscape(const char * ThisTokBegin,const char * & ThisTokBuf,const char * ThisTokEnd,uint32_t & UcnVal,unsigned short & UcnLen,FullSourceLoc Loc,DiagnosticsEngine * Diags,const LangOptions & Features) ProcessNamedUCNEscape() argument
649 ProcessUCNEscape(const char * ThisTokBegin,const char * & ThisTokBuf,const char * ThisTokEnd,uint32_t & UcnVal,unsigned short & UcnLen,FullSourceLoc Loc,DiagnosticsEngine * Diags,const LangOptions & Features,bool in_char_string_literal=false) ProcessUCNEscape() argument
722 MeasureUCNEscape(const char * ThisTokBegin,const char * & ThisTokBuf,const char * ThisTokEnd,unsigned CharByteWidth,const LangOptions & Features,bool & HadError) MeasureUCNEscape() argument
760 EncodeUCNEscape(const char * ThisTokBegin,const char * & ThisTokBuf,const char * ThisTokEnd,char * & ResultBuf,bool & HadError,FullSourceLoc Loc,unsigned CharByteWidth,DiagnosticsEngine * Diags,const LangOptions & Features) EncodeUCNEscape() argument
[all...] |
| /llvm-project/llvm/include/llvm/TargetParser/ |
| H A D | AArch64TargetParser.h | 208 // feature in the \p Features list without expanding their dependencies. Used
210 // Features that are not recognized are pushed back to \p NonExtensions.
211 void reconstructFromParsedFeatures(const std::vector<std::string> &Features,
215 // them to Features.
216 template <typename T> void toLLVMFeatureList(std::vector<T> &Features) const {
218 Features.emplace_back(T(BaseArch->ArchFeature));
224 Features.emplace_back(T(E.PosTargetFeature)); in toLLVMFeatureList()
226 Features.emplace_back(T(E.NegTargetFeature)); in toLLVMFeatureList()
246 std::vector<StringRef> &Features);
276 uint64_t getFMVPriority(ArrayRef<StringRef> Features);
73 StringRef Features; // List of SubtargetFeatures to enable. global() member
[all...] |
| /llvm-project/llvm/unittests/TargetParser/ |
| H A D | TargetParserTest.cpp | 52 std::vector<StringRef> Features; in FormatExtensionFlags() local
55 Features.push_back("none"); in FormatExtensionFlags()
56 ARM::getExtensionFeatures(Flags, Features); in FormatExtensionFlags()
60 Features.erase(std::remove_if(Features.begin(), Features.end(), in FormatExtensionFlags()
64 Features.end()); in FormatExtensionFlags()
66 return llvm::join(Features, ", "); in FormatExtensionFlags()
765 std::vector<StringRef> Features; in TEST()
767 EXPECT_FALSE(ARM::getExtensionFeatures(ARM::AEK_INVALID, Features)); in TEST()
70 std::vector<StringRef> Features; FormatExtensionFlags() local
782 std::vector<StringRef> Features; TEST() local
802 std::vector<StringRef> Features; TEST() local
846 std::vector<StringRef> Features; testArchExtDependency() local
2001 std::vector<StringRef> Features; TEST() local
2290 std::vector<StringRef> Features; TEST_P() local
2324 std::vector<StringRef> Features; TEST_P() local
[all...] |