/llvm-project/llvm/lib/Target/ARM/ |
H A D | MVEVPTBlockPass.cpp | 67 findVCMPToFoldIntoVPST(MachineBasicBlock::iterator MI,const TargetRegisterInfo * TRI,unsigned & NewOpcode) findVCMPToFoldIntoVPST() argument 275 unsigned NewOpcode; InsertVPTBlocks() local
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/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FixupLEAs.cpp | 524 unsigned NewOpcode = AluI->getOpcode(); in optLEAALU() local 588 unsigned NewOpcode = getADDrrFromLEA(MI.getOpcode()); in optTwoAddrLEA() local 612 unsigned NewOpcode = getINCDECFromLEA(MI.getOpcode(), IsINC); in optTwoAddrLEA() local 623 unsigned NewOpcode = getADDriFromLEA(MI.getOpcode(), Disp); in optTwoAddrLEA() local
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/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonCFGOptimizer.cpp | 85 int NewOpcode = 0; InvertAndChangeJumpTarget() local
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H A D | HexagonVLIWPacketizer.cpp | 462 int NewOpcode; in promoteToDotNew() local 472 int NewOpcode = HII->getDotOldOp(MI); in demoteToDotOld() local 891 int NewOpcode = (RC != &Hexagon::PredRegsRegClass) ? HII->getDotNewOp(MI) : in canPromoteToDotNew() local
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H A D | HexagonInstrInfo.cpp | 1644 unsigned NewOpcode = getInvertedPredicatedOpcode(opcode); reverseBranchCondition() local 3866 int NewOpcode = Hexagon::getPredNewOpcode(MI.getOpcode()); getDotNewPredOp() local 4661 unsigned NewOpcode = getInvertedPredicatedOpcode(MI.getOpcode()); invertAndChangeJumpTarget() local
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/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiRegisterInfo.cpp | 228 unsigned NewOpcode = getOppositeALULoOpcode(MI.getOpcode()); eliminateFrameIndex() local
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/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600MachineCFGStructurizer.cpp | 435 int NewOpcode, const DebugLoc &DL) { in insertInstrEnd() argument 444 int NewOpcode, in insertInstrBefore() argument 457 MachineBasicBlock::iterator I, int NewOpcode) { in insertInstrBefore() argument 469 insertCondBranchBefore(MachineBasicBlock::iterator I,int NewOpcode,const DebugLoc & DL) insertCondBranchBefore() argument 482 insertCondBranchBefore(MachineBasicBlock * blk,MachineBasicBlock::iterator I,int NewOpcode,int RegNum,const DebugLoc & DL) insertCondBranchBefore() argument [all...] |
H A D | GCNCreateVOPD.cpp | 76 assert(NewOpcode != -1 && in doReplace() local
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H A D | SIShrinkInstructions.cpp | 385 unsigned NewOpcode = AMDGPU::getMIMGOpcode(Info->BaseOpcode, NewEncoding, shrinkMIMG() local 421 unsigned NewOpcode = AMDGPU::INSTRUCTION_LIST_END; shrinkMadFma() local [all...] |
H A D | SIOptimizeExecMasking.cpp | 578 const int NewOpcode = AMDGPU::getVCMPXOpFromVCMP(VCmp.getOpcode()); optimizeVCMPSaveExecSequence() local
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H A D | SIWholeQuadMode.cpp | 754 unsigned NewOpcode = 0; splitBlock() local
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/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCOptAddrMode.cpp | 263 int NewOpcode = ARC::getPostIncOpcode(Ldst.getOpcode()); in tryToCombine() local 451 void ARCOptAddrMode::changeToAddrMode(MachineInstr &Ldst, unsigned NewOpcode, in changeToAddrMode()
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/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreRegisterInfo.cpp | 138 int NewOpcode; InsertSPImmInst() local
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/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsDelaySlotFiller.cpp | 563 Branch = TII->genInstrWithNewOpc(NewOpcode, Branch); in replaceWithCompactBranch() local
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/llvm-project/bolt/lib/Target/AArch64/ |
H A D | AArch64MCPlusBuilder.cpp | 51 unsigned NewOpcode = AArch64::STPXpre; createPushRegisters() local 62 unsigned NewOpcode = AArch64::LDPXpost; createPopRegisters() local
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/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 143 unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset); splitAdjDynAlloc() local 1090 unsigned NewOpcode; convertToThreeAddress() local [all...] |
H A D | SystemZFrameLowering.cpp | 717 unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset); emitEpilogue() local
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/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCAsmPrinter.cpp | 1572 unsigned NewOpcode = emitInstruction() local 1586 unsigned NewOpcode = emitInstruction() local
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H A D | PPCRegisterInfo.cpp | 1734 unsigned NewOpcode = 0u; eliminateFrameIndex() local
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/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | GIMatchTableExecutorImpl.h | 1026 uint16_t NewOpcode = readU16(); executeMatchTable() local
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/llvm-project/clang-tools-extra/clang-tidy/readability/ |
H A D | SimplifyBooleanExprCheck.cpp | 986 auto NewOpcode = getDemorganFlippedOperator(Inner->getOpcode()); in reportDeMorgan() local
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/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ExpandPseudoInsts.cpp | 563 int NewOpcode; expand_DestructiveOp() local
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H A D | AArch64LoadStoreOptimizer.cpp | 783 int NewOpcode = getMatchingWideOpcode(Opc); mergeNarrowZeroStores() local
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/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsMCCodeEmitter.cpp | 173 int NewOpcode = -1; in encodeInstruction() local
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/llvm-project/llvm/lib/Target/PowerPC/AsmParser/ |
H A D | PPCAsmParser.cpp | 1663 std::string NewOpcode; ParseInstruction() local
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