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Revision tags: llvmorg-21-init, llvmorg-19.1.7 |
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| #
d1e5e673 |
| 31-Dec-2024 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[PhaseOrdering] Update test RUN lines to use `-passes="default<O3>"` to allow evaluation by DOS batch scripts. NFC.
`-passes='default<O3>'` isn't correctly parsed on DOS, so when update_test_checks.
[PhaseOrdering] Update test RUN lines to use `-passes="default<O3>"` to allow evaluation by DOS batch scripts. NFC.
`-passes='default<O3>'` isn't correctly parsed on DOS, so when update_test_checks.py runs a system call on the opt RUN line, it fails to evaluate properly - use `-passes="default<O3>"` instead.
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4ad0fdd1 |
| 17-Dec-2024 |
Florian Hahn <flo@fhahn.com> |
[VPlan] Remove reverse() of predecessors from VPInstruction::generate.
This was originally done to reduce the diff for the change. Remove it and update the remaining tests. NFC modulo reordering of
[VPlan] Remove reverse() of predecessors from VPInstruction::generate.
This was originally done to reduce the diff for the change. Remove it and update the remaining tests. NFC modulo reordering of incoming values.
Clean up after https://github.com/llvm/llvm-project/pull/114292.
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| #
11571874 |
| 17-Dec-2024 |
Nikita Popov <npopov@redhat.com> |
[VPlan] Propagate all GEP flags (#119899)
Store GEPNoWrapFlags instead of only InBounds and propagate them.
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Revision tags: llvmorg-19.1.6 |
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| #
462cb3cd |
| 05-Dec-2024 |
Nikita Popov <npopov@redhat.com> |
[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144)
If the gep is nusw (usually via inbounds) and the offset is
non-negative, we can infer nuw.
Proof: https://alive2.llvm.org/ce/z
[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144)
If the gep is nusw (usually via inbounds) and the offset is
non-negative, we can infer nuw.
Proof: https://alive2.llvm.org/ce/z/ihztLy
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Revision tags: llvmorg-19.1.5, llvmorg-19.1.4 |
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38fffa63 |
| 06-Nov-2024 |
Paul Walker <paul.walker@arm.com> |
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
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Revision tags: llvmorg-19.1.3 |
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095d49da |
| 17-Oct-2024 |
Yingwei Zheng <dtcxzyw2333@gmail.com> |
[InstCombine] Set `samesign` when converting signed predicates into unsigned (#112642)
Alive2: https://alive2.llvm.org/ce/z/6cqdt-
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Revision tags: llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4 |
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a1058776 |
| 21-Aug-2024 |
Nikita Popov <npopov@redhat.com> |
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
The idea behind this canonicalization is that it allows us to handle less
patterns, because we know that some will be can
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
The idea behind this canonicalization is that it allows us to handle less
patterns, because we know that some will be canonicalized away. This is
indeed very useful to e.g. know that constants are always on the right.
However, this is only useful if the canonicalization is actually
reliable. This is the case for constants, but not for arguments: Moving
these to the right makes it look like the "more complex" expression is
guaranteed to be on the left, but this is not actually the case in
practice. It fails as soon as you replace the argument with another
instruction.
The end result is that it looks like things correctly work in tests,
while they actually don't. We use the "thwart complexity-based
canonicalization" trick to handle this in tests, but it's often a
challenge for new contributors to get this right, and based on the
regressions this PR originally exposed, we clearly don't get this right
in many cases.
For this reason, I think that it's better to remove this complexity
canonicalization. It will make it much easier to write tests for
commuted cases and make sure that they are handled.
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Revision tags: llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8 |
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| #
96af1149 |
| 08-Jun-2024 |
csstormq <swust_xiaoqiangxu@163.com> |
[InstCombine] Preserve the nsw/nuw flags for (X | Op01C) + Op1C --> X + (Op01C + Op1C) (#94586)
This patch simplifies `sdiv` to `udiv` by preserving the `nsw` flag for
`(X | Op01C) + Op1C --> X + (
[InstCombine] Preserve the nsw/nuw flags for (X | Op01C) + Op1C --> X + (Op01C + Op1C) (#94586)
This patch simplifies `sdiv` to `udiv` by preserving the `nsw` flag for
`(X | Op01C) + Op1C --> X + (Op01C + Op1C)` if the sum of `Op01C` and
`Op1C` will not overflow, and preserves the `nuw` flag unconditionally.
Alive2 Proofs (provided by @nikic): https://alive2.llvm.org/ce/z/nrdCZT,
https://alive2.llvm.org/ce/z/YnJHnH
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Revision tags: llvmorg-18.1.7 |
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1b377dbe |
| 21-May-2024 |
Florian Hahn <flo@fhahn.com> |
[LAA] Check accesses don't overlap early to determine NoDep (#92307)
Use getStartAndEndForAccess to compute the start and end of both src
and sink (factored out to helper in bce3680f45b57f). If th
[LAA] Check accesses don't overlap early to determine NoDep (#92307)
Use getStartAndEndForAccess to compute the start and end of both src
and sink (factored out to helper in bce3680f45b57f). If they do not
overlap (i.e. SrcEnd <= SinkStart || SinkEnd <= SrcStart), there is no
dependence, regardless of stride.
PR: https://github.com/llvm/llvm-project/pull/92307
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Revision tags: llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5 |
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| #
3b823361 |
| 08-Nov-2023 |
dewen <923406109@qq.com> |
Revert "[PM] Execute IndVarSimplifyPass precede RessociatePass" (#71617)
Reverts llvm/llvm-project#71054
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e4d27d7f |
| 08-Nov-2023 |
dewen <923406109@qq.com> |
[PM] Execute IndVarSimplifyPass precede RessociatePass (#71054)
ReassociatePass may clear nsw/nuw flags of some instructions, which may
have side effects on optimizations in IndVarSimplifyPass.
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Revision tags: llvmorg-17.0.4 |
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| #
e39f6c18 |
| 25-Oct-2023 |
Alex Richardson <alexrichardson@google.com> |
[opt] Infer DataLayout from triple if not specified
There are many tests that specify a target triple/CPU flags but no DataLayout which can lead to IR being generated that has unusual behaviour. Thi
[opt] Infer DataLayout from triple if not specified
There are many tests that specify a target triple/CPU flags but no DataLayout which can lead to IR being generated that has unusual behaviour. This commit attempts to use the default DataLayout based on the relevant flags if there is no explicit override on the command line or in the IR file.
One thing that is not currently possible to differentiate from a missing datalayout `target datalayout = ""` in the IR file since the current APIs don't allow detecting this case. If it is considered useful to support this case (instead of passing "-data-layout=" on the command line), I can change IR parsers to track whether they have seen such a directive and change the callback type.
Differential Revision: https://reviews.llvm.org/D141060
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Revision tags: llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4 |
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| #
41895843 |
| 04-May-2023 |
Nikita Popov <npopov@redhat.com> |
[InstCombine] Only perform one iteration
InstCombine is a worklist-driven algorithm, which works roughly as follows:
* All instructions are initially pushed to the worklist. The initial order is
[InstCombine] Only perform one iteration
InstCombine is a worklist-driven algorithm, which works roughly as follows:
* All instructions are initially pushed to the worklist. The initial order is in RPO program order. * All newly inserted instructions get added to the worklist. * When an instruction is folded, its users get added back to the worklist. * When the use-count of an instruction decreases, it gets added back to the worklist. * And a few of other heuristics on when we should revisit instructions.
On top of the worklist algorithm, InstCombine layers an additional fix-point iteration: If any fold was performed in the previous iteration, then InstCombine will re-populate the worklist from scratch and fold the entire function again. This continues until a fix-point is reached.
In the vast majority of cases, InstCombine will reach a fix-point within a single iteration: However, a second iteration is performed to verify that this is indeed the fixpoint. We can see this in the statistics for llvm-test-suite:
"instcombine.NumOneIteration": 411380, "instcombine.NumTwoIterations": 117921, "instcombine.NumThreeIterations": 236, "instcombine.NumFourOrMoreIterations": 2,
The way to read these numbers is that in 411380 cases, InstCombine performs no folds. In 117921 cases it performs a fold and reaches the fix-point within one iteration (the second iteration verifies the fixpoint). In the remaining 238 cases, more than one iteration is needed to reach the fixpoint.
In other words, only in 0.04% of cases are additional iterations needed to reach a fixpoint. Conversely, in 22.3% of cases InstCombine performs a completely useless extra iteration to verify the fix point.
This patch removes the fixpoint iteration from InstCombine, and always only perform a single iteration. This results in a major compile-time improvement of around 4% at negligible codegen impact.
This explicitly does accept that we will not reach a fixpoint in all cases. However, this is mitigated by two factors: First, the data suggests that this happens very rarely in practice. Second, InstCombine runs many times during the optimization pipeline (8 times even without LTO), so there are many chances to recover such cases.
In order to prevent accidental optimization regressions in the future, this implements a verify-fixpoint option, which is enabled by default when instcombine is specified in -passes and disabled when InstCombinePass() is constructed from C++. This means that test cases need to explicitly use the no-verify-fixpoint option if they fail to reach a fixed point (for a well understand reason we cannot / do not want to avoid).
Differential Revision: https://reviews.llvm.org/D154579
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| #
bf977979 |
| 14-Jun-2023 |
Nikita Popov <npopov@redhat.com> |
[PhaseOrdering] Regenerate test checks (NFC)
Just naming changes.
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Revision tags: llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6 |
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| #
1c55cc60 |
| 26-Nov-2022 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
PhaseOrdering: Convert tests to opaque pointers
Required manually running update_test_checks: AArch64/hoisting-sinking-required-for-vectorization.ll AArch64/peel-multiple-unreachable-exits-for-v
PhaseOrdering: Convert tests to opaque pointers
Required manually running update_test_checks: AArch64/hoisting-sinking-required-for-vectorization.ll AArch64/peel-multiple-unreachable-exits-for-vectorization.ll ARM/arm_mult_q15.ll X86/hoist-load-of-baseptr.ll X86/spurious-peeling.ll
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Revision tags: llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3 |
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| #
d6327050 |
| 27-Apr-2022 |
David Green <david.green@arm.com> |
[AArch64] Use PerfectShuffle costs in AArch64TTIImpl::getShuffleCost
Given a shuffle with 4 elements size 16 or 32, we can use the costs directly from the PerfectShuffle tables to get a slightly mor
[AArch64] Use PerfectShuffle costs in AArch64TTIImpl::getShuffleCost
Given a shuffle with 4 elements size 16 or 32, we can use the costs directly from the PerfectShuffle tables to get a slightly more accurate cost for the resulting shuffle.
Differential Revision: https://reviews.llvm.org/D123409
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Revision tags: llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2 |
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| #
d9da6a53 |
| 12-Feb-2022 |
William S. Moses <gh@wsmoses.com> |
[LICM][PhaseOrder] Don't speculate in LICM until after running loop rotate
LICM will speculatively hoist code outside of loops. This requires removing information, like alias analysis (https://githu
[LICM][PhaseOrder] Don't speculate in LICM until after running loop rotate
LICM will speculatively hoist code outside of loops. This requires removing information, like alias analysis (https://github.com/llvm/llvm-project/issues/53794), range information (https://bugs.llvm.org/show_bug.cgi?id=50550), among others. Prior to https://reviews.llvm.org/D99249 , LICM would only be run after LoopRotate. Running Loop Rotate prior to LICM prevents a instruction hoist from being speculative, if it was conditionally executed by the iteration (as is commonly emitted by clang and other frontends). Adding the additional LICM pass first, however, forces all of these instructions to be considered speculative, even if they are not speculative after LoopRotate. This destroys information, resulting in performance losses for discarding this additional information.
This PR modifies LICM to accept a ``speculative'' parameter which allows LICM to be set to perform information-loss speculative hoists or not. Phase ordering is then modified to not perform the information-losing speculative hoists until after loop rotate is performed, preserving this additional information.
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D119965
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Revision tags: llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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| #
de2fed61 |
| 12-Nov-2021 |
Philip Reames <listmail@philipreames.com> |
[unroll] Keep unrolled iterations with initial iteration
The unrolling code was previously inserting new cloned blocks at the end of the function. The result of this with typical loop structures is
[unroll] Keep unrolled iterations with initial iteration
The unrolling code was previously inserting new cloned blocks at the end of the function. The result of this with typical loop structures is that the new iterations are placed far from the initial iteration.
With unrolling, the general assumption is that the a) the loop is reasonable hot, and b) the first Count-1 copies of the loop are rarely (if ever) loop exiting. As such, placing Count-1 copies out of line is a fairly poor code placement choice. We'd much rather fall through into the hot (non-exiting) path. For code with branch profiles, later layout would fix this, but this may have a positive impact on non-PGO compiled code.
However, the real motivation for this change isn't performance. Its readability and human understanding. Having to jump around long distances in an IR file to trace an unrolled loop structure is error prone and tedious.
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| #
4a1d63d7 |
| 15-Oct-2021 |
Florian Hahn <flo@fhahn.com> |
[VectorCombine] Add option to only run scalarization transforms.
This patch adds a pass option to only run transforms that scalarize vector operations and do not create new vector instructions.
Whe
[VectorCombine] Add option to only run scalarization transforms.
This patch adds a pass option to only run transforms that scalarize vector operations and do not create new vector instructions.
When running VectorCombine early in the pipeline introducing new vector operations can have negative effects, like blocking loop or SLP vectorization. To avoid regressions, restrict the early VectorCombine run (when using -enable-matrix) to only perform scalarization and not introduce new vector operations.
This is done as option to the pass directly, which is then set when adding the pass to the pipeline. This is done for the new pass manager only.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D111800
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| #
094faa5f |
| 14-Oct-2021 |
Florian Hahn <flo@fhahn.com> |
[VectorCombine] Add test showing issue when running VectorCombine early.
Running -vector-combine early can introduce new vector operations, blocking loop/SLP vectorization. The added test case could
[VectorCombine] Add test showing issue when running VectorCombine early.
Running -vector-combine early can introduce new vector operations, blocking loop/SLP vectorization. The added test case could be better optimized by the SLPVectorizer if no new vector operations are added early.
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4 |
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| #
a7c6471a |
| 22-Sep-2021 |
Florian Hahn <flo@fhahn.com> |
[Passes] Run vector-combine early with -fenable-matrix.
IR with matrix intrinsics is likely to also contain large vector operations, which can benefit from early simplifications.
This is the last s
[Passes] Run vector-combine early with -fenable-matrix.
IR with matrix intrinsics is likely to also contain large vector operations, which can benefit from early simplifications.
This is the last step in a series of changes to improve code-gen for code using matrix subscript operators with the C/C++ matrix extension in CLang, like
using matrix_t = double __attribute__((matrix_type(15, 15)));
void foo(unsigned i, matrix_t &A, matrix_t &B) { for (unsigned j = 0; j < 4; ++j) for (unsigned k = 0; k < i; k++) B[k][j] -= A[k][j] * B[i][j]; }
https://clang.godbolt.org/z/6dKxK1Ed7
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D102496
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| #
300870a9 |
| 22-Sep-2021 |
Florian Hahn <flo@fhahn.com> |
[VectorCombine] Switch to using a worklist.
This patch updates VectorCombine to use a worklist to allow iterative simplifications where a combine enables other combines.
Suggested in D100302.
The
[VectorCombine] Switch to using a worklist.
This patch updates VectorCombine to use a worklist to allow iterative simplifications where a combine enables other combines.
Suggested in D100302.
The main use case at the moment is foldSingleElementStore and scalarizeLoadExtract working together to improve scalarization.
Note that we now also do not run SimplifyInstructionsInBlock on the whole function if there have been changes. This means we fail to remove/simplify instructions not related to any of the vector combines. IMO this is fine, as simplifying the whole function seems more like a workaround for not tracking the changed instructions.
Compile-time impact looks neutral: NewPM-O3: +0.02% NewPM-ReleaseThinLTO: -0.00% NewPM-ReleaseLTO-g: -0.02%
http://llvm-compile-time-tracker.com/compare.php?from=52832cd917af00e2b9c6a9d1476ba79754dcabff&to=e66520a4637290550a945d528e3e59573485dd40&stat=instructions
Reviewed By: spatel, lebedev.ri
Differential Revision: https://reviews.llvm.org/D110171
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Revision tags: llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2 |
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| #
575e2aff |
| 25-May-2021 |
Florian Hahn <flo@fhahn.com> |
[VectorCombine] Use constant range info for index scalarization legality.
We can only scalarize memory accesses if we know the index is valid.
This patch adjusts canScalarizeAcceess to fall back to
[VectorCombine] Use constant range info for index scalarization legality.
We can only scalarize memory accesses if we know the index is valid.
This patch adjusts canScalarizeAcceess to fall back to computeConstantRange to check if the index is known to be valid.
Reviewed By: nlopes
Differential Revision: https://reviews.llvm.org/D102476
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Revision tags: llvmorg-12.0.1-rc1 |
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| #
9deef859 |
| 16-May-2021 |
Florian Hahn <flo@fhahn.com> |
[PhaseOrdering] Add test for insert/extract code for matrixes.
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