Changes in matrix-extract-insert.ll

d1e5e6735a845f1281f11389da1e5a55a0d2e87a - [PhaseOrdering] Update test RUN lines to use `-passes="default"` to allow evaluation by DOS batch scripts. NFC.

Tue, 31 Dec 2024 15:25:12 +0000

[PhaseOrdering] Update test RUN lines to use `-passes="default"` to allow evaluation by DOS batch scripts. NFC.`-passes='default'` isn't correctly parsed on DOS, so when update_test_checks.py runs a system call on the opt RUN line, it fails to evaluate properly - use `-passes="default"` instead. List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

4ad0fdd1631eeae432714c03ede01a10dc00025d - [VPlan] Remove reverse() of predecessors from VPInstruction::generate.

Tue, 17 Dec 2024 20:44:31 +0000

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.This was originally done to reduce the diff for the change. Remove itand update the remaining tests. NFC modulo reordering of incomingvalues.Clean up after https://github.com/llvm/llvm-project/pull/114292. List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

1157187496afbbb203b8ec7aa320769ec6eed8c4 - [VPlan] Propagate all GEP flags (#119899)

Tue, 17 Dec 2024 12:48:50 +0000

[VPlan] Propagate all GEP flags (#119899)Store GEPNoWrapFlags instead of only InBounds and propagate them. List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

462cb3cd6cecd0511ecaf0e3ebcaba455ece587d - [InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144)

Thu, 05 Dec 2024 13:36:40 +0000

[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144)If the gep is nusw (usually via inbounds) and the offset is non-negative, we can infer nuw. Proof: https://alive2.llvm.org/ce/z/ihztLy List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

38fffa630ee80163dc65e759392ad29798905679 - [LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

Wed, 06 Nov 2024 11:53:33 +0000

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548) List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

095d49da76be09143582e07a807c86d3b4334dec - [InstCombine] Set `samesign` when converting signed predicates into unsigned (#112642)

Thu, 17 Oct 2024 12:43:48 +0000

[InstCombine] Set `samesign` when converting signed predicates into unsigned (#112642)Alive2: https://alive2.llvm.org/ce/z/6cqdt- List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

a105877646d68e48cdeeeadd9d1e075dc3c5d68d - [InstCombine] Remove some of the complexity-based canonicalization (#91185)

Wed, 21 Aug 2024 10:02:54 +0000

[InstCombine] Remove some of the complexity-based canonicalization (#91185)The idea behind this canonicalization is that it allows us to handle less patterns, because we know that some will be canonicalized away. This is indeed very useful to e.g. know that constants are always on the right. However, this is only useful if the canonicalization is actually reliable. This is the case for constants, but not for arguments: Moving these to the right makes it look like the "more complex" expression is guaranteed to be on the left, but this is not actually the case in practice. It fails as soon as you replace the argument with another instruction. The end result is that it looks like things correctly work in tests, while they actually don't. We use the "thwart complexity-based canonicalization" trick to handle this in tests, but it's often a challenge for new contributors to get this right, and based on the regressions this PR originally exposed, we clearly don't get this right in many cases. For this reason, I think that it's better to remove this complexity canonicalization. It will make it much easier to write tests for commuted cases and make sure that they are handled. List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

96af11494158c38dafb64ffeaec3f371f37f0eb4 - [InstCombine] Preserve the nsw/nuw flags for (X | Op01C) + Op1C --> X + (Op01C + Op1C) (#94586)

Sat, 08 Jun 2024 00:38:27 +0000

[InstCombine] Preserve the nsw/nuw flags for (X | Op01C) + Op1C --> X + (Op01C + Op1C) (#94586)This patch simplifies `sdiv` to `udiv` by preserving the `nsw` flag for `(X | Op01C) + Op1C --> X + (Op01C + Op1C)` if the sum of `Op01C` and `Op1C` will not overflow, and preserves the `nuw` flag unconditionally. Alive2 Proofs (provided by @nikic): https://alive2.llvm.org/ce/z/nrdCZT, https://alive2.llvm.org/ce/z/YnJHnH List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

1b377dbeb73ef3abec246fe11fc98ec699625c0c - [LAA] Check accesses don't overlap early to determine NoDep (#92307)

Tue, 21 May 2024 10:00:11 +0000

[LAA] Check accesses don't overlap early to determine NoDep (#92307)Use getStartAndEndForAccess to compute the start and end of both src and sink (factored out to helper in bce3680f45b57f). If they do not overlap (i.e. SrcEnd <= SinkStart || SinkEnd <= SrcStart), there is no dependence, regardless of stride. PR: https://github.com/llvm/llvm-project/pull/92307 List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

3b82336188354b70acaf4bca1da246f36a38c78f - Revert "[PM] Execute IndVarSimplifyPass precede RessociatePass" (#71617)

Wed, 08 Nov 2023 01:22:55 +0000

Revert "[PM] Execute IndVarSimplifyPass precede RessociatePass" (#71617)Reverts llvm/llvm-project#71054 List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

e4d27d7f320e06333195aded11b080c52c1a3bfe - [PM] Execute IndVarSimplifyPass precede RessociatePass (#71054)

Wed, 08 Nov 2023 01:21:17 +0000

[PM] Execute IndVarSimplifyPass precede RessociatePass (#71054)ReassociatePass may clear nsw/nuw flags of some instructions, which may have side effects on optimizations in IndVarSimplifyPass. List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

e39f6c1844fab59c638d8059a6cf139adb42279a - [opt] Infer DataLayout from triple if not specified

Wed, 25 Oct 2023 22:12:01 +0000

[opt] Infer DataLayout from triple if not specifiedThere are many tests that specify a target triple/CPU flags but noDataLayout which can lead to IR being generated that has unusualbehaviour. This commit attempts to use the default DataLayout basedon the relevant flags if there is no explicit override on the commandline or in the IR file.One thing that is not currently possible to differentiate from a missingdatalayout `target datalayout = ""` in the IR file since the currentAPIs don't allow detecting this case. If it is considered useful tosupport this case (instead of passing "-data-layout=" on the commandline), I can change IR parsers to track whether they have seen such adirective and change the callback type.Differential Revision: https://reviews.llvm.org/D141060 List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

41895843b5915bb78e9d02aa711fa10f7174db43 - [InstCombine] Only perform one iteration

Thu, 04 May 2023 10:35:14 +0000

[InstCombine] Only perform one iterationInstCombine is a worklist-driven algorithm, which works roughlyas follows:* All instructions are initially pushed to the worklist. The initial order is in RPO program order.* All newly inserted instructions get added to the worklist.* When an instruction is folded, its users get added back to the worklist.* When the use-count of an instruction decreases, it gets added back to the worklist.* And a few of other heuristics on when we should revisit instructions.On top of the worklist algorithm, InstCombine layers an additionalfix-point iteration: If any fold was performed in the previousiteration, then InstCombine will re-populate the worklist fromscratch and fold the entire function again. This continues untila fix-point is reached.In the vast majority of cases, InstCombine will reach a fix-pointwithin a single iteration: However, a second iteration is performedto verify that this is indeed the fixpoint. We can see this in thestatistics for llvm-test-suite: "instcombine.NumOneIteration": 411380, "instcombine.NumTwoIterations": 117921, "instcombine.NumThreeIterations": 236, "instcombine.NumFourOrMoreIterations": 2,The way to read these numbers is that in 411380 cases, InstCombineperforms no folds. In 117921 cases it performs a fold and reachesthe fix-point within one iteration (the second iteration verifiesthe fixpoint). In the remaining 238 cases, more than one iterationis needed to reach the fixpoint.In other words, only in 0.04% of cases are additional iterationsneeded to reach a fixpoint. Conversely, in 22.3% of cases InstCombineperforms a completely useless extra iteration to verify the fix point.This patch removes the fixpoint iteration from InstCombine, and alwaysonly perform a single iteration. This results in a major compile-timeimprovement of around 4% at negligible codegen impact.This explicitly does accept that we will not reach a fixpoint in allcases. However, this is mitigated by two factors: First, the datasuggests that this happens very rarely in practice. Second,InstCombine runs many times during the optimization pipeline(8 times even without LTO), so there are many chances to recoversuch cases.In order to prevent accidental optimization regressions in thefuture, this implements a verify-fixpoint option, which is enabledby default when instcombine is specified in -passes and disabledwhen InstCombinePass() is constructed from C++. This means thattest cases need to explicitly use the no-verify-fixpoint optionif they fail to reach a fixed point (for a well understand reasonwe cannot / do not want to avoid).Differential Revision: https://reviews.llvm.org/D154579 List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

bf9779798b32276555c2a3ef6ffb7ce11e26dcaa - [PhaseOrdering] Regenerate test checks (NFC)

Wed, 14 Jun 2023 08:08:46 +0000

[PhaseOrdering] Regenerate test checks (NFC)Just naming changes. List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

1c55cc600e99a963233d6f467373c8f16a1b8826 - PhaseOrdering: Convert tests to opaque pointers

Sat, 26 Nov 2022 21:56:00 +0000

PhaseOrdering: Convert tests to opaque pointersRequired manually running update_test_checks: AArch64/hoisting-sinking-required-for-vectorization.ll AArch64/peel-multiple-unreachable-exits-for-vectorization.ll ARM/arm_mult_q15.ll X86/hoist-load-of-baseptr.ll X86/spurious-peeling.ll List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

d6327050e00f590fe47fb46fdb2399ef69814a31 - [AArch64] Use PerfectShuffle costs in AArch64TTIImpl::getShuffleCost

Wed, 27 Apr 2022 11:09:01 +0000

[AArch64] Use PerfectShuffle costs in AArch64TTIImpl::getShuffleCostGiven a shuffle with 4 elements size 16 or 32, we can use the costsdirectly from the PerfectShuffle tables to get a slightly more accuratecost for the resulting shuffle.Differential Revision: https://reviews.llvm.org/D123409 List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

d9da6a535f21946cfaac1516ef28ac7646211d56 - [LICM][PhaseOrder] Don't speculate in LICM until after running loop rotate

Sat, 12 Feb 2022 21:33:22 +0000

[LICM][PhaseOrder] Don't speculate in LICM until after running loop rotateLICM will speculatively hoist code outside of loops. This requires removing information, like alias analysis (https://github.com/llvm/llvm-project/issues/53794), range information (https://bugs.llvm.org/show_bug.cgi?id=50550), among others. Prior to https://reviews.llvm.org/D99249 , LICM would only be run after LoopRotate. Running Loop Rotate prior to LICM prevents a instruction hoist from being speculative, if it was conditionally executed by the iteration (as is commonly emitted by clang and other frontends). Adding the additional LICM pass first, however, forces all of these instructions to be considered speculative, even if they are not speculative after LoopRotate. This destroys information, resulting in performance losses for discarding this additional information.This PR modifies LICM to accept a ``speculative'' parameter which allows LICM to be set to perform information-loss speculative hoists or not. Phase ordering is then modified to not perform the information-losing speculative hoists until after loop rotate is performed, preserving this additional information.Reviewed By: lebedev.riDifferential Revision: https://reviews.llvm.org/D119965 List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

de2fed61528a5584dc54c47f6754408597be24de - [unroll] Keep unrolled iterations with initial iteration

Fri, 12 Nov 2021 19:35:28 +0000

[unroll] Keep unrolled iterations with initial iterationThe unrolling code was previously inserting new cloned blocks at the end of the function. The result of this with typical loop structures is that the new iterations are placed far from the initial iteration.With unrolling, the general assumption is that the a) the loop is reasonable hot, and b) the first Count-1 copies of the loop are rarely (if ever) loop exiting. As such, placing Count-1 copies out of line is a fairly poor code placement choice. We'd much rather fall through into the hot (non-exiting) path. For code with branch profiles, later layout would fix this, but this may have a positive impact on non-PGO compiled code.However, the real motivation for this change isn't performance. Its readability and human understanding. Having to jump around long distances in an IR file to trace an unrolled loop structure is error prone and tedious. List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

4a1d63d7d09ff63ccbcb8831972c00dfc9600998 - [VectorCombine] Add option to only run scalarization transforms.

Fri, 15 Oct 2021 18:27:23 +0000

[VectorCombine] Add option to only run scalarization transforms.This patch adds a pass option to only run transforms that scalarizevector operations and do not create new vector instructions.When running VectorCombine early in the pipeline introducing new vectoroperations can have negative effects, like blocking loop or SLPvectorization. To avoid regressions, restrict the early VectorCombinerun (when using -enable-matrix) to only perform scalarization and notintroduce new vector operations.This is done as option to the pass directly, which is then set whenadding the pass to the pipeline. This is done for the new pass manageronly.Reviewed By: spatelDifferential Revision: https://reviews.llvm.org/D111800 List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll

094faa5fcabd0a6eeec816e6449220a850b004f2 - [VectorCombine] Add test showing issue when running VectorCombine early.

Thu, 14 Oct 2021 10:54:04 +0000

[VectorCombine] Add test showing issue when running VectorCombine early.Running -vector-combine early can introduce new vector operations,blocking loop/SLP vectorization. The added test case could be betteroptimized by the SLPVectorizer if no new vector operations are addedearly. List of files: /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll