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Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3 |
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576d81ba |
| 20-Mar-2024 |
Craig Topper <craig.topper@sifive.com> |
[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)
Previously we used memory like we do to move between GPRs and FPR64 with
the D extension on RV32.
We
[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)
Previously we used memory like we do to move between GPRs and FPR64 with
the D extension on RV32.
We can instead use REG_SEQUENCE/EXTRACT_SUBREG to inform register
allocation how to do the copy without memory.
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Revision tags: llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4 |
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| #
116eb323 |
| 27-Oct-2023 |
Craig Topper <craig.topper@sifive.com> |
[RISCV] Correct copyPhysReg for GPRPF64. (#70419)
GPRF64 represents a pair of registers. We were only copying the even
part. We need to copy the odd part too.
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Revision tags: llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2 |
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048458f9 |
| 01-Aug-2023 |
Craig Topper <craig.topper@sifive.com> |
[RISCV] Add no NaN support to lowerFMAXIMUM_FMINIMUM.
Using the nonans FMF and the DAG.isKnownNeverNaN on the inputs.
Reviewed By: fakepaper56
Differential Revision: https://reviews.llvm.org/D1567
[RISCV] Add no NaN support to lowerFMAXIMUM_FMINIMUM.
Using the nonans FMF and the DAG.isKnownNeverNaN on the inputs.
Reviewed By: fakepaper56
Differential Revision: https://reviews.llvm.org/D156748
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Revision tags: llvmorg-17.0.0-rc1, llvmorg-18-init |
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| #
49429783 |
| 24-Jul-2023 |
Craig Topper <craig.topper@sifive.com> |
[RISCV] Add lowering for scalar fmaximum/fminimum.
Unlike fmaxnum and fminnum, these operations propagate nan and
consider -0.0 to be less than +0.0.
Without Zfa, we don't have a single instruction
[RISCV] Add lowering for scalar fmaximum/fminimum.
Unlike fmaxnum and fminnum, these operations propagate nan and
consider -0.0 to be less than +0.0.
Without Zfa, we don't have a single instruction for this. The
lowering I've used forces the other input to nan if one input
is a nan. If both inputs are nan, they get swapped. Then use
the fmax or fmin instruction.
New ISD nodes are needed because fmaxnum/fminnum to not define
the order of -0.0 and +0.0.
This lowering ensures the snans are quieted though that is probably not
required in default environment). Also ensures non-canonical nans
are canonicalized, though I'm also not sure that's needed.
Another option could be to use fmax/fmin and then overwrite the
result based on the inputs being nan, but I'm not sure we can do
that with any less code.
Future work will handle nonans FMF, and handling the case where
we can prove the input isn't nan.
This does fix the crash in #64022, but we need to do more work
to avoid scalarization.
Reviewed By: fakepaper56
Differential Revision: https://reviews.llvm.org/D156069
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