History log of /isa-l/raid/raid_multibinary.asm (Results 1 – 9 of 9)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v2.31.0
# 9f75defd 14-Jul-2022 Greg Tucker <greg.b.tucker@intel.com>

Remove all slver legacy segments

The relic slver is no longer used for individual versioning
on functions and is confusing tools looking for data in text
sections. This removes all instances instead

Remove all slver legacy segments

The relic slver is no longer used for individual versioning
on functions and is confusing tools looking for data in text
sections. This removes all instances instead of fixing since
its usefulness is waining. Fixes #221

Change-Id: Ife0b9f105950a90337c58e8a41ac2cffc0f67d99
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

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Revision tags: v2.30.0
# cd888f01 22-May-2020 H.J. Lu <hjl.tools@gmail.com>

x86: Add ENDBR32/ENDBR64 at function entries for Intel CET

To support Intel CET, all indirect branch targets must start with
ENDBR32/ENDBR64. Here is a patch to define endbranch and add it to
funct

x86: Add ENDBR32/ENDBR64 at function entries for Intel CET

To support Intel CET, all indirect branch targets must start with
ENDBR32/ENDBR64. Here is a patch to define endbranch and add it to
function entries in x86 assembly codes which are indirect branch
targets as discovered by running testsuite on Intel CET machine and
visual inspection.

Verified with

$ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux
$ make -j8
$ make -j8 check

with both nasm and yasm on both CET and non-CET machines.

Change-Id: I9822578e7294fb5043a64ab7de5c41de81a7d337
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>

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# ede04f0a 16-Mar-2020 Greg Tucker <greg.b.tucker@intel.com>

build: Fix for windows to allow nasm use

Previously windows build could only use yasm because some procedural items such
as proc_start were not supported by nasm. This adds a few macros and fixes s

build: Fix for windows to allow nasm use

Previously windows build could only use yasm because some procedural items such
as proc_start were not supported by nasm. This adds a few macros and fixes so
nasm can be used to build on windows.

Change-Id: Ia05dc3ff482f33b0f915bb1be3c7df5e4a753b3a
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

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Revision tags: v2.29.0, v2.28.0, v2.27.0, v2.26.0
# d3caab9c 07-Mar-2019 Roy Oursler <roy.j.oursler@intel.com>

build: Avoid requiring AVX512 define when using dispatch functions

Change-Id: I76af2d6ab7eb61ae531bbc7427650d08737c20ab
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>


Revision tags: v2.25.0
# 2e212f28 27-Nov-2018 Greg Tucker <greg.b.tucker@intel.com>

build: Fix for mac nasm lack of symbol types

Change-Id: I9ee86a3e32876d3860477c8365fc459d94a8920e
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>


Revision tags: v2.24.0, v2.23.0, v2.22.0, v2.21.0, v2.20.0
# 3ab82390 24-Jul-2017 Xiaodong Liu <xiaodong.liu@intel.com>

multibinary: move WRT_OPT macro to common header

Signed-off-by: Xiaodong Liu <xiaodong.liu@intel.com>


Revision tags: v2.19.0, v2.18.0
# 8f115538 24-Mar-2017 Greg Tucker <greg.b.tucker@intel.com>

raid: Add avx512 version of pq_gen

Change-Id: Ic404e7f3c09c953fe3687355cc3f9728cfd16011
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>


# 0a62b7c4 24-Mar-2017 Greg Tucker <greg.b.tucker@intel.com>

raid: Add avx512 version of xor

Change-Id: I8f8e79f3442ef76268f60a8e61d2c36aedb1ccc1
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>


Revision tags: v2.17.0, v2.16.0
# d6c5e962 26-Apr-2016 Greg Tucker <greg.b.tucker@intel.com>

Add raid unit

New raid unit adds source for optimized xor and P+Q functions.

Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>