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/llvm-project/clang/test/Driver/
H A D	riscv-profiles.c	`3 // RVI20U32: "-target-feature" "-a" 4 // RVI20U32: "-target-feature" "-c" 5 // RVI20U32: "-target-feature" "-d" 6 // RVI20U32: "-target-feature" "-f" 7 // RVI20U32: "-target-feature" "-m" 11 // RVI20U64: "-target-feature" "-a" 12 // RVI20U64: "-target-feature" "-c" 13 // RVI20U64: "-target-feature" "-d" 14 // RVI20U64: "-target-feature" "-f" 15 // RVI20U64: "-target-feature" " [all...]`
H A D	csky-arch.c	5 // CHECK-CK801: "-target-feature" "+elrw" "-target-feature" "+trust" 6 // CHECK-CK801: "-target-feature" "+e1" 12 // CHECK-CK802: "-target-feature" "+elrw" "-target-feature" "+trust" 13 // CHECK-CK802: "-target-feature" "+nvic" "-target-feature" "+e1" 14 // CHECK-CK802: "-target-feature" "+e2" 20 // CHECK-CK803: "-target-feature" "+hwdiv" "-target-feature" "+elrw" 21 // CHECK-CK803: "-target-feature" "+trust" "-target-feature" "+nvic" 22 // CHECK-CK803: "-target-feature" "+e1" "-target-feature" "+e2" "-target-feature" "+2e3" 23 // CHECK-CK803: "-target-feature" "+mp" 29 // CHECK-CK803S: "-target-feature" "+hwdiv" "-target-feature" "+elrw" [all …]
H A D	riscv-cpus.c	`5 // MCPU-ROCKET32: "-target-feature" "+zicsr" "-target-feature" "+zifencei" 9 // MCPU-ROCKET64: "-target-feature" "+zicsr" "-target-feature" "+zifencei" 13 // MCPU-SYNTACORE-SCR1-BASE: "-target-feature" "+c" 14 // MCPU-SYNTACORE-SCR1-BASE: "-target-feature" "+zicsr" "-target-feature" "+zifencei" 19 // MCPU-SYNTACORE-SCR1-MAX: "-target-feature" "+m" "-target-feature" "+c" 20 // MCPU-SYNTACORE-SCR1-MAX: "-target-feature" " [all...]`
H A D	arm-mfpu.c	1 // Test that different values of -mfpu pick correct ARM FPU target-feature(s). 5 // CHECK-DEFAULT-NOT: "-target-feature" "+soft-float" 6 // CHECK-DEFAULT-DAG: "-target-feature" "+soft-float-abi" 7 // CHECK-DEFAULT-NOT: "-target-feature" "+vfp2" 8 // CHECK-DEFAULT-NOT: "-target-feature" "+vfp3" 9 // CHECK-DEFAULT-NOT: "-target-feature" "+neon" 25 // CHECK-VFP-NOT: "-target-feature" "+soft-float" 26 // CHECK-VFP-DAG: "-target-feature" "+soft-float-abi" 27 // CHECK-VFP-DAG: "-target-feature" "+vfp2" 28 // CHECK-VFP-DAG: "-target-feature" " [all...]
H A D	csky-mfpu.c	1 // Test that different values of -mfpu pick correct CSKY FPU target-feature(s). 5 // CHECK-DEFAULT-NOT: "-target-feature" "+hard-float" 6 // CHECK-DEFAULT-NOT: "-target-feature" "+hard-float-abi" 7 // CHECK-DEFAULT-NOT: "-target-feature" "+fpuv2_sf" 8 // CHECK-DEFAULT-NOT: "-target-feature" "+fpuv2_df" 12 // CHECK-FPV2-NOT: "-target-feature" "+hard-float" 13 // CHECK-FPV2-NOT: "-target-feature" "+hard-float-abi" 14 // CHECK-FPV2: "-target-feature" "+fpuv2_sf" 15 // CHECK-FPV2: "-target-feature" "+fpuv2_df" 19 // CHECK-FPV2-HARD: "-target-feature" "+hard-float-abi" [all …]
H A D	x86-target-features.c	`6 // X87: "-target-feature" "+x87" 7 // NO-X87: "-target-feature" "-x87" 14 // MMX: "-target-feature" "+mmx" 17 // NO-MMX: "-target-feature" "-mmx" 21 // SSE: "-target-feature" "+sse" "-target-feature" "+sse2" "-target-feature" "+sse3" "-target-feature" "+ssse3" "-target-feature" "+sse4a" "-target-feature" " [all...]`
H A D	aarch64-implied-sve-features.c	`2 // SVE-ONLY: "-target-feature" "+sve" 8 // SVE-REVERT-NOT: "-target-feature" "+sve" 9 // SVE-REVERT: "-target-feature" "-sve" 12 // SVE2-IMPLY: "-target-feature" "+sve" "-target-feature" "+sve2" 15 // SVE2-REVERT: "-target-feature" "+sve"{{.*}} "-target-feature" "-sve2" 18 // SVE2-CONFLICT: "-target-feature" "-sve" "-target-feature" "-sve2" 21 // SVE2-CONFLICT-REV: "-target-feature" " [all...]`
H A D	aarch64-implied-sme-features.c	`2 // SME-IMPLY: "-target-feature" "+bf16"{{.}} "-target-feature" "+sme" 5 // NOSME-NOT: "-target-feature" "{{\+\|-}}sme" 8 // SME-REVERT-NOT: "-target-feature" "+sme" 9 // SME-REVERT: "-target-feature" "+bf16"{{.}} "-target-feature" "-sme" 12 // SME-CONFLICT-NOT: "-target-feature" "+sme" 13 // SME-CONFLICT-NOT: "-target-feature" "+bf16" 14 // SME-CONFLICT: "-target-feature" "-bf16"{{.*}} "-target-feature" " [all...]`
/llvm-project/clang/include/clang/Basic/
H A D	Features.def	10 // via __has_extension. Users of this file must either define the FEATURE or 17 // The Predicate field dictates the conditions under which the feature or 20 // FEATURE(...) should be used to advertise support for standard language 27 #if !defined(FEATURE) && !defined(EXTENSION) 28 # error Define either the FEATURE or EXTENSION macro to handle features 31 #ifndef FEATURE 32 #define FEATURE(Name, Predicate) 39 FEATURE(speculative_load_hardening, LangOpts.SpeculativeLoadHardening) 40 FEATURE(address_sanitizer, 43 FEATURE(leak_sanitize [all...]
/llvm-project/clang/test/Sema/aarch64-sve2-intrinsics/
H A D	acle_sve2.cpp	3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -verify -verify-ignore-unexpected=error,note -emit-llvm -o - %s 4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -verify=overload -verify-ignore-unexpected=error,note -emit-llvm -o - %s 40 // expected-error@+2 {{'svhistseg_s8' needs target feature sve,sve2}} in test() 41 // overload-error@+1 {{'svhistseg' needs target feature sve,sve2}} in test() 43 // expected-error@+2 {{'svqrdmulh_s8' needs target feature (sve,sve2)\|sme}} in test() 44 // overload-error@+1 {{'svqrdmulh' needs target feature (sve,sve2)\|sme}} in test() 46 // expected-error@+2 {{'svqrdmulh_n_s8' needs target feature (sve,sve2)\|sme}} in test() 47 // overload-error@+1 {{'svqrdmulh' needs target feature (sve,sve2)\|sme}} in test() 49 // expected-error@+2 {{'svqdmulh_s8' needs target feature (sve,sve2)\|sme}} in test() 50 // overload-error@+1 {{'svqdmulh' needs target feature (sv in test() [all...]
H A D	acle_sve2_aes_bitperm_sha3_sm4.cpp	3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -verify -verify-ignore-unexpected=error,note -emit-llvm -o - %s 4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -verify=overload -verify-ignore-unexpected=error,note -emit-llvm -o - %s 17 // expected-error@+2 {{'svaesd_u8' needs target feature sve,sve2,sve-aes}} in test() 18 // overload-error@+1 {{'svaesd' needs target feature sve,sve2,sve-aes}} in test() 20 // expected-error@+2 {{'svaese_u8' needs target feature sve,sve2,sve-aes}} in test() 21 // overload-error@+1 {{'svaese' needs target feature sve,sve2,sve-aes}} in test() 23 // expected-error@+2 {{'svaesimc_u8' needs target feature sve,sve2,sve-aes}} in test() 24 // overload-error@+1 {{'svaesimc' needs target feature sv in test() [all...]
/llvm-project/clang-tools-extra/clangd/quality/model/
H A D	forest.json	`4 "feature": "Scope", string 10 "feature": "ContextKind", string 19 "feature": "TypeMatchesPreferred", string 27 "feature": "IsImplementationDetail", string 35 "feature": "NumNameInContext", string 39 "feature": "FractionNameInContext", string 64 "feature": "NumReferences", string 68 "feature": "SemaSaysInScope", string 76 "feature": "FileProximityDistanceCost", string 80 "feature": "HadContextType", string [all …]`
/llvm-project/llvm/test/MC/Mips/
H A D	target-soft-float.s	12 # 64: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled 14 # 64: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled 17 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled 19 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled 21 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled 23 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled 25 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled 27 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled 29 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled 31 # R2: :[[@LINE-1]]:3: error: instruction requires a CPU feature no [all...]
/llvm-project/llvm/test/MC/Mips/mips32r2/
H A D	invalid-dspr2.s	8 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 9 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 10 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 11 …$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 12 …$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 13 …at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 14 …$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 15 …$s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 16 …$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 17 …$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… [all …]
H A D	invalid-dsp.s	8 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 9 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 10 …,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 11 …,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 12 …$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 13 …,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 14 …,$v1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 15 …,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 16 …,$s7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 17 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… [all …]
H A D	invalid-msa.s	8 …5,$w29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 9 …,$w28 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 10 …1,$w21 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 11 …,$w0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 12 …7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 13 …8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 14 …9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 15 …7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 16 …5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… 17 …2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently ena… [all …]
/llvm-project/clang/test/Modules/
H A D	target-features.m	37 // X86_32: module 'TargetFeatures.arm' requires feature 'arm' 38 // X86_64: module 'TargetFeatures.arm' requires feature 'arm' 43 // AARCH64: module 'TargetFeatures.arm.aarch32' requires feature 'aarch32' 44 // X86_32: module 'TargetFeatures.arm.aarch32' requires feature 45 // X86_64: module 'TargetFeatures.arm.aarch32' requires feature 46 // RISCV32: module 'TargetFeatures.arm.aarch32' requires feature 47 // RISCV64: module 'TargetFeatures.arm.aarch32' requires feature 51 // AARCH32: module 'TargetFeatures.arm.aarch64' requires feature 'aarch64' 53 // X86_32: module 'TargetFeatures.arm.aarch64' requires feature 54 // X86_64: module 'TargetFeatures.arm.aarch64' requires feature [all …]
/llvm-project/llvm/test/MC/Mips/mips1/
H A D	invalid-mips5.s	8 add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 11 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 12 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 13 ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 14 ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 15 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 16 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 17 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 18 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 19 cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no [all...]
H A D	invalid-mips4.s	10 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 11 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 12 ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 13 ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 14 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 15 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 16 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 17 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 18 dadd $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 19 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no [all...]
H A D	invalid-mips3.s	8 dmult $s7,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 9 dsub $a3,$s6,$8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 10 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 11 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 12 ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 13 ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 14 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 15 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 16 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 17 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no [all...]
/llvm-project/clang/test/CodeGenOpenCL/
H A D	builtins-amdgcn-gfx12-err.cl	38 …cn_ds_gws_init(a, b); // expected-error {{'__builtin_amdgcn_ds_gws_init' needs target feature gws}} 39 …gws_barrier(a, b); // expected-error {{'__builtin_amdgcn_ds_gws_barrier' needs target feature gws}} 40 …n_ds_gws_sema_v(a); // expected-error {{'__builtin_amdgcn_ds_gws_sema_v' needs target feature gws}} 41 …gws_sema_br(a, b); // expected-error {{'__builtin_amdgcn_ds_gws_sema_br' needs target feature gws}} 42 …n_ds_gws_sema_p(a); // expected-error {{'__builtin_amdgcn_ds_gws_sema_p' needs target feature gws}} 44 … 0, 0); // expected-error {{'__builtin_amdgcn_mfma_f32_32x32x1f32' needs target feature mai-insts}} 45 … 0, 0); // expected-error {{'__builtin_amdgcn_mfma_f32_16x16x1f32' needs target feature mai-insts}} 46 …0, 0, 0); // expected-error {{'__builtin_amdgcn_mfma_f32_4x4x1f32' needs target feature mai-insts}} 47 … 0, 0); // expected-error {{'__builtin_amdgcn_mfma_f32_32x32x2f32' needs target feature mai-insts}} 48 … 0, 0); // expected-error {{'__builtin_amdgcn_mfma_f32_16x16x4f32' needs target feature mai-insts}} [all …]
/llvm-project/llvm/test/MC/Mips/mips2/
H A D	invalid-mips4.s	10 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 11 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 12 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 13 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 14 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 15 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 16 dadd $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 17 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 18 daddiu $k0,$s6,-4586 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 19 daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no [all...]
/llvm-project/clang/test/Preprocessor/
H A D	aarch64-target-features.c	`155 // CHECK-GENERIC: "-cc1"{{.}} "-triple" "aarch64{{.}}" "-target-feature" "+neon" 319 // CHECK-MTUNE-CYCLONE: "-cc1"{{.}} "-triple" "aarch64{{.}}" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8a" 345 // CHECK-MCPU-APPLE-A7: "-cc1"{{.}} "-triple" "aarch64{{.}}" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8a" "-target-feature" "+aes" "-target-feature" "+fp-armv8" "-target-feature" " [all...]`
/llvm-project/flang/test/Driver/
H A D	target-cpu-features.f90	`49 ! CHECK-A57-SAME: "-target-feature" "+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+perfmon" "-target-feature" "+sha2 53 ! CHECK-A76-SAME: "-target-feature" "+v8.2a" "-target-feature" "+aes" "-target-feature" " [all...]`
/llvm-project/clang/test/Sema/aarch64-sve-intrinsics/
H A D	acle_sve_bfloat.cpp	3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -verify -verify-ignore-unexp… 9 // expected-error@+1 {{'svcreate2_bf16' needs target feature (sve,bf16)\|(sme,bf16)}} in test_bfloat() 11 // expected-error@+1 {{'svcreate3_bf16' needs target feature (sve,bf16)\|(sme,bf16)}} in test_bfloat() 13 // expected-error@+1 {{'svcreate4_bf16' needs target feature (sve,bf16)\|(sme,bf16)}} in test_bfloat() 15 // expected-error@+1 {{'svget2_bf16' needs target feature (sve,bf16)\|(sme,bf16)}} in test_bfloat() 17 // expected-error@+1 {{'svget3_bf16' needs target feature (sve,bf16)\|(sme,bf16)}} in test_bfloat() 19 // expected-error@+1 {{'svget4_bf16' needs target feature (sve,bf16)\|(sme,bf16)}} in test_bfloat() 21 // expected-error@+1 {{'svld1_bf16' needs target feature (sve,bf16)\|(sme,bf16)}} in test_bfloat() 23 // expected-error@+1 {{'svld1_vnum_bf16' needs target feature (sve,bf16)\|(sme,bf16)}} in test_bfloat() 25 // expected-error@+1 {{'svld1rq_bf16' needs target feature (sve,bf16)\|(sme,bf16)}} in test_bfloat() [all …]

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