| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
| H A D | amdgpu_dc_debug.c | 153 plane_state->tiling_info.gfx8.tile_split, in pre_surface_trace()
245 update->plane_info->tiling_info.gfx8.tile_split, in update_surface_trace()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/ |
| H A D | radeon_evergreen_cs.c | 1212 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1216 &tile_split); in evergreen_cs_handle_reg()
1218 ib[idx] |= DB_TILE_SPLIT(tile_split) | in evergreen_cs_handle_reg()
1476 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1480 &tile_split); in evergreen_cs_handle_reg()
1482 ib[idx] |= CB_TILE_SPLIT(tile_split) | in evergreen_cs_handle_reg()
1504 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1508 &tile_split); in evergreen_cs_handle_reg()
1510 ib[idx] |= CB_TILE_SPLIT(tile_split) | in evergreen_cs_handle_reg()
2393 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_packet3_check() local
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| H A D | radeon_atombios_crtc.c | 1161 unsigned bankw, bankh, mtaspect, tile_split; in dce4_crtc_do_set_base() local
1283 evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); in dce4_crtc_do_set_base()
1293 tile_split_bytes = 64 << tile_split; in dce4_crtc_do_set_base()
1303 tile_split); in dce4_crtc_do_set_base()
1348 fb_format |= EVERGREEN_GRPH_TILE_SPLIT(tile_split); in dce4_crtc_do_set_base()
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| H A D | radeon_evergreen.c | 1121 unsigned *tile_split) in evergreen_tiling_fields() argument
1126 …*tile_split = (tiling_flags >> RADEON_TILING_EG_TILE_SPLIT_SHIFT) & RADEON_TILING_EG_TILE_SPLIT_MA… in evergreen_tiling_fields()
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| H A D | radeon.h | 370 unsigned *tile_split);
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
| H A D | dc_hw_types.h | 319 enum tile_split_values tile_split; member
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| H A D | amdgpu_dce_mem_input.c | 383 GRPH_TILE_SPLIT, info->gfx8.tile_split, in program_tiling()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| H A D | amdgpu_dce110_mem_input_v.c | 189 set_reg_field_value(value, info->gfx8.tile_split, in program_tiling()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_dce_v8_0.c | 1915 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v8_0_crtc_do_set_base() local
1920 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v8_0_crtc_do_set_base()
1925 fb_format |= (tile_split << GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT); in dce_v8_0_crtc_do_set_base()
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| H A D | amdgpu_dce_v6_0.c | 1943 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v6_0_crtc_do_set_base() local
1948 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v6_0_crtc_do_set_base()
1953 fb_format |= GRPH_TILE_SPLIT(tile_split); in dce_v6_0_crtc_do_set_base()
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| H A D | amdgpu_dce_v10_0.c | 1994 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v10_0_crtc_do_set_base() local
1999 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v10_0_crtc_do_set_base()
2006 tile_split); in dce_v10_0_crtc_do_set_base()
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| H A D | amdgpu_dce_v11_0.c | 2036 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v11_0_crtc_do_set_base() local
2041 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v11_0_crtc_do_set_base()
2048 tile_split); in dce_v11_0_crtc_do_set_base()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm.c | 3263 unsigned int bankw, bankh, mtaspect, tile_split, num_banks; in fill_plane_buffer_attributes() local
3268 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in fill_plane_buffer_attributes()
3275 tiling_info->gfx8.tile_split = tile_split; in fill_plane_buffer_attributes()
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