Searched refs:pll_in_use (Results 1 – 6 of 6) sorted by relevance
1748 u32 pll_in_use = 0; in radeon_get_pll_use_mask() local1756 pll_in_use |= (1 << test_radeon_crtc->pll_id); in radeon_get_pll_use_mask()1758 return pll_in_use; in radeon_get_pll_use_mask()1890 u32 pll_in_use; in radeon_atom_pick_pll() local1914 pll_in_use = radeon_get_pll_use_mask(crtc); in radeon_atom_pick_pll()1915 if (!(pll_in_use & (1 << ATOM_PPLL2))) in radeon_atom_pick_pll()1917 if (!(pll_in_use & (1 << ATOM_PPLL1))) in radeon_atom_pick_pll()1923 pll_in_use = radeon_get_pll_use_mask(crtc); in radeon_atom_pick_pll()1924 if (!(pll_in_use & (1 << ATOM_PPLL2))) in radeon_atom_pick_pll()1926 if (!(pll_in_use & (1 << ATOM_PPLL1))) in radeon_atom_pick_pll()[all …]
272 u32 pll_in_use = 0; in amdgpu_pll_get_use_mask() local280 pll_in_use |= (1 << test_amdgpu_crtc->pll_id); in amdgpu_pll_get_use_mask()282 return pll_in_use; in amdgpu_pll_get_use_mask()
2149 u32 pll_in_use; in dce_v8_0_pick_pll() local2172 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v8_0_pick_pll()2173 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v8_0_pick_pll()2175 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v8_0_pick_pll()2181 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v8_0_pick_pll()2182 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v8_0_pick_pll()2184 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v8_0_pick_pll()2186 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v8_0_pick_pll()
2292 u32 pll_in_use; in dce_v11_0_pick_pll() local2349 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v11_0_pick_pll()2351 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v11_0_pick_pll()2353 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v11_0_pick_pll()2358 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v11_0_pick_pll()2360 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v11_0_pick_pll()2362 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v11_0_pick_pll()
2259 u32 pll_in_use; in dce_v10_0_pick_pll() local2280 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v10_0_pick_pll()2281 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v10_0_pick_pll()2283 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v10_0_pick_pll()2285 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v10_0_pick_pll()
2157 u32 pll_in_use; in dce_v6_0_pick_pll() local2174 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v6_0_pick_pll()2175 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v6_0_pick_pll()2177 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v6_0_pick_pll()