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Searched refs:mtaspect (Results 1 – 10 of 10) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_evergreen_cs.c1212 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1215 &bankw, &bankh, &mtaspect, in evergreen_cs_handle_reg()
1221 DB_MACRO_TILE_ASPECT(mtaspect); in evergreen_cs_handle_reg()
1476 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1479 &bankw, &bankh, &mtaspect, in evergreen_cs_handle_reg()
1485 CB_MACRO_TILE_ASPECT(mtaspect); in evergreen_cs_handle_reg()
1504 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1507 &bankw, &bankh, &mtaspect, in evergreen_cs_handle_reg()
1513 CB_MACRO_TILE_ASPECT(mtaspect); in evergreen_cs_handle_reg()
2393 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_packet3_check() local
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H A Dradeon_object.c697 unsigned bankw, bankh, mtaspect, tilesplit, stilesplit; in radeon_bo_set_tiling_flags() local
701 …mtaspect = (tiling_flags >> RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT) & RADEON_TILING_EG_MACRO_TIL… in radeon_bo_set_tiling_flags()
724 switch (mtaspect) { in radeon_bo_set_tiling_flags()
H A Dradeon_evergreen.c1120 unsigned *bankh, unsigned *mtaspect, in evergreen_tiling_fields() argument
1125 …*mtaspect = (tiling_flags >> RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT) & RADEON_TILING_EG_MACRO_TI… in evergreen_tiling_fields()
1141 switch (*mtaspect) { in evergreen_tiling_fields()
1143 case 1: *mtaspect = EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_1; break; in evergreen_tiling_fields()
1144 case 2: *mtaspect = EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_2; break; in evergreen_tiling_fields()
1145 case 4: *mtaspect = EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_4; break; in evergreen_tiling_fields()
1146 case 8: *mtaspect = EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_8; break; in evergreen_tiling_fields()
H A Dradeon_atombios_crtc.c1161 unsigned bankw, bankh, mtaspect, tile_split; in dce4_crtc_do_set_base() local
1283 evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); in dce4_crtc_do_set_base()
1351 fb_format |= EVERGREEN_GRPH_MACRO_TILE_ASPECT(mtaspect); in dce4_crtc_do_set_base()
H A Dradeon.h369 unsigned *bankh, unsigned *mtaspect,
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_dce_v8_0.c1915 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v8_0_crtc_do_set_base() local
1919 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v8_0_crtc_do_set_base()
1928 fb_format |= (mtaspect << GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT); in dce_v8_0_crtc_do_set_base()
H A Damdgpu_dce_v6_0.c1943 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v6_0_crtc_do_set_base() local
1947 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v6_0_crtc_do_set_base()
1956 fb_format |= GRPH_MACRO_TILE_ASPECT(mtaspect); in dce_v6_0_crtc_do_set_base()
H A Damdgpu_dce_v10_0.c1994 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v10_0_crtc_do_set_base() local
1998 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v10_0_crtc_do_set_base()
2010 mtaspect); in dce_v10_0_crtc_do_set_base()
H A Damdgpu_dce_v11_0.c2036 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v11_0_crtc_do_set_base() local
2040 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v11_0_crtc_do_set_base()
2052 mtaspect); in dce_v11_0_crtc_do_set_base()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c3263 unsigned int bankw, bankh, mtaspect, tile_split, num_banks; in fill_plane_buffer_attributes() local
3267 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in fill_plane_buffer_attributes()
3278 tiling_info->gfx8.tile_aspect = mtaspect; in fill_plane_buffer_attributes()