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Searched refs:gtt (Results 1 – 25 of 27) sorted by relevance

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/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_ttm.c519 struct radeon_ttm_tt *gtt = (void *)ttm; in radeon_ttm_tt_pin_userptr() local
525 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); in radeon_ttm_tt_pin_userptr()
532 if (curproc->p_vmspace != gtt->usermm) in radeon_ttm_tt_pin_userptr()
535 if (current->mm != gtt->usermm) in radeon_ttm_tt_pin_userptr()
539 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) { in radeon_ttm_tt_pin_userptr()
542 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE; in radeon_ttm_tt_pin_userptr()
548 vm_map_lock_read(&gtt->usermm->vm_map); in radeon_ttm_tt_pin_userptr()
549 ok = uvm_map_lookup_entry(&gtt->usermm->vm_map, in radeon_ttm_tt_pin_userptr()
550 (vaddr_t)gtt->userptr, &entry); in radeon_ttm_tt_pin_userptr()
553 vm_map_unlock_read(&gtt->usermm->vm_map); in radeon_ttm_tt_pin_userptr()
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H A Dradeon_rs400.c243 u32 *gtt = rdev->gart.ptr; in rs400_gart_set_page() local
244 gtt[i] = cpu_to_le32(lower_32_bits(entry)); in rs400_gart_set_page()
H A Dradeon_r100.c706 u32 *gtt = rdev->gart.ptr; in r100_pci_gart_set_page() local
707 gtt[i] = cpu_to_le32(lower_32_bits(entry)); in r100_pci_gart_set_page()
H A Dradeon.h473 struct dentry *gtt; member
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gvt/
H A Dgtt.c558 struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in _ppgtt_get_root_entry()
585 struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in _ppgtt_set_root_entry()
607 struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in ggtt_get_guest_entry()
619 struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in ggtt_set_guest_entry()
630 struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in ggtt_get_host_entry()
640 struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in ggtt_set_host_entry()
657 struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; in ppgtt_spt_get_entry()
686 struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; in ppgtt_spt_set_entry()
749 radix_tree_delete(&spt->vgpu->gtt.spt_tree, spt->shadow_page.mfn); in ppgtt_free_spt()
770 radix_tree_for_each_slot(slot, &vgpu->gtt.spt_tree, &iter, 0) { in ppgtt_free_all_spt()
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H A Dfb_decoder.c256 plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); in intel_vgpu_decode_primary_plane()
379 plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); in intel_vgpu_decode_cursor_plane()
483 plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); in intel_vgpu_decode_sprite_plane()
H A DMakefile4 interrupt.o gtt.o cfg_space.o opregion.o mmio.o display.o edid.o \
H A Dgvt.h192 struct intel_vgpu_gtt gtt; member
320 struct intel_gvt_gtt gtt; member
H A Dmmio.c87 pt = vgpu->gtt.ggtt_mm->ggtt_mm.virtual_ggtt + offset; in failsafe_emulate_mmio_rw()
H A Dscheduler.c195 context_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, in populate_shadow_context()
832 context_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, in update_guest_context()
1473 ring_context_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, in intel_vgpu_create_workload()
H A Dcmd_parser.c1750 s->vgpu->gtt.ggtt_mm : s->workload->shadow_mm; in find_bb_size()
1833 s->vgpu->gtt.ggtt_mm : s->workload->shadow_mm; in perform_bb_shadow()
2897 ret = copy_gma_to_hva(vgpu, vgpu->gtt.ggtt_mm, in shadow_workload_ring_buffer()
2908 ret = copy_gma_to_hva(vgpu, vgpu->gtt.ggtt_mm, gma_head, gma_tail, in shadow_workload_ring_buffer()
2971 workload->vgpu->gtt.ggtt_mm, in shadow_indirect_ctx()
H A Dexeclist.c168 hwsp_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, in emulate_csb_update()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_ttm.c830 struct amdgpu_ttm_tt *gtt = (void *)ttm; in amdgpu_ttm_tt_get_user_pages() local
831 unsigned long start = gtt->userptr; in amdgpu_ttm_tt_get_user_pages()
846 if (WARN_ON(gtt->range)) in amdgpu_ttm_tt_get_user_pages()
880 if (unlikely((gtt->userflags & AMDGPU_GEM_USERPTR_ANONONLY) && in amdgpu_ttm_tt_get_user_pages()
916 gtt->range = range; in amdgpu_ttm_tt_get_user_pages()
940 struct amdgpu_ttm_tt *gtt = (void *)ttm; in amdgpu_ttm_tt_get_user_pages_done() local
943 if (!gtt || !gtt->userptr) in amdgpu_ttm_tt_get_user_pages_done()
947 gtt->userptr, ttm->num_pages); in amdgpu_ttm_tt_get_user_pages_done()
949 WARN_ONCE(!gtt->range || !gtt->range->pfns, in amdgpu_ttm_tt_get_user_pages_done()
952 if (gtt->range) { in amdgpu_ttm_tt_get_user_pages_done()
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H A Damdgpu_kms.c642 mem.gtt.total_heap_size = adev->mman.bdev.man[TTM_PL_TT].size; in amdgpu_info_ioctl()
643 mem.gtt.total_heap_size *= PAGE_SIZE; in amdgpu_info_ioctl()
644 mem.gtt.usable_heap_size = mem.gtt.total_heap_size - in amdgpu_info_ioctl()
646 mem.gtt.heap_usage = in amdgpu_info_ioctl()
648 mem.gtt.max_allocation = mem.gtt.usable_heap_size * 3 / 4; in amdgpu_info_ioctl()
/netbsd-src/sys/external/bsd/drm2/dist/drm/qxl/
H A Dqxl_ttm.c168 struct qxl_ttm_tt *gtt = (void *)ttm; in qxl_ttm_backend_bind() local
170 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); in qxl_ttm_backend_bind()
187 struct qxl_ttm_tt *gtt = (void *)ttm; in qxl_ttm_backend_destroy() local
189 ttm_tt_fini(&gtt->ttm); in qxl_ttm_backend_destroy()
190 kfree(gtt); in qxl_ttm_backend_destroy()
203 struct qxl_ttm_tt *gtt; in qxl_ttm_tt_create() local
206 gtt = kzalloc(sizeof(struct qxl_ttm_tt), GFP_KERNEL); in qxl_ttm_tt_create()
207 if (gtt == NULL) in qxl_ttm_tt_create()
209 gtt->ttm.func = &qxl_backend_func; in qxl_ttm_tt_create()
210 gtt->qdev = qdev; in qxl_ttm_tt_create()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gem/selftests/
H A Dhuge_pages.c355 if (!HAS_PAGE_SIZES(i915, vma->page_sizes.gtt)) { in igt_check_page_sizes()
357 vma->page_sizes.gtt & ~supported, supported); in igt_check_page_sizes()
373 if (obj->mm.page_sizes.gtt) { in igt_check_page_sizes()
375 obj->mm.page_sizes.gtt); in igt_check_page_sizes()
514 if (vma->page_sizes.gtt != page_size) { in igt_mock_memory_region_huge_pages()
516 __func__, vma->page_sizes.gtt, in igt_mock_memory_region_huge_pages()
603 if (vma->page_sizes.gtt != page_size) { in igt_mock_ppgtt_misaligned_dma()
605 vma->page_sizes.gtt, page_size); in igt_mock_ppgtt_misaligned_dma()
636 if (vma->page_sizes.gtt != I915_GTT_PAGE_SIZE_4K) { in igt_mock_ppgtt_misaligned_dma()
638 vma->page_sizes.gtt, I915_GTT_PAGE_SIZE_4K); in igt_mock_ppgtt_misaligned_dma()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gem/
H A Di915_gem_object_types.h261 unsigned int gtt; member
/netbsd-src/sys/external/bsd/drm2/include/
H A Di915_trace.h146 pgoff_t page_offset, bool gtt, bool write) in trace_i915_gem_object_fault() argument
148 TRACE4(i915,, gem__object__fault, obj, page_offset, gtt, write); in trace_i915_gem_object_fault()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/
H A Dgen8_ppgtt.c624 vma->page_sizes.gtt |= page_size; in gen8_ppgtt_insert_huge()
654 vma->page_sizes.gtt = I915_GTT_PAGE_SIZE; in gen8_ppgtt_insert()
H A Dgen6_ppgtt.c187 vma->page_sizes.gtt = I915_GTT_PAGE_SIZE; in gen6_ppgtt_insert_entries()
H A Dintel_ggtt.c315 * Binds an object into the global gtt with the specified cache level.
318 * through the GMADR mapped BAR (i915->mm.gtt->gtt).
572 vma->page_sizes.gtt = I915_GTT_PAGE_SIZE; in ggtt_bind_vma()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/
H A DMakefile285 gvt/gtt.h \
H A Di915_gpu_error.c1009 dst->gtt_page_sizes = vma->page_sizes.gtt; in i915_vma_coredump_create()
1029 io_mapping_unmap_atomic(dev_priv->gtt.mappable, s); in i915_vma_coredump_create()
1048 io_mapping_unmap_atomic(dev_priv->gtt.mappable, s); in i915_vma_coredump_create()
H A Di915_debugfs.c170 stringify_page_sizes(vma->page_sizes.gtt, NULL, 0)); in describe_obj()
/netbsd-src/sys/external/bsd/drm2/dist/include/uapi/drm/
H A Damdgpu_drm.h914 struct drm_amdgpu_heap_info gtt; member

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