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Searched refs:vs7 (Results 1 – 23 of 23) sorted by relevance

/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dvec_conv_fp32_to_i64_elts.ll186 ; CHECK-P8-NEXT: xxmrghw vs7, v4, v4
188 ; CHECK-P8-NEXT: xvcvspdp vs7, vs7
189 ; CHECK-P8-NEXT: xvcvdpuxds v1, vs7
243 ; CHECK-P9-NEXT: xxmrglw vs7, vs0, vs0
251 ; CHECK-P9-NEXT: xvcvspdp vs7, vs7
259 ; CHECK-P9-NEXT: xvcvdpuxds vs7, vs7
262 ; CHECK-P9-NEXT: stxv vs7, 9
[all...]
H A Dvec_conv_fp64_to_i32_elts.ll164 ; CHECK-P8-NEXT: lxvd2x vs7, 0, r4
182 ; CHECK-P8-NEXT: xxmrghd vs1, vs7, vs4
183 ; CHECK-P8-NEXT: xxmrgld vs4, vs7, vs4
205 ; CHECK-P9-NEXT: lxv vs7, 16(r4)
208 ; CHECK-P9-NEXT: xxmrgld vs8, vs7, vs6
209 ; CHECK-P9-NEXT: xxmrghd vs6, vs7, vs6
210 ; CHECK-P9-NEXT: xxmrgld vs7, vs5, vs4
218 ; CHECK-P9-NEXT: xvcvdpuxws v4, vs7
241 ; CHECK-BE-NEXT: lxv vs7, 0(r4)
244 ; CHECK-BE-NEXT: xxmrgld vs8, vs7, vs
[all...]
H A Dvec_conv_fp_to_i_8byte_elts.ll138 ; CHECK-P8-NEXT: lxvd2x vs7, 0, r4
154 ; CHECK-P8-NEXT: xvcvdpuxds vs0, vs7
174 ; CHECK-P9-NEXT: lxv vs7, 0(r4)
175 ; CHECK-P9-NEXT: xvcvdpuxds vs7, vs7
189 ; CHECK-P9-NEXT: stxv vs7, 0(r3)
202 ; CHECK-BE-NEXT: lxv vs7, 0(r4)
203 ; CHECK-BE-NEXT: xvcvdpuxds vs7, vs7
217 ; CHECK-BE-NEXT: stxv vs7,
[all...]
H A Dvec_conv_i_to_fp_8byte_elts.ll138 ; CHECK-P8-NEXT: lxvd2x vs7, 0, r4
154 ; CHECK-P8-NEXT: xvcvuxddp vs0, vs7
181 ; CHECK-P9-NEXT: xvcvuxddp vs7, v2
182 ; CHECK-P9-NEXT: stxv vs7, 112(r3)
209 ; CHECK-BE-NEXT: xvcvuxddp vs7, v2
210 ; CHECK-BE-NEXT: stxv vs7, 112(r3)
352 ; CHECK-P8-NEXT: lxvd2x vs7, 0, r4
368 ; CHECK-P8-NEXT: xvcvsxddp vs0, vs7
395 ; CHECK-P9-NEXT: xvcvsxddp vs7, v2
396 ; CHECK-P9-NEXT: stxv vs7, 11
[all...]
H A Dvec_conv_i32_to_fp64_elts.ll164 ; CHECK-P8-NEXT: xvcvuxwdp vs7, v0
191 ; CHECK-P8-NEXT: xxswapd vs4, vs7
225 ; CHECK-P9-NEXT: xvcvuxwdp vs7, v2
230 ; CHECK-P9-NEXT: stxv vs7, 96(r3)
257 ; CHECK-BE-NEXT: xvcvuxwdp vs7, v2
262 ; CHECK-BE-NEXT: stxv vs7, 96(r3)
424 ; CHECK-P8-NEXT: xvcvsxwdp vs7, v0
451 ; CHECK-P8-NEXT: xxswapd vs4, vs7
485 ; CHECK-P9-NEXT: xvcvsxwdp vs7, v2
490 ; CHECK-P9-NEXT: stxv vs7, 9
[all...]
H A Dppc64-acc-regalloc.ll34 ; CHECK-NEXT: xxlxor vs7, vs7, vs7
43 ; CHECK-NEXT: xvmaddadp vs7, vs0, v5
50 ; CHECK-NEXT: xvmaddadp vs7, v2, v2
126 ; TRACKLIVE-NEXT: xxlxor vs7, vs7, vs7
135 ; TRACKLIVE-NEXT: xvmaddadp vs7, vs0, v5
142 ; TRACKLIVE-NEXT: xvmaddadp vs7, v2, v2
H A Dvec_conv_fp64_to_i8_elts.ll186 ; CHECK-P8-NEXT: xxswapd vs7, vs6
311 ; CHECK-P8-NEXT: lxvd2x vs7, r3, r4
331 ; CHECK-P8-NEXT: xxswapd vs8, vs7
395 ; CHECK-P9-NEXT: lxv vs7, 0(r3)
400 ; CHECK-P9-NEXT: xxswapd vs7, vs7
478 ; CHECK-BE-NEXT: lxv vs7, 112(r3)
483 ; CHECK-BE-NEXT: xxswapd vs7, vs7
507 ; CHECK-BE-NEXT: xxperm v3, vs7, vs8
741 ; CHECK-P8-NEXT: xxswapd vs7, vs6
866 ; CHECK-P8-NEXT: lxvd2x vs7, r3, r4
[all …]
H A Dvec_conv_i16_to_fp64_elts.ll258 ; CHECK-P8-NEXT: xvcvuxddp vs7, v8
271 ; CHECK-P8-NEXT: xxswapd vs7, vs7
273 ; CHECK-P8-NEXT: stxvd2x vs7, r3, r4
323 ; CHECK-P9-NEXT: xvcvuxddp vs7, v2
326 ; CHECK-P9-NEXT: stxv vs7, 112(r3)
366 ; CHECK-BE-NEXT: xvcvuxddp vs7, v2
369 ; CHECK-BE-NEXT: stxv vs7, 112(r3)
670 ; CHECK-P8-NEXT: xvcvsxddp vs7, v7
678 ; CHECK-P8-NEXT: xxswapd vs7, vs
[all...]
H A Dvec_conv_i8_to_fp64_elts.ll279 ; CHECK-P8-NEXT: xvcvuxddp vs7, v5
289 ; CHECK-P8-NEXT: xxswapd vs7, vs7
291 ; CHECK-P8-NEXT: stxvd2x vs7, r3, r4
352 ; CHECK-P9-NEXT: xvcvuxddp vs7, v2
353 ; CHECK-P9-NEXT: stxv vs7, 112(r3)
405 ; CHECK-BE-NEXT: xvcvuxddp vs7, v2
406 ; CHECK-BE-NEXT: stxv vs7, 112(r3)
721 ; CHECK-P8-NEXT: xvcvsxddp vs7, v5
729 ; CHECK-P8-NEXT: xxswapd vs7, vs
[all...]
H A Dvec_conv_fp64_to_i16_elts.ll177 ; CHECK-P8-NEXT: xxswapd vs7, vs6
298 ; CHECK-P8-NEXT: lxvd2x vs7, r4, r5
317 ; CHECK-P8-NEXT: xxswapd vs8, vs7
468 ; CHECK-BE-NEXT: lxv vs7, 48(r4)
473 ; CHECK-BE-NEXT: xxswapd vs7, vs7
486 ; CHECK-BE-NEXT: xxperm vs7, vs9, vs8
498 ; CHECK-BE-NEXT: xxmrghw vs6, vs6, vs7
724 ; CHECK-P8-NEXT: xxswapd vs7, vs6
845 ; CHECK-P8-NEXT: lxvd2x vs7, r
[all...]
H A Dvector-reduce-fadd.ll2160 ; PWR9LE-NEXT: xvadddp vs7, v4, v12
2165 ; PWR9LE-NEXT: xvadddp vs0, vs7, vs0
2186 ; PWR9BE-NEXT: xvadddp vs7, v4, v12
2191 ; PWR9BE-NEXT: xvadddp vs0, vs7, vs0
2209 ; PWR10LE-NEXT: xvadddp vs7, v4, v12
2216 ; PWR10LE-NEXT: xvadddp vs0, vs7, vs0
2235 ; PWR10BE-NEXT: xvadddp vs7, v4, v12
2242 ; PWR10BE-NEXT: xvadddp vs0, vs7, vs0
2275 ; PWR9LE-NEXT: lxv vs7, 416(r1)
2351 ; PWR9LE-NEXT: xxswapd vs9, vs7
[all...]
H A Dmma-intrinsics.ll299 ; CHECK-NEXT: stxv vs7, 0(r3)
316 ; CHECK-BE-NEXT: stxv vs7, 48(r3)
346 ; CHECK-NEXT: stxv vs7, 0(r3)
363 ; CHECK-BE-NEXT: stxv vs7, 48(r3)
421 ; CHECK-NEXT: stxv vs7, 64(r8)
469 ; CHECK-BE-NEXT: stxv vs7, 112(r8)
556 ; CHECK-NEXT: stxv vs7, 32(r1)
589 ; CHECK-BE-NEXT: stxv vs7, 160(r1)
H A Dmma-acc-copy-hints.ll77 ; CHECK-BE-NEXT: xxlor vs0, vs7, vs7
H A Dvec_conv_fp32_to_i16_elts.ll363 ; CHECK-P8-NEXT: xxsldwi vs7, v5, v5, 3
385 ; CHECK-P8-NEXT: xscvspdpn f1, vs7
548 ; CHECK-BE-NEXT: xxsldwi vs7, vs2, vs2, 3
558 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
596 ; CHECK-BE-NEXT: xxperm vs7, vs8, vs0
603 ; CHECK-BE-NEXT: xxmrghw vs2, vs2, vs7
995 ; CHECK-P8-NEXT: xxsldwi vs7, v5, v5, 3
1017 ; CHECK-P8-NEXT: xscvspdpn f1, vs7
1180 ; CHECK-BE-NEXT: xxsldwi vs7, vs2, vs2, 3
1190 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
[all...]
H A Dvec-trunc2.ll70 ; CHECK-BE-NEXT: lxvw4x vs7, 0, r3
77 ; CHECK-BE-NEXT: xxmrghw vs3, vs7, vs6
H A Dvector-reduce-fmax.ll1046 ; PWR9LE-NEXT: xvmaxdp vs7, v4, v12
1051 ; PWR9LE-NEXT: xvmaxdp vs0, vs7, vs0
1072 ; PWR9BE-NEXT: xvmaxdp vs7, v4, v12
1077 ; PWR9BE-NEXT: xvmaxdp vs0, vs7, vs0
1095 ; PWR10LE-NEXT: xvmaxdp vs7, v4, v12
1102 ; PWR10LE-NEXT: xvmaxdp vs0, vs7, vs0
1121 ; PWR10BE-NEXT: xvmaxdp vs7, v4, v12
1128 ; PWR10BE-NEXT: xvmaxdp vs0, vs7, vs0
H A Dvector-reduce-fmin.ll1046 ; PWR9LE-NEXT: xvmindp vs7, v4, v12
1051 ; PWR9LE-NEXT: xvmindp vs0, vs7, vs0
1072 ; PWR9BE-NEXT: xvmindp vs7, v4, v12
1077 ; PWR9BE-NEXT: xvmindp vs0, vs7, vs0
1095 ; PWR10LE-NEXT: xvmindp vs7, v4, v12
1102 ; PWR10LE-NEXT: xvmindp vs0, vs7, vs0
1121 ; PWR10BE-NEXT: xvmindp vs7, v4, v12
1128 ; PWR10BE-NEXT: xvmindp vs0, vs7, vs0
H A Dspill-vec-pair.ll157 …ffect "nop", "~{memory},~{vs0},~{vs1},~{vs2},~{vs3},~{vs4},~{vs5},~{vs6},~{vs7},~{vs8},~{vs9},~{vs…
H A Dvec_conv_fp32_to_i8_elts.ll381 ; CHECK-P8-NEXT: xxsldwi vs7, v5, v5, 3
394 ; CHECK-P8-NEXT: xscvspdpn f1, vs7
1021 ; CHECK-P8-NEXT: xxsldwi vs7, v5, v5, 3
1034 ; CHECK-P8-NEXT: xscvspdpn f1, vs7
H A Dvector-lrint.ll1809 ; FAST-NEXT: xxmrghd v5, vs7, vs6
2358 ; BE-NEXT: lxvd2x vs7, 0, r3
2392 ; BE-NEXT: stxvd2x vs7, r30, r3
3493 ; FAST-NEXT: xxmrghd v4, vs7, vs6
3568 ; FAST-NEXT: xxmrghd v6, vs10, vs7
3600 ; FAST-NEXT: xxmrghd v5, vs7, vs4
4339 ; FAST-NEXT: xxswapd vs7, v4
4384 ; FAST-NEXT: xscvspdpn f0, vs7
H A Dvector-llrint.ll1798 ; FAST-NEXT: xxmrghd v5, vs7, vs6
2347 ; BE-NEXT: lxvd2x vs7, 0, r3
2381 ; BE-NEXT: stxvd2x vs7, r30, r3
3482 ; FAST-NEXT: xxmrghd v4, vs7, vs6
3557 ; FAST-NEXT: xxmrghd v6, vs10, vs7
3589 ; FAST-NEXT: xxmrghd v5, vs7, vs4
4328 ; FAST-NEXT: xxswapd vs7, v4
4373 ; FAST-NEXT: xscvspdpn f0, vs7
/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterInfos_ppc64le.h216 DEFINE_VSX(vs7, LLDB_INVALID_REGNUM), \
401 uint32_t vs7[4]; member
/llvm-project/llvm/test/MC/PowerPC/
H A Dvsx.s6 xxswapd %vs7, %vs63