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Searched refs:vs6 (Results 1 – 22 of 22) sorted by relevance

/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dvec_conv_fp_to_i_8byte_elts.ll145 ; CHECK-P8-NEXT: lxvd2x vs6, r4, r11
147 ; CHECK-P8-NEXT: xvcvdpuxds vs6, vs6
160 ; CHECK-P8-NEXT: stxvd2x vs6, r3, r11
173 ; CHECK-P9-NEXT: lxv vs6, 16(r4)
176 ; CHECK-P9-NEXT: xvcvdpuxds vs6, vs6
188 ; CHECK-P9-NEXT: stxv vs6, 16(r3)
201 ; CHECK-BE-NEXT: lxv vs6, 16(r4)
204 ; CHECK-BE-NEXT: xvcvdpuxds vs6, vs
[all...]
H A Dvec_conv_fp64_to_i32_elts.ll175 ; CHECK-P8-NEXT: lxvd2x vs6, r4, r7
176 ; CHECK-P8-NEXT: xxmrghd vs8, vs5, vs6
177 ; CHECK-P8-NEXT: xxmrgld vs5, vs5, vs6
178 ; CHECK-P8-NEXT: xxmrghd vs6, vs2, vs3
186 ; CHECK-P8-NEXT: xvcvdpuxws v4, vs6
204 ; CHECK-P9-NEXT: lxv vs6, 0(r4)
208 ; CHECK-P9-NEXT: xxmrgld vs8, vs7, vs6
209 ; CHECK-P9-NEXT: xxmrghd vs6, vs7, vs6
217 ; CHECK-P9-NEXT: xvcvdpuxws v3, vs6
[all...]
H A Dvec_conv_fp32_to_i64_elts.ll185 ; CHECK-P8-NEXT: xxmrglw vs6, v4, v4
187 ; CHECK-P8-NEXT: xvcvspdp vs6, vs6
213 ; CHECK-P8-NEXT: xvcvdpuxds v0, vs6
241 ; CHECK-P9-NEXT: xxmrglw vs6, vs5, vs5
249 ; CHECK-P9-NEXT: xvcvspdp vs6, vs6
257 ; CHECK-P9-NEXT: xvcvdpuxds vs6, vs6
264 ; CHECK-P9-NEXT: stxv vs6, 6
[all...]
H A Dvec_conv_i_to_fp_8byte_elts.ll145 ; CHECK-P8-NEXT: lxvd2x vs6, r4, r11
147 ; CHECK-P8-NEXT: xvcvuxddp vs6, vs6
160 ; CHECK-P8-NEXT: stxvd2x vs6, r3, r11
180 ; CHECK-P9-NEXT: xvcvuxddp vs6, v3
183 ; CHECK-P9-NEXT: stxv vs6, 96(r3)
208 ; CHECK-BE-NEXT: xvcvuxddp vs6, v3
211 ; CHECK-BE-NEXT: stxv vs6, 96(r3)
359 ; CHECK-P8-NEXT: lxvd2x vs6, r4, r11
361 ; CHECK-P8-NEXT: xvcvsxddp vs6, vs
[all...]
H A Dvec_conv_i32_to_fp64_elts.ll163 ; CHECK-P8-NEXT: xvcvuxwdp vs6, v7
187 ; CHECK-P8-NEXT: xxswapd vs5, vs6
219 ; CHECK-P9-NEXT: xvcvuxwdp vs6, v2
227 ; CHECK-P9-NEXT: stxv vs6, 64(r3)
251 ; CHECK-BE-NEXT: xvcvuxwdp vs6, v2
259 ; CHECK-BE-NEXT: stxv vs6, 64(r3)
423 ; CHECK-P8-NEXT: xvcvsxwdp vs6, v7
447 ; CHECK-P8-NEXT: xxswapd vs5, vs6
479 ; CHECK-P9-NEXT: xvcvsxwdp vs6, v2
487 ; CHECK-P9-NEXT: stxv vs6, 6
[all...]
H A Dvec_conv_fp64_to_i16_elts.ll156 ; CHECK-P8-NEXT: lxvd2x vs6, r3, r4
177 ; CHECK-P8-NEXT: xxswapd vs7, vs6
306 ; CHECK-P8-NEXT: xxswapd vs6, vs5
423 ; CHECK-P9-NEXT: xxmrglw vs6, v3, v2
437 ; CHECK-P9-NEXT: xxmrgld vs4, vs4, vs6
477 ; CHECK-BE-NEXT: lxv vs6, 32(r4)
488 ; CHECK-BE-NEXT: xxswapd vs6, vs6
494 ; CHECK-BE-NEXT: xxperm vs6, vs9, vs8
498 ; CHECK-BE-NEXT: xxmrghw vs6, vs
[all...]
H A Dvec_conv_fp64_to_i8_elts.ll165 ; CHECK-P8-NEXT: lxvd2x vs6, r3, r4
186 ; CHECK-P8-NEXT: xxswapd vs7, vs6
309 ; CHECK-P8-NEXT: lxvd2x vs6, r3, r4
328 ; CHECK-P8-NEXT: xxswapd vs10, vs6
396 ; CHECK-P9-NEXT: lxv vs6, 16(r3)
410 ; CHECK-P9-NEXT: xxswapd vs6, vs6
487 ; CHECK-BE-NEXT: lxv vs6, 96(r3)
496 ; CHECK-BE-NEXT: xxswapd vs6, vs6
516 ; CHECK-BE-NEXT: xxperm v3, vs6, vs8
720 ; CHECK-P8-NEXT: lxvd2x vs6, r3, r4
[all …]
H A Dvector-reduce-fadd.ll2159 ; PWR9LE-NEXT: xvadddp vs6, v2, v10
2166 ; PWR9LE-NEXT: xvadddp vs1, vs6, vs1
2185 ; PWR9BE-NEXT: xvadddp vs6, v2, v10
2192 ; PWR9BE-NEXT: xvadddp vs1, vs6, vs1
2208 ; PWR10LE-NEXT: xvadddp vs6, v2, v10
2217 ; PWR10LE-NEXT: xvadddp vs1, vs6, vs1
2234 ; PWR10BE-NEXT: xvadddp vs6, v2, v10
2243 ; PWR10BE-NEXT: xvadddp vs1, vs6, vs1
2276 ; PWR9LE-NEXT: lxv vs6, 432(r1)
2354 ; PWR9LE-NEXT: xxswapd vs8, vs6
[all...]
H A Dvec_conv_i16_to_fp64_elts.ll244 ; CHECK-P8-NEXT: xvcvuxddp vs6, v9
270 ; CHECK-P8-NEXT: xxswapd vs4, vs6
322 ; CHECK-P9-NEXT: xvcvuxddp vs6, v3
327 ; CHECK-P9-NEXT: stxv vs6, 96(r3)
365 ; CHECK-BE-NEXT: xvcvuxddp vs6, v3
370 ; CHECK-BE-NEXT: stxv vs6, 96(r3)
671 ; CHECK-P8-NEXT: xvcvsxddp vs6, v8
686 ; CHECK-P8-NEXT: xxswapd vs4, vs6
741 ; CHECK-P9-NEXT: xvcvsxddp vs6, v2
746 ; CHECK-P9-NEXT: stxv vs6, 9
[all...]
H A Dvec_conv_i8_to_fp64_elts.ll262 ; CHECK-P8-NEXT: xvcvuxddp vs6, v6
290 ; CHECK-P8-NEXT: xxswapd vs3, vs6
348 ; CHECK-P9-NEXT: xvcvuxddp vs6, v3
351 ; CHECK-P9-NEXT: stxv vs6, 96(r3)
401 ; CHECK-BE-NEXT: xvcvuxddp vs6, v3
404 ; CHECK-BE-NEXT: stxv vs6, 96(r3)
722 ; CHECK-P8-NEXT: xvcvsxddp vs6, v1
741 ; CHECK-P8-NEXT: xxswapd vs3, vs6
802 ; CHECK-P9-NEXT: xvcvsxddp vs6, v3
805 ; CHECK-P9-NEXT: stxv vs6, 9
[all...]
H A Dmma-intrinsics.ll298 ; CHECK-NEXT: stxv vs6, 16(r3)
317 ; CHECK-BE-NEXT: stxv vs6, 32(r3)
345 ; CHECK-NEXT: stxv vs6, 16(r3)
364 ; CHECK-BE-NEXT: stxv vs6, 32(r3)
420 ; CHECK-NEXT: stxv vs6, 80(r8)
470 ; CHECK-BE-NEXT: stxv vs6, 96(r8)
555 ; CHECK-NEXT: stxv vs6, 48(r1)
588 ; CHECK-BE-NEXT: stxv vs6, 144(r1)
H A Dmma-acc-copy-hints.ll76 ; CHECK-BE-NEXT: xxlor vs1, vs6, vs6
H A Dppc64-acc-regalloc.ll44 ; CHECK-NEXT: xvmuldp vs6, vs0, v2
51 ; CHECK-NEXT: xvmaddadp vs6, v2, v2
136 ; TRACKLIVE-NEXT: xvmuldp vs6, vs0, v2
143 ; TRACKLIVE-NEXT: xvmaddadp vs6, v2, v2
H A Dvec-trunc2.ll67 ; CHECK-BE-NEXT: lxvw4x vs6, 0, r3
77 ; CHECK-BE-NEXT: xxmrghw vs3, vs7, vs6
H A Dvector-reduce-fmax.ll1045 ; PWR9LE-NEXT: xvmaxdp vs6, v2, v10
1052 ; PWR9LE-NEXT: xvmaxdp vs1, vs6, vs1
1071 ; PWR9BE-NEXT: xvmaxdp vs6, v2, v10
1078 ; PWR9BE-NEXT: xvmaxdp vs1, vs6, vs1
1094 ; PWR10LE-NEXT: xvmaxdp vs6, v2, v10
1103 ; PWR10LE-NEXT: xvmaxdp vs1, vs6, vs1
1120 ; PWR10BE-NEXT: xvmaxdp vs6, v2, v10
1129 ; PWR10BE-NEXT: xvmaxdp vs1, vs6, vs1
H A Dvector-reduce-fmin.ll1045 ; PWR9LE-NEXT: xvmindp vs6, v2, v10
1052 ; PWR9LE-NEXT: xvmindp vs1, vs6, vs1
1071 ; PWR9BE-NEXT: xvmindp vs6, v2, v10
1078 ; PWR9BE-NEXT: xvmindp vs1, vs6, vs1
1094 ; PWR10LE-NEXT: xvmindp vs6, v2, v10
1103 ; PWR10LE-NEXT: xvmindp vs1, vs6, vs1
1120 ; PWR10BE-NEXT: xvmindp vs6, v2, v10
1129 ; PWR10BE-NEXT: xvmindp vs1, vs6, vs1
H A Dvec_conv_fp32_to_i16_elts.ll335 ; CHECK-P8-NEXT: lxvd2x vs6, r4, r6
355 ; CHECK-P8-NEXT: xxswapd v5, vs6
382 ; CHECK-P8-NEXT: xscvspdpn f0, vs6
587 ; CHECK-BE-NEXT: xxperm vs3, vs6, vs0
967 ; CHECK-P8-NEXT: lxvd2x vs6, r4, r6
987 ; CHECK-P8-NEXT: xxswapd v5, vs6
1014 ; CHECK-P8-NEXT: xscvspdpn f0, vs6
1219 ; CHECK-BE-NEXT: xxperm vs3, vs6, vs0
H A Dvec_conv_fp32_to_i8_elts.ll350 ; CHECK-P8-NEXT: lxvd2x vs6, r3, r4
375 ; CHECK-P8-NEXT: xxswapd v5, vs6
399 ; CHECK-P8-NEXT: xscvspdpn f0, vs6
990 ; CHECK-P8-NEXT: lxvd2x vs6, r3, r4
1015 ; CHECK-P8-NEXT: xxswapd v5, vs6
1039 ; CHECK-P8-NEXT: xscvspdpn f0, vs6
H A Dspill-vec-pair.ll157 …tail call void asm sideeffect "nop", "~{memory},~{vs0},~{vs1},~{vs2},~{vs3},~{vs4},~{vs5},~{vs6},~…
H A Dvector-lrint.ll916 ; FAST-NEXT: xxmrghd v5, vs0, vs6
1809 ; FAST-NEXT: xxmrghd v5, vs7, vs6
2356 ; BE-NEXT: lxvd2x vs6, 0, r3
2394 ; BE-NEXT: stxvd2x vs6, r30, r3
3493 ; FAST-NEXT: xxmrghd v4, vs7, vs6
3573 ; FAST-NEXT: xxmrghd v1, vs6, vs5
3575 ; FAST-NEXT: xxswapd vs6, v5
3582 ; FAST-NEXT: stxvd2x vs6, r30, r3
3590 ; FAST-NEXT: xxswapd vs6, v0
3594 ; FAST-NEXT: stxvd2x vs6, r3
[all...]
H A Dvector-llrint.ll905 ; FAST-NEXT: xxmrghd v5, vs0, vs6
1798 ; FAST-NEXT: xxmrghd v5, vs7, vs6
2345 ; BE-NEXT: lxvd2x vs6, 0, r3
2383 ; BE-NEXT: stxvd2x vs6, r30, r3
3482 ; FAST-NEXT: xxmrghd v4, vs7, vs6
3562 ; FAST-NEXT: xxmrghd v1, vs6, vs5
3564 ; FAST-NEXT: xxswapd vs6, v5
3571 ; FAST-NEXT: stxvd2x vs6, r30, r3
3579 ; FAST-NEXT: xxswapd vs6, v0
3583 ; FAST-NEXT: stxvd2x vs6, r3
[all...]
/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterInfos_ppc64le.h215 DEFINE_VSX(vs6, LLDB_INVALID_REGNUM), \
400 uint32_t vs6[4]; member