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Searched refs:vs5 (Results 1 – 23 of 23) sorted by relevance

/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dvec_conv_fp32_to_i64_elts.ll203 ; CHECK-P8-NEXT: xxmrghw vs5, v2, v2
205 ; CHECK-P8-NEXT: xvcvspdp vs5, vs5
207 ; CHECK-P8-NEXT: xvcvdpuxds v3, vs5
226 ; CHECK-P8-NEXT: xxswapd vs5, v0
228 ; CHECK-P8-NEXT: stxvd2x vs5, 0, r3
236 ; CHECK-P9-NEXT: lxv vs5, 32(r4)
241 ; CHECK-P9-NEXT: xxmrglw vs6, vs5, vs5
242 ; CHECK-P9-NEXT: xxmrghw vs5, vs
[all...]
H A Dvec_conv_i32_to_fp64_elts.ll168 ; CHECK-P8-NEXT: xvcvuxwdp vs5, v2
178 ; CHECK-P8-NEXT: xxswapd vs5, vs5
181 ; CHECK-P8-NEXT: stxvd2x vs5, r3, r4
187 ; CHECK-P8-NEXT: xxswapd vs5, vs6
188 ; CHECK-P8-NEXT: stxvd2x vs5, 0, r3
206 ; CHECK-P9-NEXT: lxv vs5, 32(r4)
218 ; CHECK-P9-NEXT: xxmrglw v2, vs5, vs5
220 ; CHECK-P9-NEXT: xxmrghw v2, vs5, vs
[all...]
H A Dvec_conv_fp_to_i_8byte_elts.ll144 ; CHECK-P8-NEXT: lxvd2x vs5, r4, r10
148 ; CHECK-P8-NEXT: xvcvdpuxds vs5, vs5
159 ; CHECK-P8-NEXT: stxvd2x vs5, r3, r10
172 ; CHECK-P9-NEXT: lxv vs5, 32(r4)
177 ; CHECK-P9-NEXT: xvcvdpuxds vs5, vs5
187 ; CHECK-P9-NEXT: stxv vs5, 32(r3)
200 ; CHECK-BE-NEXT: lxv vs5, 32(r4)
205 ; CHECK-BE-NEXT: xvcvdpuxds vs5, vs
[all...]
H A Dvector-reduce-fadd.ll1700 ; PWR9LE-NEXT: xxswapd vs5, v3
1707 ; PWR9LE-NEXT: xxswapd vs5, v4
1710 ; PWR9LE-NEXT: xxswapd vs5, v5
1713 ; PWR9LE-NEXT: xxswapd vs5, v6
1716 ; PWR9LE-NEXT: xxswapd vs5, v7
1719 ; PWR9LE-NEXT: xxswapd vs5, v8
1722 ; PWR9LE-NEXT: xxswapd vs5, v9
1725 ; PWR9LE-NEXT: xxswapd vs5, v10
1728 ; PWR9LE-NEXT: xxswapd vs5, v11
1731 ; PWR9LE-NEXT: xxswapd vs5, v1
[all...]
H A Dvec_conv_fp64_to_i32_elts.ll174 ; CHECK-P8-NEXT: lxvd2x vs5, r4, r6
176 ; CHECK-P8-NEXT: xxmrghd vs8, vs5, vs6
177 ; CHECK-P8-NEXT: xxmrgld vs5, vs5, vs6
185 ; CHECK-P8-NEXT: xvcvdpuxws v3, vs5
207 ; CHECK-P9-NEXT: lxv vs5, 48(r4)
210 ; CHECK-P9-NEXT: xxmrgld vs7, vs5, vs4
211 ; CHECK-P9-NEXT: xxmrghd vs4, vs5, vs4
243 ; CHECK-BE-NEXT: lxv vs5, 32(r4)
246 ; CHECK-BE-NEXT: xxmrgld vs7, vs5, vs
[all...]
H A Dvec_conv_i_to_fp_8byte_elts.ll144 ; CHECK-P8-NEXT: lxvd2x vs5, r4, r10
148 ; CHECK-P8-NEXT: xvcvuxddp vs5, vs5
159 ; CHECK-P8-NEXT: stxvd2x vs5, r3, r10
179 ; CHECK-P9-NEXT: xvcvuxddp vs5, v4
184 ; CHECK-P9-NEXT: stxv vs5, 80(r3)
207 ; CHECK-BE-NEXT: xvcvuxddp vs5, v4
212 ; CHECK-BE-NEXT: stxv vs5, 80(r3)
358 ; CHECK-P8-NEXT: lxvd2x vs5, r4, r10
362 ; CHECK-P8-NEXT: xvcvsxddp vs5, vs
[all...]
H A Dvec_conv_fp32_to_i16_elts.ll199 ; CHECK-P8-NEXT: xxsldwi vs5, v2, v2, 1
203 ; CHECK-P8-NEXT: xscvspdpn f1, vs5
359 ; CHECK-P8-NEXT: xxsldwi vs5, v2, v2, 1
378 ; CHECK-P8-NEXT: xscvspdpn f1, vs5
443 ; CHECK-P9-NEXT: xxsldwi vs5, vs0, vs0, 3
460 ; CHECK-P9-NEXT: xscvspdpn f3, vs5
546 ; CHECK-BE-NEXT: xxswapd vs5, vs3
556 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
580 ; CHECK-BE-NEXT: xxperm vs4, vs5, vs0
610 ; CHECK-BE-NEXT: xxperm vs1, vs5, vs
[all...]
H A Dvec_conv_fp64_to_i16_elts.ll170 ; CHECK-P8-NEXT: xxswapd vs5, vs4
253 ; CHECK-BE-NEXT: xxperm vs3, vs5, vs4
261 ; CHECK-BE-NEXT: xxperm vs2, vs5, vs4
291 ; CHECK-P8-NEXT: lxvd2x vs5, 0, r4
306 ; CHECK-P8-NEXT: xxswapd vs6, vs5
476 ; CHECK-BE-NEXT: lxv vs5, 16(r4)
496 ; CHECK-BE-NEXT: xxswapd vs5, vs5
503 ; CHECK-BE-NEXT: xxperm vs5, vs9, vs8
515 ; CHECK-BE-NEXT: xxmrghw vs4, vs4, vs5
[all...]
H A Dvec_conv_fp64_to_i8_elts.ll179 ; CHECK-P8-NEXT: xxswapd vs5, vs4
268 ; CHECK-BE-NEXT: xxperm v2, vs5, vs4
320 ; CHECK-P8-NEXT: xxswapd vs5, vs4
404 ; CHECK-P9-NEXT: lxv vs5, 32(r3)
418 ; CHECK-P9-NEXT: xxswapd vs5, vs5
486 ; CHECK-BE-NEXT: lxv vs5, 80(r3)
504 ; CHECK-BE-NEXT: xxswapd vs5, vs5
521 ; CHECK-BE-NEXT: xxperm v4, vs5, vs8
534 ; CHECK-BE-NEXT: xxperm v2, vs5, vs8
734 ; CHECK-P8-NEXT: xxswapd vs5, vs4
[all …]
H A Dvec_conv_i16_to_fp64_elts.ll268 ; CHECK-P8-NEXT: xvcvuxddp vs5, v2
277 ; CHECK-P8-NEXT: xxswapd vs5, vs5
279 ; CHECK-P8-NEXT: stxvd2x vs5, r3, r4
318 ; CHECK-P9-NEXT: xvcvuxddp vs5, v3
325 ; CHECK-P9-NEXT: stxv vs5, 80(r3)
361 ; CHECK-BE-NEXT: xvcvuxddp vs5, v3
368 ; CHECK-BE-NEXT: stxv vs5, 80(r3)
672 ; CHECK-P8-NEXT: xvcvsxddp vs5, v2
679 ; CHECK-P8-NEXT: xxswapd vs5, vs
[all...]
H A Dvec_conv_i64_to_fp32_elts.ll184 ; CHECK-P8-NEXT: lxvd2x vs5, r4, r7
194 ; CHECK-P8-NEXT: xxswapd v3, vs5
197 ; CHECK-P8-NEXT: xvcvuxdsp vs5, v4
205 ; CHECK-P8-NEXT: xxsldwi v1, vs5, vs5, 3
476 ; CHECK-P8-NEXT: lxvd2x vs5, r4, r7
486 ; CHECK-P8-NEXT: xxswapd v3, vs5
489 ; CHECK-P8-NEXT: xvcvsxdsp vs5, v4
497 ; CHECK-P8-NEXT: xxsldwi v1, vs5, vs5,
[all...]
H A Dvec_conv_fp32_to_i8_elts.ll208 ; CHECK-P8-NEXT: xxsldwi vs5, v2, v2, 1
212 ; CHECK-P8-NEXT: xscvspdpn f1, vs5
374 ; CHECK-P8-NEXT: xxsldwi vs5, v2, v2, 1
390 ; CHECK-P8-NEXT: xscvspdpn f1, vs5
554 ; CHECK-BE-NEXT: xxsldwi vs5, vs3, vs3, 3
555 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
558 ; CHECK-BE-NEXT: xxswapd vs5, vs3
560 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
564 ; CHECK-BE-NEXT: xxperm v2, vs5, vs4
576 ; CHECK-BE-NEXT: xxperm v3, vs5, vs4
[all …]
H A Dvec_conv_i8_to_fp64_elts.ll247 ; CHECK-P8-NEXT: lxvd2x vs5, 0, r4
272 ; CHECK-P8-NEXT: xxswapd v4, vs5
273 ; CHECK-P8-NEXT: xvcvuxddp vs5, v1
288 ; CHECK-P8-NEXT: xxswapd vs4, vs5
342 ; CHECK-P9-NEXT: xvcvuxddp vs5, v3
347 ; CHECK-P9-NEXT: stxv vs5, 80(r3)
395 ; CHECK-BE-NEXT: xvcvuxddp vs5, v3
400 ; CHECK-BE-NEXT: stxv vs5, 80(r3)
723 ; CHECK-P8-NEXT: xvcvsxddp vs5, v0
735 ; CHECK-P8-NEXT: xxswapd vs4, vs5
[all...]
H A Dmma-intrinsics.ll297 ; CHECK-NEXT: stxv vs5, 32(r3)
314 ; CHECK-BE-NEXT: stxv vs5, 16(r3)
344 ; CHECK-NEXT: stxv vs5, 32(r3)
361 ; CHECK-BE-NEXT: stxv vs5, 16(r3)
418 ; CHECK-NEXT: stxv vs5, 96(r8)
466 ; CHECK-BE-NEXT: stxv vs5, 80(r8)
554 ; CHECK-NEXT: stxv vs5, 64(r1)
587 ; CHECK-BE-NEXT: stxv vs5, 128(r1)
H A Dmma-acc-copy-hints.ll79 ; CHECK-BE-NEXT: xxlor vs2, vs5, vs5
H A Dvec-trunc2.ll65 ; CHECK-BE-NEXT: lxvw4x vs5, 0, r3
75 ; CHECK-BE-NEXT: xxmrghw vs2, vs5, vs4
H A Dvector-reduce-fmax.ll1044 ; PWR9LE-NEXT: xvmaxdp vs5, v5, v13
1053 ; PWR9LE-NEXT: xvmaxdp vs2, vs5, vs2
1070 ; PWR9BE-NEXT: xvmaxdp vs5, v5, v13
1079 ; PWR9BE-NEXT: xvmaxdp vs2, vs5, vs2
1093 ; PWR10LE-NEXT: xvmaxdp vs5, v5, v13
1104 ; PWR10LE-NEXT: xvmaxdp vs2, vs5, vs2
1119 ; PWR10BE-NEXT: xvmaxdp vs5, v5, v13
1130 ; PWR10BE-NEXT: xvmaxdp vs2, vs5, vs2
H A Dvector-reduce-fmin.ll1044 ; PWR9LE-NEXT: xvmindp vs5, v5, v13
1053 ; PWR9LE-NEXT: xvmindp vs2, vs5, vs2
1070 ; PWR9BE-NEXT: xvmindp vs5, v5, v13
1079 ; PWR9BE-NEXT: xvmindp vs2, vs5, vs2
1093 ; PWR10LE-NEXT: xvmindp vs5, v5, v13
1104 ; PWR10LE-NEXT: xvmindp vs2, vs5, vs2
1119 ; PWR10BE-NEXT: xvmindp vs5, v5, v13
1130 ; PWR10BE-NEXT: xvmindp vs2, vs5, vs2
H A Dppc64-acc-regalloc.ll56 ; CHECK-NEXT: xvmuldp vs5, v6, v2
148 ; TRACKLIVE-NEXT: xvmuldp vs5, v6, v2
H A Dvector-lrint.ll911 ; FAST-NEXT: xxmrghd v4, vs5, vs4
1808 ; FAST-NEXT: xxmrghd v4, vs5, vs4
2354 ; BE-NEXT: lxvd2x vs5, 0, r3
2396 ; BE-NEXT: stxvd2x vs5, r30, r3
3489 ; FAST-NEXT: xxmrghd v3, vs5, v3
3573 ; FAST-NEXT: xxmrghd v1, vs6, vs5
3574 ; FAST-NEXT: xxswapd vs5, v10
3580 ; FAST-NEXT: stxvd2x vs5, r30, r3
3586 ; FAST-NEXT: xxswapd vs5, v6
3587 ; FAST-NEXT: stxvd2x vs5, r3
[all...]
H A Dvector-llrint.ll900 ; FAST-NEXT: xxmrghd v4, vs5, vs4
1797 ; FAST-NEXT: xxmrghd v4, vs5, vs4
2343 ; BE-NEXT: lxvd2x vs5, 0, r3
2385 ; BE-NEXT: stxvd2x vs5, r30, r3
3478 ; FAST-NEXT: xxmrghd v3, vs5, v3
3562 ; FAST-NEXT: xxmrghd v1, vs6, vs5
3563 ; FAST-NEXT: xxswapd vs5, v10
3569 ; FAST-NEXT: stxvd2x vs5, r30, r3
3575 ; FAST-NEXT: xxswapd vs5, v6
3576 ; FAST-NEXT: stxvd2x vs5, r3
[all...]
H A Dspill-vec-pair.ll157 …tail call void asm sideeffect "nop", "~{memory},~{vs0},~{vs1},~{vs2},~{vs3},~{vs4},~{vs5},~{vs6},~…
/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterInfos_ppc64le.h214 DEFINE_VSX(vs5, LLDB_INVALID_REGNUM), \
399 uint32_t vs5[4]; member