Searched refs:pvsrl (Results 1 – 6 of 6) sorted by relevance
/llvm-project/llvm/test/MC/VE/ |
H A D | VSRL.s | 14 # CHECK-INST: pvsrl.lo %vix, %v22, 22 16 pvsrl.lo %vix, %v22, 22 18 # CHECK-INST: pvsrl.lo %v11, %v22, 127, %vm11 20 pvsrl.lo %v11, %v22, 127, %vm11 22 # CHECK-INST: pvsrl.up %v11, %vix, %v22, %vm11 24 pvsrl.up %v11, %vix, %v22, %vm11 26 # CHECK-INST: pvsrl %v12, %v20, %v22, %vm12 28 pvsrl %v12, %v20, %v22, %vm12 label
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/llvm-project/llvm/test/CodeGen/VE/VELIntrinsics/ |
H A D | vsrl.ll | 160 ; CHECK-NEXT: pvsrl %v0, %v0, %v1 162 …%3 = tail call fast <256 x double> @llvm.ve.vl.pvsrl.vvvl(<256 x double> %0, <256 x double> %1, i3… 167 declare <256 x double> @llvm.ve.vl.pvsrl.vvvl(<256 x double>, <256 x double>, i32) 175 ; CHECK-NEXT: pvsrl %v2, %v0, %v1 180 …%4 = tail call fast <256 x double> @llvm.ve.vl.pvsrl.vvvvl(<256 x double> %0, <256 x double> %1, <… 185 declare <256 x double> @llvm.ve.vl.pvsrl.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32) 193 ; CHECK-NEXT: pvsrl %v0, %v0, %s0 195 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsrl.vvsl(<256 x double> %0, i64 %1, i32 256) 200 declare <256 x double> @llvm.ve.vl.pvsrl.vvsl(<256 x double>, i64, i32) 208 ; CHECK-NEXT: pvsrl %v1, %v0, %s0 [all …]
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/llvm-project/llvm/test/CodeGen/VE/Packed/ |
H A D | vp_srl.ll | 13 ; CHECK-NEXT: pvsrl %v0, %v0, %v1, %vm2 33 ; CHECK-NEXT: pvsrl %v0, %v1, %v0, %vm2 52 ; CHECK-NEXT: pvsrl %v0, %v0, %s0, %vm2
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/llvm-project/llvm/test/CodeGen/VE/Vector/ |
H A D | vp_lshr.ll | 11 ; CHECK-NEXT: pvsrl.lo %v0, %v0, %v1, %vm1
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H A D | vp_srl.ll | 11 ; CHECK-NEXT: pvsrl.lo %v0, %v0, %v1, %vm1
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/llvm-project/llvm/lib/Target/VE/ |
H A D | VEInstrVec.td | 1060 let cx = 0, cx2 = 1 in defm PVSRLLO : RVSm<"pvsrl.lo", 0xf5, I32, V64, VM>; 1061 let cx = 1, cx2 = 0 in defm PVSRLUP : RVSm<"pvsrl.up", 0xf5, F32, V64, VM>; 1062 let cx = 1, cx2 = 1 in defm PVSRL : RVSm<"pvsrl", 0xf5, I64, V64, VM512>;
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