| /llvm-project/llvm/include/llvm/IR/ |
| H A D | InlineAsm.h | 187 static ConstraintInfoVector ParseConstraints(StringRef ConstraintString);
191 ConstraintInfoVector ParseConstraints() const { in ParseConstraints() function
192 return ParseConstraints(Constraints); in ParseConstraints()
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| /llvm-project/llvm/lib/IR/ |
| H A D | InlineAsm.cpp | 236 InlineAsm::ParseConstraints(StringRef Constraints) { in ParseConstraints()
278 ConstraintInfoVector Constraints = ParseConstraints(ConstStr); in verify()
235 InlineAsm::ParseConstraints(StringRef Constraints) { ParseConstraints() function in InlineAsm
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| H A D | Verifier.cpp | 2544 for (const InlineAsm::ConstraintInfo &CI : IA->ParseConstraints()) { in verifyStatepoint()
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| /llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenInstruction.cpp | 395 static void ParseConstraints(StringRef CStr, CGIOperandList &Ops, in ParseConstraints()
496 ParseConstraints(R->getValueAsString("Constraints"), Operands, R); in CodeGenInstruction()
394 static void ParseConstraints(StringRef CStr, CGIOperandList &Ops, Record *Rec) { ParseConstraints() function
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| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InlineAsmLowering.cpp | 232 TLI->ParseConstraints(DL, TRI, Call); in lowerInlineAsm()
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FunctionLoweringInfo.cpp | 188 TLI->ParseConstraints(Fn->getDataLayout(), TRI, in set()
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| H A D | SelectionDAGBuilder.cpp | 9949 TargetLowering::AsmOperandInfoVector TargetConstraints = TLI.ParseConstraints( in visitInlineAsm()
12731 TLI.ParseConstraints(DAG.getDataLayout(), TRI, *CBR);
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| H A D | TargetLowering.cpp | 5731 TargetLowering::ParseConstraints(const DataLayout &DL, in ParseConstraints()
5745 for (InlineAsm::ConstraintInfo &CI : IA->ParseConstraints()) { in ParseConstraints()
5674 TargetLowering::ParseConstraints(const DataLayout &DL, ParseConstraints() function in TargetLowering
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUAttributor.cpp | 1227 for (const auto &CI : IA->ParseConstraints()) {
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| H A D | AMDGPUTargetTransformInfo.cpp | 900 TLI->ParseConstraints(DL, ST->getRegisterInfo(), *CI);
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| H A D | SIISelLowering.cpp | 17058 TargetLowering::AsmOperandInfoVector TargetConstraints = ParseConstraints(
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 5014 virtual AsmOperandInfoVector ParseConstraints(const DataLayout &DL,
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 5475 TLI.ParseConstraints(F->getDataLayout(), &TRI, *CI); in optimizeMemoryInst()
6296 TLI->ParseConstraints(*DL, TRI, *CS); in splitLargeGEPOffsets()
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| /llvm-project/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 4849 for (const InlineAsm::ConstraintInfo &CI : IA->ParseConstraints()) { in parseFunctionBody()
5993 InlineAsm::ConstraintInfoVector ConstraintInfo = IA->ParseConstraints(); in parseFunctionBody()
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| /llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | MemorySanitizer.cpp | 5340 InlineAsm::ConstraintInfoVector Constraints = IA->ParseConstraints(); in visitCallBase()
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | [all...] |