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Searched refs:Modes (Results 1 – 25 of 25) sorted by relevance

/llvm-project/llvm/test/TableGen/
H A DHwModeBitSet.td69 // Modes who are not controlling Register related features will be manipulated
124 // CHECK-SUBTARGET: unsigned Modes = 0;
125 // CHECK-SUBTARGET: if (checkFeatures("+feat")) Modes |= (1 << 0);
126 // CHECK-SUBTARGET: if (checkFeatures("+feat1")) Modes |= (1 << 1);
127 // CHECK-SUBTARGET: if (checkFeatures("+feat2")) Modes |= (1 << 2);
128 // CHECK-SUBTARGET: return Modes;
131 // CHECK-SUBTARGET: unsigned Modes = getHwModeSet();
132 // CHECK-SUBTARGET: if (!Modes)
133 // CHECK-SUBTARGET: return Modes;
136 // CHECK-SUBTARGET: return llvm::countr_zero(Modes) + 1;
[all …]
H A DHwModeSelect.td27 // CHECK: error: assertion failed: The Objects and Modes lists must be the same length
/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenHwModes.cpp42 std::vector<const Record *> Modes = R->getValueAsListOfDefs("Modes"); in HwModeSelect()
44 for (auto [Mode, Object] : zip_equal(Modes, Objects)) { in HwModeSelect()
64 Modes.emplace_back(R); in dump()
65 ModeIds.try_emplace(R, Modes.size()); in dump()
68 assert(Modes.size() <= 32 && "number of HwModes exceeds maximum of 32"); in CodeGenHwModes()
93 dbgs() << "Modes: {\n";
94 for (const HwMode &M : Modes) { in getHwModeSelect()
43 std::vector<Record *> Modes = R->getValueAsListOfDefs("Modes"); HwModeSelect() local
H A DVarLenCodeEmitterGen.cpp78 std::map<AltEncodingTy, std::string> Modes; member in __anon181004bd0111::VarLenCodeEmitterGen
243 Modes.insert({Mode, "_" + HWM.getMode(Mode).Name.str()}); in run()
256 if (Modes.empty()) in run()
257 Modes.insert({Universal, ""}); // Base case, skip suffix. in run()
268 for (const auto &Mode : Modes) in run()
271 if (Modes.size() > 1) { in run()
275 for (const auto &Mode : Modes) { in run()
353 IS << " static const unsigned Index" << Modes[Mode] << "[][2] = {\n"; in emitInstructionBaseValues()
354 SS << " static const uint64_t InstBits" << Modes[Mode] << "[] = {\n"; in emitInstructionBaseValues()
422 AltEncodingTy Mode = Modes in getInstructionCases()
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H A DInfoByHwMode.h44 SmallVectorImpl<unsigned> &Modes) { in union_modes() argument
63 Modes.push_back(AI->first); in union_modes()
68 Modes.push_back(BI->first); in union_modes()
71 Modes.push_back(AI->first); in union_modes()
80 Modes.push_back(BI->first); in union_modes()
84 Modes.push_back(DefaultMode); in union_modes()
H A DCodeGenHwModes.h53 return Modes[Id - 1]; in getMode()
64 unsigned getNumModeIds() const { return Modes.size() + 1; } in getNumModeIds()
70 std::vector<HwMode> Modes; member
H A DCodeGenDAGPatterns.cpp187 SmallVector<unsigned, 4> Modes; in writeToStream() local
188 Modes.reserve(Map.size()); in writeToStream()
191 Modes.push_back(I.first); in writeToStream()
192 if (Modes.empty()) { in writeToStream()
196 array_pod_sort(Modes.begin(), Modes.end()); in writeToStream()
199 for (unsigned M : Modes) { in writeToStream()
219 SmallSet<unsigned, 4> Modes; in operator ==() local
221 Modes.insert(I.first); in operator ==()
223 Modes in operator ==()
494 SmallVector<unsigned, 4> Modes; EnforceSmallerThan() local
609 SmallVector<unsigned, 4> Modes; EnforceVectorEltTypeIs() local
694 SmallVector<unsigned, 4> Modes; EnforceVectorSubVectorTypeIs() local
738 SmallVector<unsigned, 4> Modes; EnforceSameNumElts() local
785 SmallVector<unsigned, 4> Modes; EnforceSameSize() local
4390 collectModes(std::set<unsigned> & Modes,const TreePatternNode & N) collectModes() argument
4432 std::set<unsigned> Modes; ExpandHwModeBasedTypes() local
[all...]
H A DCodeGenRegisters.cpp1189 const CodeGenHwModes &Modes) in CodeGenRegBank()
1190 : CGH(Modes) { in CodeGenRegBank()
1181 CodeGenRegBank(RecordKeeper & Records,const CodeGenHwModes & Modes) CodeGenRegBank() argument
/llvm-project/clang/lib/Driver/
H A DXRayArgs.cpp160 llvm::copy(XRaySupportedModes, std::back_inserter(Modes)); in addArgs()
168 Modes.clear(); in addArgs()
170 llvm::copy(XRaySupportedModes, std::back_inserter(Modes)); in addArgs()
172 Modes.push_back(std::string(M)); in addArgs()
176 llvm::sort(Modes); in addArgs()
177 Modes.erase(std::unique(Modes.begin(), Modes.end()), Modes.end()); in addArgs()
259 for (const auto &Mode : Modes) { in addArgs()
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/llvm-project/clang/include/clang/Driver/
H A DXRayArgs.h26 std::vector<std::string> Modes; variable
40 llvm::ArrayRef<std::string> modeList() const { return Modes; }
/llvm-project/clang-tools-extra/clangd/
H A DCompileCommands.cpp495 auto Modes = getModes(Opt); in rulesFor()
505 R.Modes = Modes; in rulesFor()
528 int(R.Modes)); in rulesFor()
551 Rules.back().Modes = DM_All; in rulesFor()
564 if (!(R.Modes & Mode)) in strip()
507 auto Modes = getModes(Opt); rulesFor() local
H A DCompileCommands.h91 unsigned char Modes = 0; // Rule applies only in specified driver modes. member
/llvm-project/libc/docs/
H A Dusage_modes.rst
/llvm-project/mlir/include/mlir/Dialect/SCF/TransformOps/
H A DSCFTransformOps.td67 #### Return Modes
94 #### Return Modes
122 #### Return Modes
174 #### Return Modes
/llvm-project/llvm/docs/GlobalISel/
H A DRegBankSelect.rst52 RegBankSelect Modes
/llvm-project/llvm/lib/Target/ARM/
H A DARMLegalizerInfo.cpp457 // New FPSCR = (FPSCR & FPStatusBits) | (Modes & ~FPStatusBits) in legalizeCustom()
460 Register Modes = MI.getOperand(0).getReg(); in legalizeCustom()
466 auto FPModeBits = MIRBuilder.buildAnd(FPEnvTy, Modes, NotStatusBitMask);
450 Register Modes = MI.getOperand(0).getReg(); legalizeCustom() local
/llvm-project/clang/docs/
H A DHIPSupport.rst184 Compilation Modes
206 **Both Modes**:
H A DInternalsManual.rst3534 Matching Modes
/llvm-project/clang/docs/HLSL/
H A DAvailabilityDiagnostics.rst31 Default and Relaxed Diagnostic Modes
/llvm-project/lldb/docs/use/
H A Daarch64-linux.rst
/llvm-project/third-party/benchmark/docs/
H A Dtools.md22 ### Modes of operation
/llvm-project/libcxx/docs/
H A DHardening.rst4 Hardening Modes
/llvm-project/mlir/docs/
H A DDialectConversion.md16 ## Modes of Conversion
/llvm-project/llvm/include/llvm/Target/
H A DTarget.td45 // element on the Modes list.
47 list<HwMode> Modes = Ms;
49 assert !eq(ObjectsLength, !size(Modes)),
50 "The Objects and Modes lists must be the same length";
70 : HwModeSelect<scalar.Modes, !size(scalar.Objects)>,
/llvm-project/mlir/include/mlir/Dialect/Transform/IR/
H A DTransformOps.td636 #### Return Modes