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Searched refs:reg_offset (Results 1 – 10 of 10) sorted by relevance

/dpdk/drivers/net/qede/base/
H A Decore_init_fw_funcs.c1118 u32 ctrl, inc_val, reg_offset; in ecore_init_nig_lb_rl() local
1169 for (tc = 0, reg_offset = 0; tc < NUM_OF_PHYS_TCS; in ecore_init_nig_lb_rl()
1170 tc++, reg_offset += 4) { in ecore_init_nig_lb_rl()
1176 NIG_REG_LB_TCRATELIMIT_CTRL_0 + reg_offset, ctrl); in ecore_init_nig_lb_rl()
1184 reg_offset, NIG_RL_PERIOD_CLK_25M); in ecore_init_nig_lb_rl()
1187 reg_offset, inc_val); in ecore_init_nig_lb_rl()
1189 reg_offset, NIG_RL_MAX_VAL(inc_val, req->mtu)); in ecore_init_nig_lb_rl()
1195 reg_offset, ctrl); in ecore_init_nig_lb_rl()
1313 u32 active_port_blocks, reg_offset = 0; in ecore_init_brb_ram() local
1358 for (tc = 0; tc < NUM_OF_TCS; tc++, reg_offset += 4) { in ecore_init_brb_ram()
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H A Decore_cxt.c1998 u32 reg_offset, shadow_line, elem_size, hw_p_size, elems_per_p, line; in ecore_cxt_dynamic_ilt_alloc() local
2069 reg_offset = PSWRQ2_REG_ILT_MEMORY + in ecore_cxt_dynamic_ilt_alloc()
2081 reg_offset, sizeof(ilt_hw_entry) / sizeof(u32), in ecore_cxt_dynamic_ilt_alloc()
2101 u32 reg_offset, elem_size, hw_p_size, elems_per_p; in ecore_cxt_free_ilt_range() local
2163 reg_offset = PSWRQ2_REG_ILT_MEMORY + in ecore_cxt_free_ilt_range()
2172 reg_offset, in ecore_cxt_free_ilt_range()
H A Decore_hsi_debug_tools.h564 u16 reg_offset; member
/dpdk/drivers/crypto/ccp/
H A Dccp_dev.h172 #define CCP_READ_REG(hw_addr, reg_offset) \ argument
173 ccp_pci_reg_read(hw_addr, reg_offset)
175 #define CCP_WRITE_REG(hw_addr, reg_offset, value) \ argument
176 ccp_pci_reg_write(hw_addr, reg_offset, value)
/dpdk/drivers/net/txgbe/base/
H A Dtxgbe_mbx.c516 u32 reg_offset = (vf_number < 32) ? 0 : 1; in txgbe_check_for_rst_pf() local
521 vflre = rd32(hw, TXGBE_FLRVFE(reg_offset)); in txgbe_check_for_rst_pf()
524 wr32(hw, TXGBE_FLRVFEC(reg_offset), (1 << vf_shift)); in txgbe_check_for_rst_pf()
/dpdk/drivers/net/hns3/
H A Dhns3_stats.c826 uint32_t reg_offset; in hns3_queue_stats_get() local
832 reg_offset = hns3_get_tqp_reg_offset(j); in hns3_queue_stats_get()
834 reg_offset + hns3_rx_queue_strings[i].offset); in hns3_queue_stats_get()
843 reg_offset = hns3_get_tqp_reg_offset(j); in hns3_queue_stats_get()
845 reg_offset + hns3_tx_queue_strings[i].offset); in hns3_queue_stats_get()
/dpdk/drivers/common/cnxk/
H A Droc_ree.c186 msg->reg_offset = reg; in roc_ree_af_reg_read()
221 msg->reg_offset = reg; in roc_ree_af_reg_write()
H A Droc_cpt_debug.c96 msg->reg_offset = reg; in cpt_af_reg_read()
/dpdk/drivers/net/qede/
H A Dqede_debug.c1985 u32 offset = 0, reg_offset = 0; in qed_grc_dump_reg_entry_skip() local
1992 while (reg_offset < total_len) { in qed_grc_dump_reg_entry_skip()
1994 total_len - reg_offset); in qed_grc_dump_reg_entry_skip()
2001 reg_offset += curr_len; in qed_grc_dump_reg_entry_skip()
2004 if (reg_offset < total_len) { in qed_grc_dump_reg_entry_skip()
2009 reg_offset += curr_len; in qed_grc_dump_reg_entry_skip()
3583 rule->reg_offset; in qed_idle_chk_dump_failure()
3724 rule->reg_offset; in qed_idle_chk_dump_rule_entries()
/dpdk/drivers/net/bnx2x/
H A Decore_sp.c719 uint32_t reg_offset = ECORE_PORT_ID(sc) ? NIG_REG_LLH1_FUNC_MEM : in ecore_set_mac_in_nig() local
733 reg_offset += 8 * index; in ecore_set_mac_in_nig()
739 ECORE_REG_WR_DMAE_LEN(sc, reg_offset, wb_data, 2); in ecore_set_mac_in_nig()