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/dpdk/lib/eal/common/
H A Deal_common_trace_ctf.c33 meta_copy(char **meta, int *offset, char *str, int rc) in meta_copy() argument
35 int count = *offset; in meta_copy()
51 *offset = count; in meta_copy()
61 meta_data_type_emit(char **meta, int *offset) in meta_data_type_emit() argument
101 return meta_copy(meta, offset, str, rc); in meta_data_type_emit()
115 meta_header_emit(char **meta, int *offset) in meta_header_emit() argument
134 return meta_copy(meta, offset, str, rc); in meta_header_emit()
138 meta_env_emit(char **meta, int *offset) in meta_env_emit() argument
148 return meta_copy(meta, offset, str, rc); in meta_env_emit()
152 meta_clock_pass1_emit(char **meta, int *offset) in meta_clock_pass1_emit() argument
[all …]
/dpdk/lib/port/
H A Drte_port.h23 #define RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset) \
24 (&((uint8_t *)(mbuf))[offset])
25 #define RTE_MBUF_METADATA_UINT16_PTR(mbuf, offset) \
26 ((uint16_t *) RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset))
27 #define RTE_MBUF_METADATA_UINT32_PTR(mbuf, offset) \ argument
28 ((uint32_t *) RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset))
29 #define RTE_MBUF_METADATA_UINT64_PTR(mbuf, offset) \ argument
30 ((uint64_t *) RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset))
32 #define RTE_MBUF_METADATA_UINT8(mbuf, offset) \
33 (*RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset)) argument
31 RTE_MBUF_METADATA_UINT32_PTR(mbuf,offset) global() argument
36 RTE_MBUF_METADATA_UINT8(mbuf,offset) global() argument
38 RTE_MBUF_METADATA_UINT16(mbuf,offset) global() argument
40 RTE_MBUF_METADATA_UINT32(mbuf,offset) global() argument
42 RTE_MBUF_METADATA_UINT64(mbuf,offset) global() argument
[all...]
/dpdk/drivers/bus/fslmc/qbman/
H A Dqbman_sys.h183 static inline void qbman_cinh_write(struct qbman_swp_sys *s, uint32_t offset, in qbman_cinh_write() argument
186 __raw_writel(val, s->addr_cinh + offset); in qbman_cinh_write()
189 s->addr_cinh, s->idx, offset, val); in qbman_cinh_write()
194 uint32_t offset) in qbman_cinh_write_start_wo_shadow() argument
198 s->addr_cinh, s->idx, offset); in qbman_cinh_write_start_wo_shadow()
200 QBMAN_BUG_ON(offset & 63); in qbman_cinh_write_start_wo_shadow()
201 return (s->addr_cinh + offset); in qbman_cinh_write_start_wo_shadow()
205 uint32_t offset, void *cmd) in qbman_cinh_write_complete() argument
211 s->addr_cinh, s->idx, offset, shadow); in qbman_cinh_write_complete()
216 offset + loop * 4); in qbman_cinh_write_complete()
[all …]
/dpdk/drivers/net/qede/
H A Dqede_debug.c1046 u32 offset = 0; in qed_dump_str_param() local
1049 offset += qed_dump_str(char_buf + offset, dump, param_name); in qed_dump_str_param()
1053 *(char_buf + offset) = 1; in qed_dump_str_param()
1054 offset++; in qed_dump_str_param()
1057 offset += qed_dump_str(char_buf + offset, dump, param_val); in qed_dump_str_param()
1060 offset += qed_dump_align(char_buf + offset, dump, offset); in qed_dump_str_param()
1062 return BYTES_TO_DWORDS(offset); in qed_dump_str_param()
1072 u32 offset = 0; in qed_dump_num_param() local
1075 offset += qed_dump_str(char_buf + offset, dump, param_name); in qed_dump_num_param()
1079 *(char_buf + offset) = 0; in qed_dump_num_param()
[all …]
H A Dqede_regs.c86 uint32_t offset = 0; in qede_get_regs() local
113 offset + REGDUMP_HEADER_SIZE, &feature_size); in qede_get_regs()
114 *(uint32_t *)((uint8_t *)buffer + offset) = in qede_get_regs()
117 offset += (feature_size + REGDUMP_HEADER_SIZE); in qede_get_regs()
123 offset + REGDUMP_HEADER_SIZE, &feature_size); in qede_get_regs()
124 *(uint32_t *)((uint8_t *)buffer + offset) = in qede_get_regs()
127 offset += (feature_size + REGDUMP_HEADER_SIZE); in qede_get_regs()
133 offset + REGDUMP_HEADER_SIZE, &feature_size); in qede_get_regs()
134 *(uint32_t *)((uint8_t *)buffer + offset) = in qede_get_regs()
137 offset += (feature_size + REGDUMP_HEADER_SIZE); in qede_get_regs()
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/dpdk/drivers/common/dpaax/caamflib/rta/
H A Dload_cmd.h147 load_check_len_offset(int pos, uint32_t length, uint32_t offset) in load_check_len_offset() argument
151 (offset & ~load_off_mask_allowed[rta_sec_era]))) in load_check_len_offset()
156 if ((length > 3) || (offset)) in load_check_len_offset()
160 if ((length != 4) || (offset != 0)) in load_check_len_offset()
164 if (!(((length == 4) && (offset == 0)) || in load_check_len_offset()
165 ((length == 8) && (offset == 0)))) in load_check_len_offset()
169 if (!(((length == 4) && (offset == 0)) || in load_check_len_offset()
170 ((length == 4) && (offset == 4)) || in load_check_len_offset()
171 ((length == 8) && (offset == 0)))) in load_check_len_offset()
175 if ((length < 1) || (length > 8) || (offset != 0)) in load_check_len_offset()
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H A Dmove_cmd.h81 uint16_t *offset, uint16_t *opt);
84 math_offset(uint16_t offset);
92 uint16_t offset = 0, opt = 0; in rta_move() local
123 &offset, &opt); in rta_move()
127 opcode |= (offset << MOVE_OFFSET_SHIFT) & MOVE_OFFSET_MASK; in rta_move()
138 offset = src_offset; in rta_move()
140 offset = dst_offset; in rta_move()
142 ret = math_offset(offset); in rta_move()
233 uint16_t *offset, uint16_t *opt) in set_move_offset() argument
240 *offset = dst_offset; in set_move_offset()
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/dpdk/drivers/common/sfc_efx/base/
H A Defx_vpd.c452 unsigned int offset; in efx_vpd_hunk_length() local
456 offset = 0; in efx_vpd_hunk_length()
459 if ((rc = efx_vpd_next_tag(data, size, &offset, in efx_vpd_hunk_length()
462 offset += taglen; in efx_vpd_hunk_length()
467 *lengthp = offset; in efx_vpd_hunk_length()
485 unsigned int offset; in efx_vpd_hunk_verify() local
498 offset = 0; in efx_vpd_hunk_verify()
501 if ((rc = efx_vpd_next_tag(data, size, &offset, in efx_vpd_hunk_verify()
516 if ((rc = efx_vpd_next_keyword(data + offset, in efx_vpd_hunk_verify()
522 for (i = 0; i < offset + pos + 4; i++) in efx_vpd_hunk_verify()
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H A Def10_image.c77 uint32_t offset; in efx_asn1_parse_header_match_tag() local
96 for (offset = 2; offset < cursor->hdr_size; offset++) { in efx_asn1_parse_header_match_tag()
98 (cursor->val_size << 8) | cursor->buffer[offset]; in efx_asn1_parse_header_match_tag()
607 uint32_t offset; in efx_build_signed_image_write_buffer() member
633 cms_header.offset = 0; in efx_build_signed_image_write_buffer()
637 (cms_header.offset > (buffer_size - cms_header.size))) { in efx_build_signed_image_write_buffer()
642 image_header.offset = cms_header.offset + cms_header.size; in efx_build_signed_image_write_buffer()
645 (image_header.offset > (buffer_size - image_header.size))) { in efx_build_signed_image_write_buffer()
650 code.offset = image_header.offset + image_header.size; in efx_build_signed_image_write_buffer()
653 (code.offset > (buffer_size - code.size))) { in efx_build_signed_image_write_buffer()
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/dpdk/lib/hash/
H A Drte_thash.c52 uint32_t offset; /** < Offset of the m-sequence */
410 get_subvalue(struct rte_thash_ctx *ctx, uint32_t offset) in generate_subkey()
414 tmp = (uint32_t *)(&ctx->hash_key[offset >> 3]); in generate_subkey()
416 val >>= (TOEPLITZ_HASH_LEN - ((offset & (CHAR_BIT - 1)) + in generate_subkey()
430 start = h->offset + h->len - (2 * ctx->reta_sz_log - 1); in get_subvalue()
452 if (end < cur_ent->offset) {
465 } else if ((next_ent != NULL) && (end > next_ent->offset)) { in insert_before()
478 ret = generate_subkey(ctx, ent->lfsr, cur_ent->offset - 1, start); in insert_before()
514 if ((next_ent != NULL) && (end > next_ent->offset)) {
545 uint32_t offset) in insert_after()
79 uint32_t offset; /** < Offset of the m-sequence */ global() member
420 get_subvalue(struct rte_thash_ctx * ctx,uint32_t offset) get_subvalue() argument
555 rte_thash_add_helper(struct rte_thash_ctx * ctx,const char * name,uint32_t len,uint32_t offset) rte_thash_add_helper() argument
679 read_unaligned_byte(uint8_t * ptr,unsigned int offset) read_unaligned_byte() argument
694 read_unaligned_bits(uint8_t * ptr,int len,int offset) read_unaligned_bits() argument
717 get_bits_mask(unsigned int len,unsigned int offset) get_bits_mask() argument
731 write_unaligned_byte(uint8_t * ptr,unsigned int len,unsigned int offset,uint8_t val) write_unaligned_byte() argument
749 write_unaligned_bits(uint8_t * ptr,int len,int offset,uint32_t val) write_unaligned_bits() argument
779 int offset; rte_thash_adjust_tuple() local
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/dpdk/lib/mbuf/
H A Drte_mbuf_dyn.c27 size_t offset; member
150 check_offset(size_t offset, size_t size, size_t align) in check_offset() argument
154 if ((offset & (align - 1)) != 0) in check_offset()
156 if (offset + size > sizeof(struct rte_mbuf)) in check_offset()
160 if (!shm->free_space[i + offset]) in check_offset()
210 return mbuf_dynfield->offset; in rte_mbuf_dynfield_lookup()
236 size_t i, offset; in __rte_mbuf_dynfield_register_offset() local
244 if (req != SIZE_MAX && req != mbuf_dynfield->offset) { in __rte_mbuf_dynfield_register_offset()
252 return mbuf_dynfield->offset; in __rte_mbuf_dynfield_register_offset()
265 for (offset = 0; in __rte_mbuf_dynfield_register_offset()
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/dpdk/drivers/net/bnxt/tf_core/
H A Dbitalloc.c90 int offset = 0; in ba_init() local
99 offset += words[lev]; in ba_init()
100 pool->storage[offset++] = words[--lev]; in ba_init()
114 int offset, in ba_alloc_helper() argument
120 bitalloc_word_t *storage = &pool->storage[offset]; in ba_alloc_helper()
131 offset + words + 1, in ba_alloc_helper()
187 int offset, in ba_alloc_reverse_helper() argument
193 bitalloc_word_t *storage = &pool->storage[offset]; in ba_alloc_reverse_helper()
204 offset + words + 1, in ba_alloc_reverse_helper()
233 int offset, in ba_alloc_index_helper() argument
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/dpdk/drivers/raw/ifpga/base/
H A Dopae_at24_eeprom.c13 u32 offset, u8 *buf, u32 len) in at24_eeprom_read_and_try() argument
19 ret = i2c_read16(dev, slave_addr, offset, in at24_eeprom_read_and_try()
31 u32 offset, u8 *buf, int count) in at24_eeprom_read() argument
46 status = at24_eeprom_read_and_try(dev, slave_addr, offset, in at24_eeprom_read()
52 offset += len; in at24_eeprom_read()
61 u32 offset, u8 *buf, int count) in at24_eeprom_write() argument
76 status = i2c_write16(dev, slave_addr, offset, buf, len); in at24_eeprom_write()
81 offset += len; in at24_eeprom_write()
H A Difpga_api.c96 u64 offset, unsigned int byte, void *data) in ifpga_acc_read() argument
104 if (offset + byte <= offset) in ifpga_acc_read()
111 if (offset + byte > region->len) in ifpga_acc_read()
116 *(u64 *)data = opae_readq(region->addr + offset); in ifpga_acc_read()
119 *(u32 *)data = opae_readl(region->addr + offset); in ifpga_acc_read()
122 *(u16 *)data = opae_readw(region->addr + offset); in ifpga_acc_read()
125 *(u8 *)data = opae_readb(region->addr + offset); in ifpga_acc_read()
135 unsigned int region_idx, u64 offset, in ifpga_acc_write() argument
144 if (offset + byte <= offset) in ifpga_acc_write()
151 if (offset + byte > region->len) in ifpga_acc_write()
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/dpdk/app/test/
H A Dtest_cryptodev_security_tls_record_test_vectors.h64 .iv.offset = IV_OFFSET,
134 .iv.offset = IV_OFFSET,
206 .iv.offset = IV_OFFSET,
286 .iv.offset = 0,
298 .iv.offset = IV_OFFSET,
368 .iv.offset = IV_OFFSET,
440 .iv.offset = IV_OFFSET,
502 .iv.offset = 0,
514 .iv.offset = IV_OFFSET,
586 .iv.offset = IV_OFFSET,
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/dpdk/drivers/net/qede/base/
H A Decore_init_ops.h76 #define STORE_RT_REG(hwfn, offset, val) \ argument
77 ecore_init_store_rt_reg(hwfn, offset, val)
79 #define OVERWRITE_RT_REG(hwfn, offset, val) \ argument
80 ecore_init_store_rt_reg(hwfn, offset, val)
97 #define STORE_RT_REG_AGG(hwfn, offset, val) \ argument
98 ecore_init_store_rt_agg(hwfn, offset, (u32 *)&(val), sizeof(val))
/dpdk/drivers/bus/pci/linux/
H A Dpci_init.h41 void *buf, size_t len, off_t offset);
43 const void *buf, size_t len, off_t offset);
48 void *data, size_t len, off_t offset);
50 const void *data, size_t len, off_t offset);
62 void *buf, size_t len, off_t offset);
64 const void *buf, size_t len, off_t offset);
69 void *data, size_t len, off_t offset);
71 const void *data, size_t len, off_t offset);
/dpdk/drivers/net/nfp/nfpcore/
H A Dnfp_rtsym.h24 uint64_t offset, void *buf, size_t len);
26 uint64_t offset, uint32_t *value);
28 uint64_t offset, uint64_t *value);
31 uint64_t offset, void *buf, size_t len);
33 uint64_t offset, uint32_t value);
35 uint64_t offset, uint64_t value);
44 uint32_t offset, uint32_t min_size, struct nfp_cpp_area **area);
/dpdk/drivers/common/nitrox/
H A Dnitrox_csr.h12 #define NITROX_CSR_ADDR(bar_addr, offset) (bar_addr + (offset)) argument
41 nitrox_read_csr(uint8_t *bar_addr, uint64_t offset) in nitrox_read_csr() argument
43 return rte_read64(bar_addr + offset); in nitrox_read_csr()
47 nitrox_write_csr(uint8_t *bar_addr, uint64_t offset, uint64_t value) in nitrox_write_csr() argument
49 rte_write64(value, (bar_addr + offset)); in nitrox_write_csr()
/dpdk/lib/eal/x86/include/
H A Drte_memcpy.h483 * Macro for copying unaligned block from one location to another with constant load offset,
488 * - Load offset is <offset>, which must be immediate value within [1, 15]
489 * - For <src>, make sure <offset> bit backwards & <16 - offset> bit forwards are available for loading
493 #define MOVEUNALIGNED_LEFT47_IMM(dst, src, len, offset) \ argument
496 while (len >= 128 + 16 - offset) { \
497 xmm0 = _mm_loadu_si128((const __m128i *)(const void *)((const uint8_t *)src - offset + 0 * 16)); \
499 xmm1 = _mm_loadu_si128((const __m128i *)(const void *)((const uint8_t *)src - offset + 1 * 16)); \
500 xmm2 = _mm_loadu_si128((const __m128i *)(const void *)((const uint8_t *)src - offset
554 MOVEUNALIGNED_LEFT47(dst,src,len,offset) global() argument
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/dpdk/examples/ipsec-secgw/
H A Dipip.h16 ipip_outbound(struct rte_mbuf *m, uint32_t offset, uint32_t is_ipv6, in ipip_outbound() argument
43 offset += sizeof(struct ip6_hdr); in ipip_outbound()
44 outip6 = (struct ip6_hdr *)rte_pktmbuf_prepend(m, offset); in ipip_outbound()
62 offset += sizeof(struct ip); in ipip_outbound()
63 outip4 = (struct ip *)rte_pktmbuf_prepend(m, offset); in ipip_outbound()
86 ip4ip_outbound(struct rte_mbuf *m, uint32_t offset, in ip4ip_outbound() argument
89 return ipip_outbound(m, offset, 0, src, dst); in ip4ip_outbound()
93 ip6ip_outbound(struct rte_mbuf *m, uint32_t offset, in ip6ip_outbound() argument
96 return ipip_outbound(m, offset, 1, src, dst); in ip6ip_outbound()
124 ipip_inbound(struct rte_mbuf *m, uint32_t offset) in ipip_inbound() argument
[all …]
/dpdk/drivers/bus/pci/bsd/
H A Dpci.c156 uint64_t offset; in pci_uio_map_resource_by_index() local
181 offset = res_idx * pagesz; in pci_uio_map_resource_by_index()
182 mapaddr = pci_map_resource(NULL, fd, (off_t)offset, in pci_uio_map_resource_by_index()
191 maps[map_idx].offset = offset; in pci_uio_map_resource_by_index()
399 void *buf, size_t len, off_t offset) in rte_pci_read_config() argument
412 .pi_reg = offset, in rte_pci_read_config()
445 const void *buf, size_t len, off_t offset) in rte_pci_write_config() argument
456 .pi_reg = offset, in rte_pci_write_config()
488 void *buf, size_t len, off_t offset) in rte_pci_mmio_read() argument
491 (uint64_t)offset + len > dev->mem_resource[bar].len) in rte_pci_mmio_read()
[all …]
/dpdk/lib/member/
H A Drte_xxh64_avx512.h52 size_t offset = 0; in rte_xxh64_sketch_avx512() local
61 input = _mm512_set1_epi64(*(uint64_t *)RTE_PTR_ADD(key, offset)); in rte_xxh64_sketch_avx512()
69 offset += 8; in rte_xxh64_sketch_avx512()
74 (*(uint32_t *)RTE_PTR_ADD(key, offset)); in rte_xxh64_sketch_avx512()
83 offset += 4; in rte_xxh64_sketch_avx512()
89 (*(uint8_t *)RTE_PTR_ADD(key, offset)); in rte_xxh64_sketch_avx512()
96 offset++; in rte_xxh64_sketch_avx512()
/dpdk/lib/ethdev/
H A Dsff_8472.c84 int offset; /* A2-relative address offset */ member
116 #define A2_OFFSET_TO_U16(offset) \ argument
117 (data[SFF_A2_BASE + (offset)] << 8 | data[SFF_A2_BASE + (offset) + 1])
120 #define A2_OFFSET_TO_SLP(offset) \ argument
121 (data[SFF_A2_BASE + (offset)] + data[SFF_A2_BASE + (offset) + 1] / 256.)
124 #define A2_OFFSET_TO_OFF(offset) \ argument
125 ((int16_t)A2_OFFSET_TO_U16(offset))
128 #define A2_OFFSET_TO_RXPWRx(offset) \ argument
129 (befloattoh((const uint32_t *)(data + SFF_A2_BASE + (offset))))
136 #define A2_OFFSET_TO_TEMP(offset) ((int16_t)A2_OFFSET_TO_U16(offset)) argument
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/dpdk/drivers/net/virtio/
H A Dvirtio_pci.c57 legacy_read_dev_config(struct virtio_hw *hw, size_t offset, in legacy_read_dev_config() argument
68 VIRTIO_PCI_CONFIG(dev) + offset); in legacy_read_dev_config()
73 VIRTIO_PCI_CONFIG(dev) + offset); in legacy_read_dev_config()
78 VIRTIO_PCI_CONFIG(dev) + offset); in legacy_read_dev_config()
82 offset += size; in legacy_read_dev_config()
87 VIRTIO_PCI_CONFIG(dev) + offset); in legacy_read_dev_config()
92 legacy_write_dev_config(struct virtio_hw *hw, size_t offset, in legacy_write_dev_config() argument
108 VIRTIO_PCI_CONFIG(dev) + offset); in legacy_write_dev_config()
113 VIRTIO_PCI_CONFIG(dev) + offset); in legacy_write_dev_config()
117 VIRTIO_PCI_CONFIG(dev) + offset); in legacy_write_dev_config()
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