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/freebsd-src/sys/contrib/device-tree/Bindings/serial/
H A Dsirf-uart.txt4 - compatible : Should be "sirf,prima2-uart", "sirf, prima2-usp-uart",
5 "sirf,atlas7-uart" or "sirf,atlas7-usp-uart".
6 - reg : Offset and length of the register set for the device
7 - interrupts : Should contain uart interrupt
8 - fifosize : Should define hardware rx/tx fifo size
9 - clocks : Should contain uart clock number
12 - uart-has-rtscts: we have hardware flow controller pins in hardware
13 - rts-gpios: RTS pin for USP-based UART if uart-has-rtscts is true
14 - cts-gpios: CTS pin for USP-based UART if uart-has-rtscts is true
18 uart0: uart@b0050000 {
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H A Dfsl-imx-uart.txt1 * Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
4 - compatible : Should be "fsl,<soc>-uart"
5 - reg : Address and length of the register set for the device
6 - interrupts : Should contain uart interrupt
9 - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
11 - fsl,inverted-tx , fsl,inverted-rx : Indicate that the hardware attached
15 - rs485-rts-delay, rs485-rts-active-low, rs485-rx-during-tx,
16 linux,rs485-enabled-at-boot-time: see rs485.txt. Note that for RS485
17 you must enable either the "uart-has-rtscts" or the "rts-gpios"
18 properties. In case you use "uart-has-rtscts" the signal that controls
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H A Dserial.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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H A Dst,stm32-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uar
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H A Dfsl-mxs-auart.txt1 * Freescale MXS Application UART (AUART)
4 - compatible : Should be one of fallowing variants:
5 "fsl,imx23-auart" - Freescale i.MX23
6 "fsl,imx28-auart" - Freescale i.MX28
7 "alphascale,asm9260-auart" - Alphascale ASM9260
8 - reg : Address and length of the register set for the device
9 - interrupts : Should contain the auart interrupt numbers
10 - dmas: DMA specifier, consisting of a phandle to DMA controller node
12 Refer to dma.txt and fsl-mxs-dma.txt for details.
13 - dma-names: "rx" for RX channel, "tx" for TX channel.
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H A Dfsl-imx-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
10 - Fabio Estevam <festevam@gmail.com>
15 - const: fsl,imx1-uart
16 - const: fsl,imx21-uart
17 - items:
18 - enum:
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H A Drenesas,sci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 - $ref: serial.yaml#
18 - items:
19 - enum:
20 - renesas,r9a07g043-sci # RZ/G2UL and RZ/Five
21 - renesas,r9a07g044-sci # RZ/G2{L,LC}
22 - renesas,r9a07g054-sci # RZ/V2L
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H A Dfsl-mxs-auart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-mxs-auart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale MXS Application UART (AUART)
10 - Fabio Estevam <festevam@gmail.com>
13 - $ref: serial.yaml#
18 - const: fsl,imx23-auart
19 - const: alphascale,asm9260-auart
20 - items:
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/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qdl-dhcom-drc02.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 stdout-path = "serial0:115200n8";
26 * GPIO line, however the i.MX6 UART driver assumes RX happens
30 rs485-rx-en-hog {
31 gpio-hog;
33 line-name = "rs485-rx-en";
34 output-low;
39 gpio-line-names =
43 "", "", "", "DRC02-In1", "", "", "", "";
47 gpio-line-names =
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H A Dimx27-phytec-phycard-s-rdk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "imx27-phytec-phycard-s-som.dtsi"
10 compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
13 stdout-path = &uart1;
17 model = "Primeview-PD050VL1";
18 bits-per-pixel = <16>; /* non-standard but required */
19 fsl,pcr = <0xf0c88080>; /* non-standard but required */
20 display-timings {
21 native-mode = <&timing0>;
25 hback-porch = <112>;
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H A Dimx6ull-dhcom-drc02.dts1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 * DHCM-iMX6ULL-C080-R051-F0409-SPI-E2-CAN2-SD-RTC-ADC-I-01D2
7 * DHCOR PCB number: 578-200 or newer
8 * DHCOM PCB number: 579-200 or newer
9 * DRC02 PCB number: 568-100 or newer (2nd ethernet by SoM)
11 /dts-v1/;
13 #include "imx6ull-dhcom-som.dtsi"
14 #include "imx6ull-dhcom-som-cfg-sdcard.dtsi"
18 compatible = "dh,imx6ull-dhcom-drc02", "dh,imx6ull-dhcom-som",
19 "dh,imx6ull-dhcor-som", "fsl,imx6ull";
[all …]
H A Dimx31-lite.dts1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
5 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "logicpd,imx31-lite", "fsl,imx31";
17 stdout-path = &uart1;
26 compatible = "gpio-leds";
43 nand-bus-width = <8>;
44 nand-ecc-mode = "hw";
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H A Dimx27-eukrea-mbimxsd27-baseboard.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "imx27-eukrea-cpuimx27.dtsi"
10 compatible = "eukrea,mbimxsd27-baseboard", "eukrea,cpuimx27", "fsl,imx27";
12 display0: CMO-QVGA {
13 model = "CMO-QVGA";
14 bits-per-pixel = <16>;
17 display-timings {
18 native-mode = <&timing0>;
20 clock-frequency = <6500000>;
23 hback-porch = <20>;
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H A Dimx1-ads.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
14 stdout-path = &uart1;
24 pinctrl-0 = <&pinctrl_cspi1>;
25 cs-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_i2c>;
37 gpio-controller;
38 #gpio-cells = <2>;
44 gpio-controller;
[all …]
H A Dimx1-apf9328.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
11 compatible = "armadeus,imx1-apf9328", "fsl,imx1";
14 stdout-path = &uart1;
24 pinctrl-names = "default";
25 pinctrl-
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H A Dimx35-eukrea-mbimxsd35-baseboard.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "imx35-eukrea-cpuimx35.dtsi"
14 compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35";
16 gpio-keys {
17 compatible = "gpio-keys";
18 pinctrl-names = "default";
19 pinctrl-0 = <&pinctrl_bp1>;
[all …]
H A Dimx25-eukrea-mbimxsd25-baseboard.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "imx25-eukrea-cpuimx25.dtsi"
14 compatible = "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25";
16 gpio-keys {
17 compatible = "gpio-keys";
18 pinctrl-names = "default";
19 pinctrl-0 = <&pinctrl_gpiokeys>;
[all …]
H A Dimx6q-pistachio.dts6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
47 #include <dt-bindings/gpio/gpio.h>
48 #include <dt-bindings/input/input.h>
53 compatible = "nutsboard,imx6q-pistachio", "fsl,imx6q";
56 stdout-path = &uart4;
64 reg_3p3v: regulator-3p3v {
65 compatible = "regulator-fixed";
66 regulator-name = "3P3V";
67 regulator-mi
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H A Dimx51-eukrea-mbimxsd51-baseboard.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
7 #include "imx51-eukrea-cpuimx51.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <24000000>;
23 compatible = "gpio-keys";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_gpiokeys_1>;
[all …]
H A Dimx31-bug.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
6 /dts-v1/;
11 compatible = "buglabs,imx31-bug", "fsl,imx31";
20 uart-has-rtscts;
/freebsd-src/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxl-s905w-jethome-jethub-j80.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /dts-v1/;
12 #include "meson-gxl.dtsi"
15 compatible = "jethome,jethub-j80", "amlogic,s905w", "amlogic,meson-gxl";
22 reserved-memory {
37 stdout-path = "serial0:115200n8";
40 vddio_ao18: regulator-vddi
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/freebsd-src/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-r40-oka40i-c.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Based on the sun8i-r40-bananapi-m2-ultra.dts, which is:
4 // Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
7 /dts-v1/;
8 #include "sun8i-r4
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/freebsd-src/sys/contrib/device-tree/src/arm64/renesas/
H A Dr8a779f0-spider-cpu.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
15 compatible = "renesas,spider-cpu", "renesas,r8a779f0";
30 stdout-path = "serial0:1843200n8";
34 compatible = "gpio-leds";
36 led-7 {
40 function-enumerato
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H A Dr8a779f4-s4sk.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Source for the R-Car S4 Starter Kit board
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
13 model = "R-Car S4 Starter Kit board";
30 stdout-path = "serial0:921600n8";
45 vcc_sdhi: regulator-vcc-sdh
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/freebsd-src/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h6-orangepi-lite2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include "sun50i-h6-orangepi.dtsi"
8 compatible = "xunlong,orangepi-lite2", "allwinner,sun50i-h6";
11 serial1 = &uart1; /* BT-UART */
15 compatible = "mmc-pwrse
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